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Add FreeRTOS-Plus directory.
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319
FreeRTOS/Demo/ARM7_STR71x_IAR/Library/include/rccu.h
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319
FreeRTOS/Demo/ARM7_STR71x_IAR/Library/include/rccu.h
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/******************** (C) COPYRIGHT 2003 STMicroelectronics ********************
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* File Name : rccu.h
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* Author : MCD Application Team
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* Date First Issued : 28/07/2003
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* Description : This file contains all the functions prototypes for the
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* RCCU software library.
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********************************************************************************
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* History:
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* 30/11/2004 : V2.0
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* 14/07/2004 : V1.3
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* 01/01/2004 : V1.2
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*******************************************************************************
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THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
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CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
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OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
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OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
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CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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#ifndef __RCCU_H
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#define __RCCU_H
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#include "71x_map.h"
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typedef enum {
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RCCU_DEFAULT=0x00,
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RCCU_RCLK_2 =0x01,
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RCCU_RCLK_4 =0x02,
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RCCU_RCLK_8 =0x03
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} RCCU_Clock_Div;
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typedef enum {
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RCCU_PLL1_Output,
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RCCU_CLOCK2_16,
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RCCU_CLOCK2,
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RCCU_RTC_CLOCK
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} RCCU_RCLK_Clocks;
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typedef enum {
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RCCU_PLL1_Mul_12=0x01,
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RCCU_PLL1_Mul_16=0x03,
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RCCU_PLL1_Mul_20=0x00,
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RCCU_PLL1_Mul_24=0x02
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} RCCU_PLL1_Mul;
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typedef enum {
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RCCU_PLL2_Mul_12=0x01,
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RCCU_PLL2_Mul_16=0x03,
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RCCU_PLL2_Mul_20=0x00,
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RCCU_PLL2_Mul_28=0x02
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} RCCU_PLL2_Mul;
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typedef enum {
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RCCU_Div_1=0x00,
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RCCU_Div_2=0x01,
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RCCU_Div_3=0x02,
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RCCU_Div_4=0x03,
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RCCU_Div_5=0x04,
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RCCU_Div_6=0x05,
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RCCU_Div_7=0x06
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} RCCU_PLL_Div;
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typedef enum {
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RCCU_PLL2_Output = 0x01,
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RCCU_USBCK = 0x00
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} RCCU_USB_Clocks;
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typedef enum {
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RCCU_CLK2,
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RCCU_RCLK,
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RCCU_MCLK,
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RCCU_PCLK,
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RCCU_FCLK
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} RCCU_Clocks;
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typedef enum {
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RCCU_PLL1_LOCK_IT = 0x0080,
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RCCU_CKAF_IT = 0x0100,
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RCCU_CK2_16_IT = 0x0200,
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RCCU_STOP_IT = 0x0400
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} RCCU_Interrupts;
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typedef enum {
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RCCU_PLL1_LOCK = 0x0002,
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RCCU_CKAF_ST = 0x0004,
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RCCU_PLL1_LOCK_I = 0x0800,
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RCCU_CKAF_I = 0x1000,
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RCCU_CK2_16_I = 0x2000,
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RCCU_STOP_I = 0x4000
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} RCCU_Flags;
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typedef enum {
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RCCU_ExternalReset = 0x00000000,
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RCCU_SoftwareReset = 0x00000020,
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RCCU_WDGReset = 0x00000040,
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RCCU_RTCAlarmReset = 0x00000080,
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RCCU_LVDReset = 0x00000200,
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RCCU_WKPReset = 0x00000400
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}RCCU_ResetSources;
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#define RCCU_Div2_Mask 0x00008000
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#define RCCU_Div2_Index 0x0F
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#define RCCU_FACT_Mask 0x0003
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#define RCCU_FACT1_Mask 0x0003
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#define RCCU_FACT2_Mask 0x0300
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#define RCCU_FACT2_Index 0x08
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#define RCCU_MX_Mask 0x00000030
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#define RCCU_MX_Index 0x04
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#define RCCU_DX_Mask 0x00000007
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#define RCCU_FREEN_Mask 0x00000080
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#define RCCU_CSU_CKSEL_Mask 0x00000001
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#define RCCU_CK2_16_Mask 0x00000008
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#define RCCU_CKAF_SEL_Mask 0x00000004
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#define RCCU_LOCK_Mask 0x00000002
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#define RCCU_USBEN_Mask 0x0100
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#define RCCU_USBEN_Index 0x08
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#define RCCU_ResetSources_Mask 0x000006E0
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// RTC Oscillator Frequency value = 32 768 Hz
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#define RCCU_RTC_Osc 32768
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/*******************************************************************************
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* Function Name : RCCU_Div2Config
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* Description : Enables/Disables the clock division by two
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* Input : NewState : ENABLE or DISABLE
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* Return : None
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*******************************************************************************/
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inline void RCCU_Div2Config ( FunctionalState NewState )
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{
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if (NewState == ENABLE) RCCU->CFR |= RCCU_Div2_Mask;
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else RCCU->CFR &= ~RCCU_Div2_Mask;
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}
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/*******************************************************************************
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* Function Name : RCCU_Div2Status
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* Description : Gets the Div2 Flag status
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* Input : None
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* Input : FlagStatus
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* Return : None
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*******************************************************************************/
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inline FlagStatus RCCU_Div2Status ( void )
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{
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return (RCCU->CFR & RCCU_Div2_Mask) == 0 ? RESET : SET;
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}
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/*******************************************************************************
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* Function Name : RCCU_MCLKConfig
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* Description : Selects the division factor for RCLK to obtain the
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* MCLK clock for the CPU
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* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2, RCCU_RCLK_4, RCCU_RCLK_8
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* Return : None
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*******************************************************************************/
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inline void RCCU_MCLKConfig ( RCCU_Clock_Div New_Clock )
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{
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PCU->MDIVR = ( PCU->MDIVR & ~RCCU_FACT_Mask ) | New_Clock;
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}
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/*******************************************************************************
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* Function Name : RCCU_FCLKConfig
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* Description : Selects the division factor for RCLK to obtain the
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* FCLK clock for the APB1 fast peripherals (PCLK1).
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* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2,
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* RCCU_RCLK_4, RCCU_RCLK_8
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* Return : None
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*******************************************************************************/
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inline void RCCU_FCLKConfig ( RCCU_Clock_Div New_Clock )
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{
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PCU->PDIVR = ( PCU->PDIVR & ~RCCU_FACT1_Mask ) | New_Clock;
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}
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/*******************************************************************************
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* Function Name : RCCU_PCLKConfig
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* Description : Selects the division factor for RCLK to obtain the
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* PCLK clock for the APB2 peripherals (PCLK2).
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* Input : New_Clock : RCCU_DEFAULT, RCCU_RCLK_2,
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* RCCU_RCLK_4, RCCU_RCLK_8
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* Return : None
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*******************************************************************************/
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inline void RCCU_PCLKConfig ( RCCU_Clock_Div New_Clock )
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{
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PCU->PDIVR =(PCU->PDIVR & ~RCCU_FACT2_Mask)|(New_Clock << RCCU_FACT2_Index);
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}
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/*******************************************************************************
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* Function Name : RCCU_PLL1Config
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* Description : Configures the PLL1 div & mul factors.
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* Input : New_Mul : RCCU_Mul_12, RCCU_Mul_16, RCCU_Mul_20, RCCU_Mul_28
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* : New_Div : RCCU_Div_1, RCCU_Div_2, RCCU_Div_3,
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* RCCU_Div_4, RCCU_Div_5, RCCU_Div_6, RCCU_Div_7
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* Return : None
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*******************************************************************************/
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void RCCU_PLL1Config ( RCCU_PLL1_Mul New_Mul, RCCU_PLL_Div New_Div );
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/*******************************************************************************
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* Function Name : RCCU_PLL2Config
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* Description : Configures the PLL2 div & mul factors.
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* Input : New_Mul : RCCU_Mul_12, RCCU_Mul_16, RCCU_Mul_20, RCCU_Mul_28
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* : New_Div : RCCU_Div_1, RCCU_Div_2, RCCU_Div_3, RCCU_Div_4,
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* RCCU_Div_5, RCCU_Div_6, RCCU_Div_7
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* Return : None
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*******************************************************************************/
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void RCCU_PLL2Config ( RCCU_PLL2_Mul New_Mul, RCCU_PLL_Div New_Div );
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/*******************************************************************************
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* Function Name : RCCU_RCLKSourceConfig
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* Description : Selects the RCLK source clock
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* Input : New_Clock : RCCU_PLL1_OutPut, RCCU_CLOCK2_16, RCCU_CLOCK2
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* Return : None
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*******************************************************************************/
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void RCCU_RCLKSourceConfig ( RCCU_RCLK_Clocks New_Clock );
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/*******************************************************************************
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* Function Name : RCCU_RCLKClockSource
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* Description : Returns the current RCLK source clock
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* Input : None
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* Return : RCCU_PLL1_Output, RCCU_CLOCK2_16, RCCU_CLOCK2
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*******************************************************************************/
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RCCU_RCLK_Clocks RCCU_RCLKClockSource ( void );
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/*******************************************************************************
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* Function Name : RCCU_USBCLKConfig
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* Description : Selects the USB source clock
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* Input : New_Clock : RCCU_PLL2_Output, RCCU_USBCK
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* Return : None
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*******************************************************************************/
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inline void RCCU_USBCLKConfig ( RCCU_USB_Clocks New_Clock )
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{
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PCU->PLL2CR = (PCU->PLL2CR & ~RCCU_USBEN_Mask)|(New_Clock << RCCU_USBEN_Index);
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}
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/*******************************************************************************
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* Function Name : RCCU_USBClockSource
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* Description : Gets the USB source clock
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* Input : None
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* Return : RCCU_USB_Clocks
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*******************************************************************************/
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RCCU_USB_Clocks RCCU_USBClockSource ( void );
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/*******************************************************************************
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* Function Name : RCCU_FrequencyValue
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* Description : Calculates & Returns any internal RCCU clock freuqency
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* passed in parametres
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* Input : RCCU_Clocks : RCCU_CLK2, RCCU_RCLK, RCCU_MCLK,
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* RCCU_PCLK, RCCU_FCLK
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* Return : u32
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*******************************************************************************/
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u32 RCCU_FrequencyValue ( RCCU_Clocks Internal_Clk );
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/*******************************************************************************
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* Function Name : RCCU_ITConfig
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* Description : Configures the RCCU interrupts
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* Input : RCCU interrupts : RCCU_CK2_16_IT, RCCU_CKAF_IT,
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* RCCU_PLL1_LOCK_IT
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* Return : None
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*******************************************************************************/
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inline void RCCU_ITConfig ( RCCU_Interrupts RCCU_IT, FunctionalState NewState)
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{
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if (NewState == ENABLE) RCCU->CCR |= RCCU_IT; else RCCU->CCR &= ~RCCU_IT;
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}
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/*******************************************************************************
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* Function Name : RCCU_FlagStatus
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* Description : Checks the RCCU clock flag register status
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* Input : RCCU Flags : RCCU_CK2_16, RCCU_CKAF, RCCU_PLL1_LOCK
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* Return : FlagStatus : SET or RESET
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*******************************************************************************/
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inline FlagStatus RCCU_FlagStatus ( RCCU_Flags RCCU_flag )
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{
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return (RCCU->CFR & RCCU_flag) == 0 ? RESET : SET;
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}
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/*******************************************************************************
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* Function Name : RCCU_FlagClear
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* Description : Clears a specified flag in the RCCU registers
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* Input : RCCU Flags : RCCU_CK2_16, RCCU_CKAF, RCCU_PLL1_LOCK
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* Return : None
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*******************************************************************************/
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inline void RCCU_FlagClear ( RCCU_Interrupts RCCU_IT )
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{
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RCCU->CFR |= RCCU_IT;
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}
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/*******************************************************************************
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* Function Name : RCCU_ResetSources
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* Description : Return the source of the system reset
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* Input : None
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* Return : The reset source
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*******************************************************************************/
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inline RCCU_ResetSources RCCU_ResetSource ()
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{
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switch(RCCU->CFR & RCCU_ResetSources_Mask)
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{
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case 0x00000020: return RCCU_SoftwareReset;
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case 0x00000040: return RCCU_WDGReset;
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case 0x00000080: return RCCU_RTCAlarmReset;
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case 0x00000200: return RCCU_LVDReset;
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case 0x00000400: return RCCU_WKPReset;
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default : return RCCU_ExternalReset;
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}
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}
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#endif // __RCCU_H
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/******************* (C) COPYRIGHT 2003 STMicroelectronics *****END OF FILE****/
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