mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-01 08:54:14 -04:00
Add FreeRTOS-Plus directory.
This commit is contained in:
Richard Barry
parent
7bd5f21ad5
commit
f508a5f653
6798 changed files with 134949 additions and 19 deletions
297
FreeRTOS/Demo/ARM7_LPC2106_GCC/serial/serial.c
Normal file
297
FreeRTOS/Demo/ARM7_LPC2106_GCC/serial/serial.c
Normal file
|
|
@ -0,0 +1,297 @@
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/*
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FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
|
||||
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||
* Complete, revised, and edited pdf reference manuals are also *
|
||||
* available. *
|
||||
* *
|
||||
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||
* ensuring you get running as quickly as possible and with an *
|
||||
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||
* the FreeRTOS project to continue with its mission of providing *
|
||||
* professional grade, cross platform, de facto standard solutions *
|
||||
* for microcontrollers - completely free of charge! *
|
||||
* *
|
||||
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||
* *
|
||||
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
>>>NOTE<<< The modification to the GPL is included to allow you to
|
||||
distribute a combined work that includes FreeRTOS without being obliged to
|
||||
provide the source code for proprietary components outside of the FreeRTOS
|
||||
kernel. FreeRTOS is distributed in the hope that it will be useful, but
|
||||
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details. You should have received a copy of the GNU General Public
|
||||
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
by writing to Richard Barry, contact details for whom are available on the
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
* not run, what could be wrong? *
|
||||
* *
|
||||
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, training, latest information,
|
||||
license and contact details.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool.
|
||||
|
||||
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
|
||||
the code with commercial support, indemnification, and middleware, under
|
||||
the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
|
||||
provide a safety engineered and independently SIL3 certified version under
|
||||
the SafeRTOS brand: http://www.SafeRTOS.com.
|
||||
*/
|
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/*
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Changes from V2.4.0
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+ Made serial ISR handling more complete and robust.
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Changes from V2.4.1
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+ Split serial.c into serial.c and serialISR.c. serial.c can be
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compiled using ARM or THUMB modes. serialISR.c must always be
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compiled in ARM mode.
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+ Another small change to cSerialPutChar().
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Changed from V2.5.1
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+ In cSerialPutChar() an extra check is made to ensure the post to
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the queue was successful if then attempting to retrieve the posted
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character.
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*/
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/*
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BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
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This file contains all the serial port components that can be compiled to
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either ARM or THUMB mode. Components that must be compiled to ARM mode are
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contained in serialISR.c.
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*/
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/* Standard includes. */
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#include <stdlib.h>
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "queue.h"
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#include "task.h"
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/* Demo application includes. */
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#include "serial.h"
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/*-----------------------------------------------------------*/
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/* Constants to setup and access the UART. */
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#define serDLAB ( ( unsigned char ) 0x80 )
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#define serENABLE_INTERRUPTS ( ( unsigned char ) 0x03 )
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#define serNO_PARITY ( ( unsigned char ) 0x00 )
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#define ser1_STOP_BIT ( ( unsigned char ) 0x00 )
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#define ser8_BIT_CHARS ( ( unsigned char ) 0x03 )
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#define serFIFO_ON ( ( unsigned char ) 0x01 )
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#define serCLEAR_FIFO ( ( unsigned char ) 0x06 )
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#define serWANTED_CLOCK_SCALING ( ( unsigned long ) 16 )
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/* Constants to setup and access the VIC. */
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#define serUART0_VIC_CHANNEL ( ( unsigned long ) 0x0006 )
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#define serUART0_VIC_CHANNEL_BIT ( ( unsigned long ) 0x0040 )
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#define serUART0_VIC_ENABLE ( ( unsigned long ) 0x0020 )
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#define serCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )
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#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
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#define serHANDLE ( ( xComPortHandle ) 1 )
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#define serNO_BLOCK ( ( portTickType ) 0 )
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/*-----------------------------------------------------------*/
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/* Queues used to hold received characters, and characters waiting to be
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transmitted. */
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static xQueueHandle xRxedChars;
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static xQueueHandle xCharsForTx;
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/*-----------------------------------------------------------*/
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/* Communication flag between the interrupt service routine and serial API. */
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static volatile long *plTHREEmpty;
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/*
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* The queues are created in serialISR.c as they are used from the ISR.
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* Obtain references to the queues and THRE Empty flag.
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*/
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extern void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx, long volatile **pplTHREEmptyFlag );
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/*-----------------------------------------------------------*/
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xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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{
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unsigned long ulDivisor, ulWantedClock;
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xComPortHandle xReturn = serHANDLE;
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extern void ( vUART_ISR_Wrapper )( void );
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/* The queues are used in the serial ISR routine, so are created from
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serialISR.c (which is always compiled to ARM mode. */
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vSerialISRCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx, &plTHREEmpty );
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if(
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( xRxedChars != serINVALID_QUEUE ) &&
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( xCharsForTx != serINVALID_QUEUE ) &&
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( ulWantedBaud != ( unsigned long ) 0 )
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)
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{
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portENTER_CRITICAL();
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{
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/* Setup the baud rate: Calculate the divisor value. */
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ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
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ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
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/* Set the DLAB bit so we can access the divisor. */
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UART0_LCR |= serDLAB;
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/* Setup the divisor. */
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UART0_DLL = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
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ulDivisor >>= 8;
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UART0_DLM = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
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/* Turn on the FIFO's and clear the buffers. */
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UART0_FCR = ( serFIFO_ON | serCLEAR_FIFO );
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/* Setup transmission format. */
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UART0_LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
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/* Setup the VIC for the UART. */
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VICIntSelect &= ~( serUART0_VIC_CHANNEL_BIT );
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VICIntEnable |= serUART0_VIC_CHANNEL_BIT;
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VICVectAddr1 = ( long ) vUART_ISR_Wrapper;
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VICVectCntl1 = serUART0_VIC_CHANNEL | serUART0_VIC_ENABLE;
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/* Enable UART0 interrupts. */
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UART0_IER |= serENABLE_INTERRUPTS;
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}
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portEXIT_CRITICAL();
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}
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else
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{
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xReturn = ( xComPortHandle ) 0;
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}
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return xReturn;
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )
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{
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/* The port handle is not required as this driver only supports UART0. */
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( void ) pxPort;
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/* Get the next character from the buffer. Return false if no characters
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are available, or arrive before xBlockTime expires. */
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if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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{
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return pdTRUE;
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}
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else
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{
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return pdFALSE;
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}
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}
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/*-----------------------------------------------------------*/
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void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )
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{
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signed char *pxNext;
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/* NOTE: This implementation does not handle the queue being full as no
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block time is used! */
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/* The port handle is not required as this driver only supports UART0. */
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( void ) pxPort;
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( void ) usStringLength;
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/* Send each character in the string, one at a time. */
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pxNext = ( signed char * ) pcString;
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while( *pxNext )
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{
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xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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pxNext++;
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}
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )
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{
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signed portBASE_TYPE xReturn;
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/* This demo driver only supports one port so the parameter is not used. */
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( void ) pxPort;
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portENTER_CRITICAL();
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{
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/* Is there space to write directly to the UART? */
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if( *plTHREEmpty == ( long ) pdTRUE )
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{
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/* We wrote the character directly to the UART, so was
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successful. */
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*plTHREEmpty = pdFALSE;
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UART0_THR = cOutChar;
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xReturn = pdPASS;
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}
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else
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{
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/* We cannot write directly to the UART, so queue the character.
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Block for a maximum of xBlockTime if there is no space in the
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queue. */
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xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
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/* Depending on queue sizing and task prioritisation: While we
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were blocked waiting to post interrupts were not disabled. It is
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possible that the serial ISR has emptied the Tx queue, in which
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case we need to start the Tx off again. */
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if( ( *plTHREEmpty == ( long ) pdTRUE ) && ( xReturn == pdPASS ) )
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{
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xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
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*plTHREEmpty = pdFALSE;
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UART0_THR = cOutChar;
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}
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}
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}
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portEXIT_CRITICAL();
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return xReturn;
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}
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/*-----------------------------------------------------------*/
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void vSerialClose( xComPortHandle xPort )
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{
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/* Not supported as not required by the demo application. */
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( void ) xPort;
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}
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/*-----------------------------------------------------------*/
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205
FreeRTOS/Demo/ARM7_LPC2106_GCC/serial/serialISR.c
Normal file
205
FreeRTOS/Demo/ARM7_LPC2106_GCC/serial/serialISR.c
Normal file
|
|
@ -0,0 +1,205 @@
|
|||
/*
|
||||
FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
|
||||
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||
* Complete, revised, and edited pdf reference manuals are also *
|
||||
* available. *
|
||||
* *
|
||||
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||
* ensuring you get running as quickly as possible and with an *
|
||||
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||
* the FreeRTOS project to continue with its mission of providing *
|
||||
* professional grade, cross platform, de facto standard solutions *
|
||||
* for microcontrollers - completely free of charge! *
|
||||
* *
|
||||
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||
* *
|
||||
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
>>>NOTE<<< The modification to the GPL is included to allow you to
|
||||
distribute a combined work that includes FreeRTOS without being obliged to
|
||||
provide the source code for proprietary components outside of the FreeRTOS
|
||||
kernel. FreeRTOS is distributed in the hope that it will be useful, but
|
||||
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details. You should have received a copy of the GNU General Public
|
||||
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
by writing to Richard Barry, contact details for whom are available on the
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
* not run, what could be wrong? *
|
||||
* *
|
||||
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, training, latest information,
|
||||
license and contact details.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool.
|
||||
|
||||
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
|
||||
the code with commercial support, indemnification, and middleware, under
|
||||
the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
|
||||
provide a safety engineered and independently SIL3 certified version under
|
||||
the SafeRTOS brand: http://www.SafeRTOS.com.
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
|
||||
|
||||
This file contains all the serial port components that must be compiled
|
||||
to ARM mode. The components that can be compiled to either ARM or THUMB
|
||||
mode are contained in serial.c.
|
||||
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
#include <stdlib.h>
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "queue.h"
|
||||
#include "task.h"
|
||||
|
||||
/* Demo application includes. */
|
||||
#include "serial.h"
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Constant to access the VIC. */
|
||||
#define serCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )
|
||||
|
||||
/* Constants to determine the ISR source. */
|
||||
#define serSOURCE_THRE ( ( unsigned char ) 0x02 )
|
||||
#define serSOURCE_RX_TIMEOUT ( ( unsigned char ) 0x0c )
|
||||
#define serSOURCE_ERROR ( ( unsigned char ) 0x06 )
|
||||
#define serSOURCE_RX ( ( unsigned char ) 0x04 )
|
||||
#define serINTERRUPT_SOURCE_MASK ( ( unsigned char ) 0x0f )
|
||||
|
||||
/* Queues used to hold received characters, and characters waiting to be
|
||||
transmitted. */
|
||||
static xQueueHandle xRxedChars;
|
||||
static xQueueHandle xCharsForTx;
|
||||
static volatile long lTHREEmpty;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* The queues are created in serialISR.c as they are used from the ISR.
|
||||
* Obtain references to the queues and THRE Empty flag.
|
||||
*/
|
||||
void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx, long volatile **pplTHREEmptyFlag );
|
||||
|
||||
/* UART0 interrupt service routine entry point. */
|
||||
void vUART_ISR_Wrapper( void ) __attribute__ ((naked));
|
||||
|
||||
/* UART0 interrupt service routine handler. */
|
||||
void vUART_ISR_Handler( void ) __attribute__ ((noinline));
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars,
|
||||
xQueueHandle *pxCharsForTx, long volatile **pplTHREEmptyFlag )
|
||||
{
|
||||
/* Create the queues used to hold Rx and Tx characters. */
|
||||
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
|
||||
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
|
||||
|
||||
/* Pass back a reference to the queues so the serial API file can
|
||||
post/receive characters. */
|
||||
*pxRxedChars = xRxedChars;
|
||||
*pxCharsForTx = xCharsForTx;
|
||||
|
||||
/* Initialise the THRE empty flag - and pass back a reference. */
|
||||
lTHREEmpty = ( long ) pdTRUE;
|
||||
*pplTHREEmptyFlag = &lTHREEmpty;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vUART_ISR_Wrapper( void )
|
||||
{
|
||||
/* Save the context of the interrupted task. */
|
||||
portSAVE_CONTEXT();
|
||||
|
||||
/* Call the handler. This must be a separate function from the wrapper
|
||||
to ensure the correct stack frame is set up. */
|
||||
__asm volatile ("bl vUART_ISR_Handler");
|
||||
|
||||
/* Restore the context of whichever task is going to run next. */
|
||||
portRESTORE_CONTEXT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vUART_ISR_Handler( void )
|
||||
{
|
||||
signed char cChar;
|
||||
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||
|
||||
/* What caused the interrupt? */
|
||||
switch( UART0_IIR & serINTERRUPT_SOURCE_MASK )
|
||||
{
|
||||
case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
|
||||
cChar = UART0_LSR;
|
||||
break;
|
||||
|
||||
case serSOURCE_THRE : /* The THRE is empty. If there is another
|
||||
character in the Tx queue, send it now. */
|
||||
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||
{
|
||||
UART0_THR = cChar;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* There are no further characters
|
||||
queued to send so we can indicate
|
||||
that the THRE is available. */
|
||||
lTHREEmpty = pdTRUE;
|
||||
}
|
||||
break;
|
||||
|
||||
case serSOURCE_RX_TIMEOUT :
|
||||
case serSOURCE_RX : /* A character was received. Place it in
|
||||
the queue of received characters. */
|
||||
cChar = UART0_RBR;
|
||||
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||
break;
|
||||
|
||||
default : /* There is nothing to do, leave the ISR. */
|
||||
break;
|
||||
}
|
||||
|
||||
if( xHigherPriorityTaskWoken )
|
||||
{
|
||||
portYIELD_FROM_ISR();
|
||||
}
|
||||
|
||||
/* Clear the ISR in the VIC. */
|
||||
VICVectAddr = serCLEAR_VIC_INTERRUPT;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
Loading…
Add table
Add a link
Reference in a new issue