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Richard Barry 2012-08-11 21:34:11 +00:00
parent 7bd5f21ad5
commit f508a5f653
6798 changed files with 134949 additions and 19 deletions
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115
FreeRTOS/Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h Normal file
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/*
FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong? *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, training, latest information,
license and contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool.
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
the code with commercial support, indemnification, and middleware, under
the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
provide a safety engineered and independently SIL3 certified version under
the SafeRTOS brand: http://www.SafeRTOS.com.
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include <lpc210x.h>
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ( unsigned long ) 58982400 ) /* =14.7456MHz xtal multiplied by 4 using the PLL. */
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 128 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 24 * 1024 ) )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configQUEUE_REGISTRY_SIZE 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#endif /* FREERTOS_CONFIG_H */

138
FreeRTOS/Demo/ARM7_LPC2106_GCC/Makefile Normal file
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#/*
# FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
#
#
# ***************************************************************************
# * *
# * FreeRTOS tutorial books are available in pdf and paperback. *
# * Complete, revised, and edited pdf reference manuals are also *
# * available. *
# * *
# * Purchasing FreeRTOS documentation will not only help you, by *
# * ensuring you get running as quickly as possible and with an *
# * in-depth knowledge of how to use FreeRTOS, it will also help *
# * the FreeRTOS project to continue with its mission of providing *
# * professional grade, cross platform, de facto standard solutions *
# * for microcontrollers - completely free of charge! *
# * *
# * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
# * *
# * Thank you for using FreeRTOS, and thank you for your support! *
# * *
# ***************************************************************************
#
#
# This file is part of the FreeRTOS distribution.
#
# FreeRTOS is free software; you can redistribute it and/or modify it under
# the terms of the GNU General Public License (version 2) as published by the
# Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
# >>>NOTE<<< The modification to the GPL is included to allow you to
# distribute a combined work that includes FreeRTOS without being obliged to
# provide the source code for proprietary components outside of the FreeRTOS
# kernel. FreeRTOS is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
# more details. You should have received a copy of the GNU General Public
# License and the FreeRTOS license exception along with FreeRTOS; if not it
# can be viewed here: http://www.freertos.org/a00114.html and also obtained
# by writing to Richard Barry, contact details for whom are available on the
# FreeRTOS WEB site.
#
# 1 tab == 4 spaces!
#
# http://www.FreeRTOS.org - Documentation, latest information, license and
# contact details.
#
# http://www.SafeRTOS.com - A version that is certified for use in safety
# critical systems.
#
# http://www.OpenRTOS.com - Commercial support, development, porting,
# licensing and training services.
#*/
CC=arm-elf-gcc
OBJCOPY=arm-elf-objcopy
ARCH=arm-elf-ar
CRT0=boot.s
WARNINGS=-Wall -Wextra -Wshadow -Wpointer-arith -Wbad-function-cast -Wcast-align -Wsign-compare \
-Waggregate-return -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations -Wunused
#
# CFLAGS common to both the THUMB and ARM mode builds
#
CFLAGS=$(WARNINGS) -D $(RUN_MODE) -D GCC_ARM7 -I. -I../../Source/include \
-I../Common/include $(DEBUG) -mcpu=arm7tdmi -T$(LDSCRIPT) \
$(OPTIM) -fomit-frame-pointer -fno-strict-aliasing -fno-dwarf2-cfi-asm
ifeq ($(USE_THUMB_MODE),YES)
CFLAGS += -mthumb-interwork -D THUMB_INTERWORK
THUMB_FLAGS=-mthumb
endif
LINKER_FLAGS=-Xlinker -ortosdemo.elf -Xlinker -M -Xlinker -Map=rtosdemo.map
RTOS_SOURCE_DIR=../../Source
DEMO_SOURCE_DIR=../Common/Minimal
#
# Source files that can be built to THUMB mode.
#
THUMB_SRC = \
main.c \
serial/serial.c \
ParTest/ParTest.c \
$(DEMO_SOURCE_DIR)/integer.c \
$(DEMO_SOURCE_DIR)/flash.c \
$(DEMO_SOURCE_DIR)/PollQ.c \
$(DEMO_SOURCE_DIR)/comtest.c \
$(DEMO_SOURCE_DIR)/flop.c \
$(DEMO_SOURCE_DIR)/semtest.c \
$(DEMO_SOURCE_DIR)/dynamic.c \
$(DEMO_SOURCE_DIR)/BlockQ.c \
$(RTOS_SOURCE_DIR)/tasks.c \
$(RTOS_SOURCE_DIR)/queue.c \
$(RTOS_SOURCE_DIR)/list.c \
$(RTOS_SOURCE_DIR)/portable/MemMang/heap_2.c \
$(RTOS_SOURCE_DIR)/portable/GCC/ARM7_LPC2000/port.c
#
# Source files that must be built to ARM mode.
#
ARM_SRC = \
$(RTOS_SOURCE_DIR)/portable/GCC/ARM7_LPC2000/portISR.c \
serial/serialISR.c
#
# Define all object files.
#
ARM_OBJ = $(ARM_SRC:.c=.o)
THUMB_OBJ = $(THUMB_SRC:.c=.o)
rtosdemo.hex : rtosdemo.elf
$(OBJCOPY) rtosdemo.elf -O ihex rtosdemo.hex
rtosdemo.elf : $(ARM_OBJ) $(THUMB_OBJ) $(CRT0) Makefile
$(CC) $(CFLAGS) $(ARM_OBJ) $(THUMB_OBJ) -nostartfiles $(CRT0) $(LINKER_FLAGS)
$(THUMB_OBJ) : %.o : %.c $(LDSCRIPT) Makefile
$(CC) -c $(THUMB_FLAGS) $(CFLAGS) $< -o $@
$(ARM_OBJ) : %.o : %.c $(LDSCRIPT) Makefile
$(CC) -c $(CFLAGS) $< -o $@
clean :
rm -rf $(ARM_OBJ) $(THUMB_OBJ)
touch Makefile

140
FreeRTOS/Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c Normal file
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/*
FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong? *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, training, latest information,
license and contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool.
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
the code with commercial support, indemnification, and middleware, under
the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
provide a safety engineered and independently SIL3 certified version under
the SafeRTOS brand: http://www.SafeRTOS.com.
*/
/*
Changes from V2.5.2
+ All LED's are turned off to start.
*/
#include "FreeRTOS.h"
#include "partest.h"
#define partstFIRST_IO ( ( unsigned long ) 0x400 )
#define partstNUM_LEDS ( 4 )
#define partstALL_OUTPUTS_OFF ( ( unsigned long ) 0xffffffff )
/*-----------------------------------------------------------
* Simple parallel port IO routines.
*-----------------------------------------------------------*/
void vParTestInitialise( void )
{
/* This is performed from main() as the io bits are shared with other setup
functions. */
/* Turn all outputs off. */
GPIO_IOSET = partstALL_OUTPUTS_OFF;
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
unsigned long ulLED = partstFIRST_IO;
if( uxLED < partstNUM_LEDS )
{
/* Rotate to the wanted bit of port 0. Only P10 to P13 have an LED
attached. */
ulLED <<= ( unsigned long ) uxLED;
/* Set of clear the output. */
if( xValue )
{
GPIO_IOCLR = ulLED;
}
else
{
GPIO_IOSET = ulLED;
}
}
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
unsigned long ulLED = partstFIRST_IO, ulCurrentState;
if( uxLED < partstNUM_LEDS )
{
/* Rotate to the wanted bit of port 0. Only P10 to P13 have an LED
attached. */
ulLED <<= ( unsigned long ) uxLED;
/* If this bit is already set, clear it, and visa versa. */
ulCurrentState = GPIO0_IOPIN;
if( ulCurrentState & ulLED )
{
GPIO_IOCLR = ulLED;
}
else
{
GPIO_IOSET = ulLED;
}
}
}

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FreeRTOS/Demo/ARM7_LPC2106_GCC/boot.s Normal file
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/* Sample initialization file */
.extern main
.extern exit
.text
.code 32
.align 0
.extern __bss_beg__
.extern __bss_end__
.extern __stack_end__
.extern __data_beg__
.extern __data_end__
.extern __data+beg_src__
.global start
.global endless_loop
/* Stack Sizes */
.set UND_STACK_SIZE, 0x00000004
.set ABT_STACK_SIZE, 0x00000004
.set FIQ_STACK_SIZE, 0x00000004
.set IRQ_STACK_SIZE, 0X00000400
.set SVC_STACK_SIZE, 0x00000400
/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
.set MODE_USR, 0x10 /* User Mode */
.set MODE_FIQ, 0x11 /* FIQ Mode */
.set MODE_IRQ, 0x12 /* IRQ Mode */
.set MODE_SVC, 0x13 /* Supervisor Mode */
.set MODE_ABT, 0x17 /* Abort Mode */
.set MODE_UND, 0x1B /* Undefined Mode */
.set MODE_SYS, 0x1F /* System Mode */
.equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
.equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */
start:
_start:
_mainCRTStartup:
/* Setup a stack for each mode - note that this only sets up a usable stack
for system/user, SWI and IRQ modes. Also each mode is setup with
interrupts initially disabled. */
ldr r0, .LC6
msr CPSR_c, #MODE_UND|I_BIT|F_BIT /* Undefined Instruction Mode */
mov sp, r0
sub r0, r0, #UND_STACK_SIZE
msr CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Abort Mode */
mov sp, r0
sub r0, r0, #ABT_STACK_SIZE
msr CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* FIQ Mode */
mov sp, r0
sub r0, r0, #FIQ_STACK_SIZE
msr CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */
mov sp, r0
sub r0, r0, #IRQ_STACK_SIZE
msr CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Supervisor Mode */
mov sp, r0
sub r0, r0, #SVC_STACK_SIZE
msr CPSR_c, #MODE_SYS|I_BIT|F_BIT /* System Mode */
mov sp, r0
/* We want to start in supervisor mode. Operation will switch to system
mode when the first task starts. */
msr CPSR_c, #MODE_SVC|I_BIT|F_BIT
/* Clear BSS. */
mov a2, #0 /* Fill value */
mov fp, a2 /* Null frame pointer */
mov r7, a2 /* Null frame pointer for Thumb */
ldr r1, .LC1 /* Start of memory block */
ldr r3, .LC2 /* End of memory block */
subs r3, r3, r1 /* Length of block */
beq .end_clear_loop
mov r2, #0
.clear_loop:
strb r2, [r1], #1
subs r3, r3, #1
bgt .clear_loop
.end_clear_loop:
/* Initialise data. */
ldr r1, .LC3 /* Start of memory block */
ldr r2, .LC4 /* End of memory block */
ldr r3, .LC5
subs r3, r3, r1 /* Length of block */
beq .end_set_loop
.set_loop:
ldrb r4, [r2], #1
strb r4, [r1], #1
subs r3, r3, #1
bgt .set_loop
.end_set_loop:
mov r0, #0 /* no arguments */
mov r1, #0 /* no argv either */
bl main
endless_loop:
b endless_loop
.align 0
.LC1:
.word __bss_beg__
.LC2:
.word __bss_end__
.LC3:
.word __data_beg__
.LC4:
.word __data_beg_src__
.LC5:
.word __data_end__
.LC6:
.word __stack_end__
/* Setup vector table. Note that undf, pabt, dabt, fiq just execute
a null loop. */
.section .startup,"ax"
.code 32
.align 0
b _start /* reset - _start */
ldr pc, _undf /* undefined - _undf */
ldr pc, _swi /* SWI - _swi */
ldr pc, _pabt /* program abort - _pabt */
ldr pc, _dabt /* data abort - _dabt */
nop /* reserved */
ldr pc, [pc,#-0xFF0] /* IRQ - read the VIC */
ldr pc, _fiq /* FIQ - _fiq */
_undf: .word __undf /* undefined */
_swi: .word vPortYieldProcessor /* SWI */
_pabt: .word __pabt /* program abort */
_dabt: .word __dabt /* data abort */
_fiq: .word __fiq /* FIQ */
__undf: b . /* undefined */
__pabt: b . /* program abort */
__dabt: b . /* data abort */
__fiq: b . /* FIQ */

55
FreeRTOS/Demo/ARM7_LPC2106_GCC/lpc2106-ram.ld Normal file
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MEMORY
{
flash : ORIGIN = 0, LENGTH = 120K
ram : ORIGIN = 0x40000000, LENGTH = 64K
}
__stack_end__ = 0x40000000 + 64K - 4;
SECTIONS
{
. = 0;
startup : { *(.startup)} >ram
prog :
{
*(.text)
*(.rodata)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
} >ram
__end_of_text__ = .;
.data :
{
__data_beg__ = .;
__data_beg_src__ = __end_of_text__;
*(.data)
__data_end__ = .;
} >ram
.bss :
{
__bss_beg__ = .;
*(.bss)
} >ram
. = ALIGN(4);
.eh_frame :
{
KEEP (*(.eh_frame))
} > ram
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(32 / 8);
}
. = ALIGN(32 / 8);
_end = .;
_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
PROVIDE (end = .);

55
FreeRTOS/Demo/ARM7_LPC2106_GCC/lpc2106-rom.ld Normal file
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MEMORY
{
flash : ORIGIN = 0, LENGTH = 120K
ram : ORIGIN = 0x40000000, LENGTH = 64K
}
__stack_end__ = 0x40000000 + 64K - 4;
SECTIONS
{
. = 0;
startup : { *(.startup)} >flash
prog :
{
*(.text)
*(.rodata)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
} >flash
__end_of_text__ = .;
.data :
{
__data_beg__ = .;
__data_beg_src__ = __end_of_text__;
*(.data)
__data_end__ = .;
} >ram AT>flash
.bss :
{
__bss_beg__ = .;
*(.bss)
} >ram
. = ALIGN(4);
.eh_frame :
{
KEEP (*(.eh_frame))
} > ram
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(32 / 8);
}
. = ALIGN(32 / 8);
_end = .;
_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
PROVIDE (end = .);

321
FreeRTOS/Demo/ARM7_LPC2106_GCC/lpc210x.h Normal file
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#ifndef lpc210x_h
#define lpc210x_h
/*******************************************************************************
lpc210x.h - Register defs for Philips LPC210X: LPC2104, LPC2105 and LPC2106
THE SOFTWARE IS DELIVERED "AS IS" WITHOUT WARRANTY OR CONDITION OF ANY KIND,
EITHER EXPRESS, IMPLIED OR STATUTORY. THIS INCLUDES WITHOUT LIMITATION ANY
WARRANTY OR CONDITION WITH RESPECT TO MERCHANTABILITY OR FITNESS FOR ANY
PARTICULAR PURPOSE, OR AGAINST THE INFRINGEMENTS OF INTELLECTUAL PROPERTY RIGHTS
OF OTHERS.
This file may be freely used for commercial and non-commercial applications,
including being redistributed with any tools.
If you find a problem with the file, please report it so that it can be fixed.
Created by Sten Larsson (sten_larsson at yahoo com)
Edited by Richard Barry.
*******************************************************************************/
#define REG8 (volatile unsigned char*)
#define REG16 (volatile unsigned short*)
#define REG32 (volatile unsigned int*)
/*##############################################################################
## MISC
##############################################################################*/
/* Constants for data to put in IRQ/FIQ Exception Vectors */
#define VECTDATA_IRQ 0xE51FFFF0 /* LDR PC,[PC,#-0xFF0] */
#define VECTDATA_FIQ /* __TODO */
/*##############################################################################
## VECTORED INTERRUPT CONTROLLER
##############################################################################*/
#define VICIRQStatus (*(REG32 (0xFFFFF000)))
#define VICFIQStatus (*(REG32 (0xFFFFF004)))
#define VICRawIntr (*(REG32 (0xFFFFF008)))
#define VICIntSelect (*(REG32 (0xFFFFF00C)))
#define VICIntEnable (*(REG32 (0xFFFFF010)))
#define VICIntEnClear (*(REG32 (0xFFFFF014)))
#define VICSoftInt (*(REG32 (0xFFFFF018)))
#define VICSoftIntClear (*(REG32 (0xFFFFF01C)))
#define VICProtection (*(REG32 (0xFFFFF020)))
#define VICVectAddr (*(REG32 (0xFFFFF030)))
#define VICDefVectAddr (*(REG32 (0xFFFFF034)))
#define VICVectAddr0 (*(REG32 (0xFFFFF100)))
#define VICVectAddr1 (*(REG32 (0xFFFFF104)))
#define VICVectAddr2 (*(REG32 (0xFFFFF108)))
#define VICVectAddr3 (*(REG32 (0xFFFFF10C)))
#define VICVectAddr4 (*(REG32 (0xFFFFF110)))
#define VICVectAddr5 (*(REG32 (0xFFFFF114)))
#define VICVectAddr6 (*(REG32 (0xFFFFF118)))
#define VICVectAddr7 (*(REG32 (0xFFFFF11C)))
#define VICVectAddr8 (*(REG32 (0xFFFFF120)))
#define VICVectAddr9 (*(REG32 (0xFFFFF124)))
#define VICVectAddr10 (*(REG32 (0xFFFFF128)))
#define VICVectAddr11 (*(REG32 (0xFFFFF12C)))
#define VICVectAddr12 (*(REG32 (0xFFFFF130)))
#define VICVectAddr13 (*(REG32 (0xFFFFF134)))
#define VICVectAddr14 (*(REG32 (0xFFFFF138)))
#define VICVectAddr15 (*(REG32 (0xFFFFF13C)))
#define VICVectCntl0 (*(REG32 (0xFFFFF200)))
#define VICVectCntl1 (*(REG32 (0xFFFFF204)))
#define VICVectCntl2 (*(REG32 (0xFFFFF208)))
#define VICVectCntl3 (*(REG32 (0xFFFFF20C)))
#define VICVectCntl4 (*(REG32 (0xFFFFF210)))
#define VICVectCntl5 (*(REG32 (0xFFFFF214)))
#define VICVectCntl6 (*(REG32 (0xFFFFF218)))
#define VICVectCntl7 (*(REG32 (0xFFFFF21C)))
#define VICVectCntl8 (*(REG32 (0xFFFFF220)))
#define VICVectCntl9 (*(REG32 (0xFFFFF224)))
#define VICVectCntl10 (*(REG32 (0xFFFFF228)))
#define VICVectCntl11 (*(REG32 (0xFFFFF22C)))
#define VICVectCntl12 (*(REG32 (0xFFFFF230)))
#define VICVectCntl13 (*(REG32 (0xFFFFF234)))
#define VICVectCntl14 (*(REG32 (0xFFFFF238)))
#define VICVectCntl15 (*(REG32 (0xFFFFF23C)))
#define VICITCR (*(REG32 (0xFFFFF300)))
#define VICITIP1 (*(REG32 (0xFFFFF304)))
#define VICITIP2 (*(REG32 (0xFFFFF308)))
#define VICITOP1 (*(REG32 (0xFFFFF30C)))
#define VICITOP2 (*(REG32 (0xFFFFF310)))
#define VICPeriphID0 (*(REG32 (0xFFFFFFE0)))
#define VICPeriphID1 (*(REG32 (0xFFFFFFE4)))
#define VICPeriphID2 (*(REG32 (0xFFFFFFE8)))
#define VICPeriphID3 (*(REG32 (0xFFFFFFEC)))
#define VICIntEnClr VICIntEnClear
#define VICSoftIntClr VICSoftIntClear
/*##############################################################################
## PCB - Pin Connect Block
##############################################################################*/
#define PCB_PINSEL0 (*(REG32 (0xE002C000)))
#define PCB_PINSEL1 (*(REG32 (0xE002C004)))
/*##############################################################################
## GPIO - General Purpose I/O
##############################################################################*/
#define GPIO_IOPIN (*(REG32 (0xE0028000))) /* ALTERNATE NAME GPIO = GPIO0 */
#define GPIO_IOSET (*(REG32 (0xE0028004)))
#define GPIO_IODIR (*(REG32 (0xE0028008)))
#define GPIO_IOCLR (*(REG32 (0xE002800C)))
#define GPIO0_IOPIN (*(REG32 (0xE0028000))) /* ALTERNATE NAME GPIO = GPIO0 */
#define GPIO0_IOSET (*(REG32 (0xE0028004)))
#define GPIO0_IODIR (*(REG32 (0xE0028008)))
#define GPIO0_IOCLR (*(REG32 (0xE002800C)))
/*##############################################################################
## UART0 / UART1
##############################################################################*/
/* ---- UART 0 --------------------------------------------- */
#define UART0_RBR (*(REG32 (0xE000C000)))
#define UART0_THR (*(REG32 (0xE000C000)))
#define UART0_IER (*(REG32 (0xE000C004)))
#define UART0_IIR (*(REG32 (0xE000C008)))
#define UART0_FCR (*(REG32 (0xE000C008)))
#define UART0_LCR (*(REG32 (0xE000C00C)))
#define UART0_LSR (*(REG32 (0xE000C014)))
#define UART0_SCR (*(REG32 (0xE000C01C)))
#define UART0_DLL (*(REG32 (0xE000C000)))
#define UART0_DLM (*(REG32 (0xE000C004)))
/* ---- UART 1 --------------------------------------------- */
#define UART1_RBR (*(REG32 (0xE0010000)))
#define UART1_THR (*(REG32 (0xE0010000)))
#define UART1_IER (*(REG32 (0xE0010004)))
#define UART1_IIR (*(REG32 (0xE0010008)))
#define UART1_FCR (*(REG32 (0xE0010008)))
#define UART1_LCR (*(REG32 (0xE001000C)))
#define UART1_LSR (*(REG32 (0xE0010014)))
#define UART1_SCR (*(REG32 (0xE001001C)))
#define UART1_DLL (*(REG32 (0xE0010000)))
#define UART1_DLM (*(REG32 (0xE0010004)))
#define UART1_MCR (*(REG32 (0xE0010010)))
#define UART1_MSR (*(REG32 (0xE0010018)))
/*##############################################################################
## I2C
##############################################################################*/
#define I2C_I2CONSET (*(REG32 (0xE001C000)))
#define I2C_I2STAT (*(REG32 (0xE001C004)))
#define I2C_I2DAT (*(REG32 (0xE001C008)))
#define I2C_I2ADR (*(REG32 (0xE001C00C)))
#define I2C_I2SCLH (*(REG32 (0xE001C010)))
#define I2C_I2SCLL (*(REG32 (0xE001C014)))
#define I2C_I2CONCLR (*(REG32 (0xE001C018)))
/*##############################################################################
## SPI - Serial Peripheral Interface
##############################################################################*/
#define SPI_SPCR (*(REG32 (0xE0020000)))
#define SPI_SPSR (*(REG32 (0xE0020004)))
#define SPI_SPDR (*(REG32 (0xE0020008)))
#define SPI_SPCCR (*(REG32 (0xE002000C)))
#define SPI_SPTCR (*(REG32 (0xE0020010)))
#define SPI_SPTSR (*(REG32 (0xE0020014)))
#define SPI_SPTOR (*(REG32 (0xE0020018)))
#define SPI_SPINT (*(REG32 (0xE002001C)))
/*##############################################################################
## Timer 0 and Timer 1
##############################################################################*/
/* ---- Timer 0 -------------------------------------------- */
#define T0_IR (*(REG32 (0xE0004000)))
#define T0_TCR (*(REG32 (0xE0004004)))
#define T0_TC (*(REG32 (0xE0004008)))
#define T0_PR (*(REG32 (0xE000400C)))
#define T0_PC (*(REG32 (0xE0004010)))
#define T0_MCR (*(REG32 (0xE0004014)))
#define T0_MR0 (*(REG32 (0xE0004018)))
#define T0_MR1 (*(REG32 (0xE000401C)))
#define T0_MR2 (*(REG32 (0xE0004020)))
#define T0_MR3 (*(REG32 (0xE0004024)))
#define T0_CCR (*(REG32 (0xE0004028)))
#define T0_CR0 (*(REG32 (0xE000402C)))
#define T0_CR1 (*(REG32 (0xE0004030)))
#define T0_CR2 (*(REG32 (0xE0004034)))
#define T0_CR3 (*(REG32 (0xE0004038)))
#define T0_EMR (*(REG32 (0xE000403C)))
/* ---- Timer 1 -------------------------------------------- */
#define T1_IR (*(REG32 (0xE0008000)))
#define T1_TCR (*(REG32 (0xE0008004)))
#define T1_TC (*(REG32 (0xE0008008)))
#define T1_PR (*(REG32 (0xE000800C)))
#define T1_PC (*(REG32 (0xE0008010)))
#define T1_MCR (*(REG32 (0xE0008014)))
#define T1_MR0 (*(REG32 (0xE0008018)))
#define T1_MR1 (*(REG32 (0xE000801C)))
#define T1_MR2 (*(REG32 (0xE0008020)))
#define T1_MR3 (*(REG32 (0xE0008024)))
#define T1_CCR (*(REG32 (0xE0008028)))
#define T1_CR0 (*(REG32 (0xE000802C)))
#define T1_CR1 (*(REG32 (0xE0008030)))
#define T1_CR2 (*(REG32 (0xE0008034)))
#define T1_CR3 (*(REG32 (0xE0008038)))
#define T1_EMR (*(REG32 (0xE000803C)))
/*##############################################################################
## PWM
##############################################################################*/
#define PWM_IR (*(REG32 (0xE0014000)))
#define PWM_TCR (*(REG32 (0xE0014004)))
#define PWM_TC (*(REG32 (0xE0014008)))
#define PWM_PR (*(REG32 (0xE001400C)))
#define PWM_PC (*(REG32 (0xE0014010)))
#define PWM_MCR (*(REG32 (0xE0014014)))
#define PWM_MR0 (*(REG32 (0xE0014018)))
#define PWM_MR1 (*(REG32 (0xE001401C)))
#define PWM_MR2 (*(REG32 (0xE0014020)))
#define PWM_MR3 (*(REG32 (0xE0014024)))
#define PWM_MR4 (*(REG32 (0xE0014040)))
#define PWM_MR5 (*(REG32 (0xE0014044)))
#define PWM_MR6 (*(REG32 (0xE0014048)))
#define PWM_EMR (*(REG32 (0xE001403C)))
#define PWM_PCR (*(REG32 (0xE001404C)))
#define PWM_LER (*(REG32 (0xE0014050)))
#define PWM_CCR (*(REG32 (0xE0014028)))
#define PWM_CR0 (*(REG32 (0xE001402C)))
#define PWM_CR1 (*(REG32 (0xE0014030)))
#define PWM_CR2 (*(REG32 (0xE0014034)))
#define PWM_CR3 (*(REG32 (0xE0014038)))
/*##############################################################################
## RTC
##############################################################################*/
/* ---- RTC: Miscellaneous Register Group ------------------ */
#define RTC_ILR (*(REG32 (0xE0024000)))
#define RTC_CTC (*(REG32 (0xE0024004)))
#define RTC_CCR (*(REG32 (0xE0024008)))
#define RTC_CIIR (*(REG32 (0xE002400C)))
#define RTC_AMR (*(REG32 (0xE0024010)))
#define RTC_CTIME0 (*(REG32 (0xE0024014)))
#define RTC_CTIME1 (*(REG32 (0xE0024018)))
#define RTC_CTIME2 (*(REG32 (0xE002401C)))
/* ---- RTC: Timer Control Group --------------------------- */
#define RTC_SEC (*(REG32 (0xE0024020)))
#define RTC_MIN (*(REG32 (0xE0024024)))
#define RTC_HOUR (*(REG32 (0xE0024028)))
#define RTC_DOM (*(REG32 (0xE002402C)))
#define RTC_DOW (*(REG32 (0xE0024030)))
#define RTC_DOY (*(REG32 (0xE0024034)))
#define RTC_MONTH (*(REG32 (0xE0024038)))
#define RTC_YEAR (*(REG32 (0xE002403C)))
/* ---- RTC: Alarm Control Group --------------------------- */
#define RTC_ALSEC (*(REG32 (0xE0024060)))
#define RTC_ALMIN (*(REG32 (0xE0024064)))
#define RTC_ALHOUR (*(REG32 (0xE0024068)))
#define RTC_ALDOM (*(REG32 (0xE002406C)))
#define RTC_ALDOW (*(REG32 (0xE0024070)))
#define RTC_ALDOY (*(REG32 (0xE0024074)))
#define RTC_ALMON (*(REG32 (0xE0024078)))
#define RTC_ALYEAR (*(REG32 (0xE002407C)))
/* ---- RTC: Reference Clock Divider Group ----------------- */
#define RTC_PREINT (*(REG32 (0xE0024080)))
#define RTC_PREFRAC (*(REG32 (0xE0024084)))
/*##############################################################################
## WD - Watchdog
##############################################################################*/
#define WD_WDMOD (*(REG32 (0xE0000000)))
#define WD_WDTC (*(REG32 (0xE0000004)))
#define WD_WDFEED (*(REG32 (0xE0000008)))
#define WD_WDTV (*(REG32 (0xE000000C)))
/*##############################################################################
## System Control Block
##############################################################################*/
#define SCB_EXTINT (*(REG32 (0xE01FC140)))
#define SCB_EXTWAKE (*(REG32 (0xE01FC144)))
#define SCB_MEMMAP (*(REG32 (0xE01FC040)))
#define SCB_PLLCON (*(REG32 (0xE01FC080)))
#define SCB_PLLCFG (*(REG32 (0xE01FC084)))
#define SCB_PLLSTAT (*(REG32 (0xE01FC088)))
#define SCB_PLLFEED (*(REG32 (0xE01FC08C)))
#define SCB_PCON (*(REG32 (0xE01FC0C0)))
#define SCB_PCONP (*(REG32 (0xE01FC0C4)))
#define SCB_VPBDIV (*(REG32 (0xE01FC100)))
/*##############################################################################
## Memory Accelerator Module (MAM)
##############################################################################*/
#define MAM_TIM (*(REG32 (0xE01FC004)))
#define MAM_CR (*(REG32 (0xE01FC000)))
#endif /* lpc210x_h */

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#include "lpc2114.h"

509
FreeRTOS/Demo/ARM7_LPC2106_GCC/main.c Normal file
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/*
FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong? *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, training, latest information,
license and contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool.
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
the code with commercial support, indemnification, and middleware, under
the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
provide a safety engineered and independently SIL3 certified version under
the SafeRTOS brand: http://www.SafeRTOS.com.
*/
/*
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used.
*/
/*
* Creates all the demo application tasks, then starts the scheduler. The WEB
* documentation provides more details of the demo application tasks.
*
* Main.c also creates a task called "Check". This only executes every three
* seconds but has the highest priority so is guaranteed to get processor time.
* Its main function is to check that all the other tasks are still operational.
* Each task (other than the "flash" tasks) maintains a unique count that is
* incremented each time the task successfully completes its function. Should
* any error occur within such a task the count is permanently halted. The
* check task inspects the count of each task to ensure it has changed since
* the last time the check task executed. If all the count variables have
* changed all the tasks are still executing error free, and the check task
* toggles the onboard LED. Should any task contain an error at any time
* the LED toggle rate will change from 3 seconds to 500ms.
*
* To check the operation of the memory allocator the check task also
* dynamically creates a task before delaying, and deletes it again when it
* wakes. If memory cannot be allocated for the new task the call to xTaskCreate
* will fail and an error is signalled. The dynamically created task itself
* allocates and frees memory just to give the allocator a bit more exercise.
*
*/
/*
Changes from V2.4.2
+ The vErrorChecks() task now dynamically creates then deletes a task each
cycle. This tests the operation of the memory allocator.
Changes from V2.5.2
+ vParTestInitialise() is called during initialisation to ensure all the
LED's start off.
*/
/* Standard includes. */
#include <stdlib.h>
#include <string.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo application includes. */
#include "partest.h"
#include "flash.h"
#include "integer.h"
#include "PollQ.h"
#include "comtest2.h"
#include "semtest.h"
#include "flop.h"
#include "dynamic.h"
#include "BlockQ.h"
#include "serial.h"
/*-----------------------------------------------------------*/
/* Constants to setup I/O. */
#define mainTX_ENABLE ( ( unsigned long ) 0x0001 )
#define mainRX_ENABLE ( ( unsigned long ) 0x0004 )
#define mainP0_14 ( ( unsigned long ) 0x4000 )
#define mainJTAG_PORT ( ( unsigned long ) 0x3E0000UL )
/* Constants to setup the PLL. */
#define mainPLL_MUL_4 ( ( unsigned char ) 0x0003 )
#define mainPLL_DIV_1 ( ( unsigned char ) 0x0000 )
#define mainPLL_ENABLE ( ( unsigned char ) 0x0001 )
#define mainPLL_CONNECT ( ( unsigned char ) 0x0003 )
#define mainPLL_FEED_BYTE1 ( ( unsigned char ) 0xaa )
#define mainPLL_FEED_BYTE2 ( ( unsigned char ) 0x55 )
#define mainPLL_LOCK ( ( unsigned long ) 0x0400 )
/* Constants to setup the MAM. */
#define mainMAM_TIM_3 ( ( unsigned char ) 0x03 )
#define mainMAM_MODE_FULL ( ( unsigned char ) 0x02 )
/* Constants to setup the peripheral bus. */
#define mainBUS_CLK_FULL ( ( unsigned char ) 0x01 )
/* Constants for the ComTest tasks. */
#define mainCOM_TEST_BAUD_RATE ( ( unsigned long ) 115200 )
#define mainCOM_TEST_LED ( 3 )
/* Priorities for the demo application tasks. */
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 0 )
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 0 )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
/* The rate at which the on board LED will toggle when there is/is not an
error. */
#define mainNO_ERROR_FLASH_PERIOD ( ( portTickType ) 3000 / portTICK_RATE_MS )
#define mainERROR_FLASH_PERIOD ( ( portTickType ) 500 / portTICK_RATE_MS )
#define mainON_BOARD_LED_BIT ( ( unsigned long ) 0x80 )
/* Constants used by the vMemCheckTask() task. */
#define mainCOUNT_INITIAL_VALUE ( ( unsigned long ) 0 )
#define mainNO_TASK ( 0 )
/* The size of the memory blocks allocated by the vMemCheckTask() task. */
#define mainMEM_CHECK_SIZE_1 ( ( size_t ) 51 )
#define mainMEM_CHECK_SIZE_2 ( ( size_t ) 52 )
#define mainMEM_CHECK_SIZE_3 ( ( size_t ) 151 )
/*-----------------------------------------------------------*/
/*
* The Olimex demo board has a single built in LED. This function simply
* toggles its state.
*/
void prvToggleOnBoardLED( void );
/*
* Checks that all the demo application tasks are still executing without error
* - as described at the top of the file.
*/
static long prvCheckOtherTasksAreStillRunning( unsigned long ulMemCheckTaskCount );
/*
* The task that executes at the highest priority and calls
* prvCheckOtherTasksAreStillRunning(). See the description at the top
* of the file.
*/
static void vErrorChecks( void *pvParameters );
/*
* Dynamically created and deleted during each cycle of the vErrorChecks()
* task. This is done to check the operation of the memory allocator.
* See the top of vErrorChecks for more details.
*/
static void vMemCheckTask( void *pvParameters );
/*
* Configure the processor for use with the Olimex demo board. This includes
* setup for the I/O, system clock, and access timings.
*/
static void prvSetupHardware( void );
/*-----------------------------------------------------------*/
/*
* Starts all the other tasks, then starts the scheduler.
*/
int main( void )
{
/* Setup the hardware for use with the Olimex demo board. */
prvSetupHardware();
/* Start the demo/test application tasks. */
vStartIntegerMathTasks( tskIDLE_PRIORITY );
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartMathTasks( tskIDLE_PRIORITY );
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartDynamicPriorityTasks();
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
/* Start the check task - which is defined in this file. */
xTaskCreate( vErrorChecks, ( signed char * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* Now all the tasks have been started - start the scheduler.
NOTE : Tasks run in system mode and the scheduler runs in Supervisor mode.
The processor MUST be in supervisor mode when vTaskStartScheduler is
called. The demo applications included in the FreeRTOS.org download switch
to supervisor mode prior to main being called. If you are not using one of
these demo application projects then ensure Supervisor mode is used here. */
vTaskStartScheduler();
/* Should never reach here! */
return 0;
}
/*-----------------------------------------------------------*/
static void vErrorChecks( void *pvParameters )
{
portTickType xDelayPeriod = mainNO_ERROR_FLASH_PERIOD;
unsigned long ulMemCheckTaskRunningCount;
xTaskHandle xCreatedTask;
/* The parameters are not used in this function. */
( void ) pvParameters;
/* Cycle for ever, delaying then checking all the other tasks are still
operating without error. If an error is detected then the delay period
is decreased from mainNO_ERROR_FLASH_PERIOD to mainERROR_FLASH_PERIOD so
the on board LED flash rate will increase.
In addition to the standard tests the memory allocator is tested through
the dynamic creation and deletion of a task each cycle. Each time the
task is created memory must be allocated for its stack. When the task is
deleted this memory is returned to the heap. If the task cannot be created
then it is likely that the memory allocation failed. */
for( ;; )
{
/* Dynamically create a task - passing ulMemCheckTaskRunningCount as a
parameter. */
ulMemCheckTaskRunningCount = mainCOUNT_INITIAL_VALUE;
xCreatedTask = mainNO_TASK;
if( xTaskCreate( vMemCheckTask, ( signed char * ) "MEM_CHECK", configMINIMAL_STACK_SIZE, ( void * ) &ulMemCheckTaskRunningCount, tskIDLE_PRIORITY, &xCreatedTask ) != pdPASS )
{
/* Could not create the task - we have probably run out of heap. */
xDelayPeriod = mainERROR_FLASH_PERIOD;
}
/* Delay until it is time to execute again. */
vTaskDelay( xDelayPeriod );
/* Delete the dynamically created task. */
if( xCreatedTask != mainNO_TASK )
{
vTaskDelete( xCreatedTask );
}
/* Check all the standard demo application tasks are executing without
error. ulMemCheckTaskRunningCount is checked to ensure it was
modified by the task just deleted. */
if( prvCheckOtherTasksAreStillRunning( ulMemCheckTaskRunningCount ) != pdPASS )
{
/* An error has been detected in one of the tasks - flash faster. */
xDelayPeriod = mainERROR_FLASH_PERIOD;
}
prvToggleOnBoardLED();
}
}
/*-----------------------------------------------------------*/
static void prvSetupHardware( void )
{
#ifdef RUN_FROM_RAM
/* Remap the interrupt vectors to RAM if we are are running from RAM. */
SCB_MEMMAP = 2;
#endif
/* Configure the RS2332 pins. All other pins remain at their default of 0. */
PCB_PINSEL0 |= mainTX_ENABLE;
PCB_PINSEL0 |= mainRX_ENABLE;
/* Set all GPIO to output other than the P0.14 (BSL), and the JTAG pins.
The JTAG pins are left as input as I'm not sure what will happen if the
Wiggler is connected after powerup - not that it would be a good idea to
do that anyway. */
GPIO_IODIR = ~( mainP0_14 + mainJTAG_PORT );
/* Setup the PLL to multiply the XTAL input by 4. */
SCB_PLLCFG = ( mainPLL_MUL_4 | mainPLL_DIV_1 );
/* Activate the PLL by turning it on then feeding the correct sequence of
bytes. */
SCB_PLLCON = mainPLL_ENABLE;
SCB_PLLFEED = mainPLL_FEED_BYTE1;
SCB_PLLFEED = mainPLL_FEED_BYTE2;
/* Wait for the PLL to lock... */
while( !( SCB_PLLSTAT & mainPLL_LOCK ) );
/* ...before connecting it using the feed sequence again. */
SCB_PLLCON = mainPLL_CONNECT;
SCB_PLLFEED = mainPLL_FEED_BYTE1;
SCB_PLLFEED = mainPLL_FEED_BYTE2;
/* Setup and turn on the MAM. Three cycle access is used due to the fast
PLL used. It is possible faster overall performance could be obtained by
tuning the MAM and PLL settings. */
MAM_TIM = mainMAM_TIM_3;
MAM_CR = mainMAM_MODE_FULL;
/* Setup the peripheral bus to be the same as the PLL output. */
SCB_VPBDIV = mainBUS_CLK_FULL;
/* Initialise LED outputs. */
vParTestInitialise();
}
/*-----------------------------------------------------------*/
void prvToggleOnBoardLED( void )
{
unsigned long ulState;
ulState = GPIO0_IOPIN;
if( ulState & mainON_BOARD_LED_BIT )
{
GPIO_IOCLR = mainON_BOARD_LED_BIT;
}
else
{
GPIO_IOSET = mainON_BOARD_LED_BIT;
}
}
/*-----------------------------------------------------------*/
static long prvCheckOtherTasksAreStillRunning( unsigned long ulMemCheckTaskCount )
{
long lReturn = ( long ) pdPASS;
/* Check all the demo tasks (other than the flash tasks) to ensure
that they are all still running, and that none of them have detected
an error. */
if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreComTestTasksStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xArePollingQueuesStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreMathsTaskStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
lReturn = ( long ) pdFAIL;
}
if( ulMemCheckTaskCount == mainCOUNT_INITIAL_VALUE )
{
/* The vMemCheckTask did not increment the counter - it must
have failed. */
lReturn = ( long ) pdFAIL;
}
return lReturn;
}
/*-----------------------------------------------------------*/
static void vMemCheckTask( void *pvParameters )
{
unsigned long *pulMemCheckTaskRunningCounter;
void *pvMem1, *pvMem2, *pvMem3;
static long lErrorOccurred = pdFALSE;
/* This task is dynamically created then deleted during each cycle of the
vErrorChecks task to check the operation of the memory allocator. Each time
the task is created memory is allocated for the stack and TCB. Each time
the task is deleted this memory is returned to the heap. This task itself
exercises the allocator by allocating and freeing blocks.
The task executes at the idle priority so does not require a delay.
pulMemCheckTaskRunningCounter is incremented each cycle to indicate to the
vErrorChecks() task that this task is still executing without error. */
pulMemCheckTaskRunningCounter = ( unsigned long * ) pvParameters;
for( ;; )
{
if( lErrorOccurred == pdFALSE )
{
/* We have never seen an error so increment the counter. */
( *pulMemCheckTaskRunningCounter )++;
}
/* Allocate some memory - just to give the allocator some extra
exercise. This has to be in a critical section to ensure the
task does not get deleted while it has memory allocated. */
vTaskSuspendAll();
{
pvMem1 = pvPortMalloc( mainMEM_CHECK_SIZE_1 );
if( pvMem1 == NULL )
{
lErrorOccurred = pdTRUE;
}
else
{
memset( pvMem1, 0xaa, mainMEM_CHECK_SIZE_1 );
vPortFree( pvMem1 );
}
}
xTaskResumeAll();
/* Again - with a different size block. */
vTaskSuspendAll();
{
pvMem2 = pvPortMalloc( mainMEM_CHECK_SIZE_2 );
if( pvMem2 == NULL )
{
lErrorOccurred = pdTRUE;
}
else
{
memset( pvMem2, 0xaa, mainMEM_CHECK_SIZE_2 );
vPortFree( pvMem2 );
}
}
xTaskResumeAll();
/* Again - with a different size block. */
vTaskSuspendAll();
{
pvMem3 = pvPortMalloc( mainMEM_CHECK_SIZE_3 );
if( pvMem3 == NULL )
{
lErrorOccurred = pdTRUE;
}
else
{
memset( pvMem3, 0xaa, mainMEM_CHECK_SIZE_3 );
vPortFree( pvMem3 );
}
}
xTaskResumeAll();
}
}

6
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set USE_THUMB_MODE=NO
set DEBUG=-g
set OPTIM=-O0
set RUN_MODE=RUN_FROM_RAM
set LDSCRIPT=lpc2106-ram.ld
make

6
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set USE_THUMB_MODE=YES
set DEBUG=-g
set OPTIM=-O0
set RUN_MODE=RUN_FROM_RAM
set LDSCRIPT=lpc2106-ram.ld
make

18
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Use one of the following four batch files to build the demo application:
+ rom_arm.bat
Creates an ARM mode release build suitable for programming into flash.
+ ram_arm.bat
Creates an ARM mode debug build suitable for running from RAM.
+ rom_thumb.bat
Creates a THUMB mode release build suitable for programming into flash.
+ ram_thumb.bat
Creates a THUMB mode debug build suitable for running from RAM.

6
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set USE_THUMB_MODE=NO
set DEBUG=
set OPTIM=-O3
set RUN_MODE=RUN_FROM_ROM
set LDSCRIPT=lpc2106-rom.ld
make

6
FreeRTOS/Demo/ARM7_LPC2106_GCC/rom_thumb.bat Normal file
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set USE_THUMB_MODE=YES
set DEBUG=
set OPTIM=-O3
set RUN_MODE=RUN_FROM_ROM
set LDSCRIPT=lpc2106-rom.ld
make

297
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/*
FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong? *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, training, latest information,
license and contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool.
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
the code with commercial support, indemnification, and middleware, under
the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
provide a safety engineered and independently SIL3 certified version under
the SafeRTOS brand: http://www.SafeRTOS.com.
*/
/*
Changes from V2.4.0
+ Made serial ISR handling more complete and robust.
Changes from V2.4.1
+ Split serial.c into serial.c and serialISR.c. serial.c can be
compiled using ARM or THUMB modes. serialISR.c must always be
compiled in ARM mode.
+ Another small change to cSerialPutChar().
Changed from V2.5.1
+ In cSerialPutChar() an extra check is made to ensure the post to
the queue was successful if then attempting to retrieve the posted
character.
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
This file contains all the serial port components that can be compiled to
either ARM or THUMB mode. Components that must be compiled to ARM mode are
contained in serialISR.c.
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application includes. */
#include "serial.h"
/*-----------------------------------------------------------*/
/* Constants to setup and access the UART. */
#define serDLAB ( ( unsigned char ) 0x80 )
#define serENABLE_INTERRUPTS ( ( unsigned char ) 0x03 )
#define serNO_PARITY ( ( unsigned char ) 0x00 )
#define ser1_STOP_BIT ( ( unsigned char ) 0x00 )
#define ser8_BIT_CHARS ( ( unsigned char ) 0x03 )
#define serFIFO_ON ( ( unsigned char ) 0x01 )
#define serCLEAR_FIFO ( ( unsigned char ) 0x06 )
#define serWANTED_CLOCK_SCALING ( ( unsigned long ) 16 )
/* Constants to setup and access the VIC. */
#define serUART0_VIC_CHANNEL ( ( unsigned long ) 0x0006 )
#define serUART0_VIC_CHANNEL_BIT ( ( unsigned long ) 0x0040 )
#define serUART0_VIC_ENABLE ( ( unsigned long ) 0x0020 )
#define serCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )
#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
#define serHANDLE ( ( xComPortHandle ) 1 )
#define serNO_BLOCK ( ( portTickType ) 0 )
/*-----------------------------------------------------------*/
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
/*-----------------------------------------------------------*/
/* Communication flag between the interrupt service routine and serial API. */
static volatile long *plTHREEmpty;
/*
* The queues are created in serialISR.c as they are used from the ISR.
* Obtain references to the queues and THRE Empty flag.
*/
extern void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx, long volatile **pplTHREEmptyFlag );
/*-----------------------------------------------------------*/
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
unsigned long ulDivisor, ulWantedClock;
xComPortHandle xReturn = serHANDLE;
extern void ( vUART_ISR_Wrapper )( void );
/* The queues are used in the serial ISR routine, so are created from
serialISR.c (which is always compiled to ARM mode. */
vSerialISRCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx, &plTHREEmpty );
if(
( xRxedChars != serINVALID_QUEUE ) &&
( xCharsForTx != serINVALID_QUEUE ) &&
( ulWantedBaud != ( unsigned long ) 0 )
)
{
portENTER_CRITICAL();
{
/* Setup the baud rate: Calculate the divisor value. */
ulWantedClock = ulWantedBaud * serWANTED_CLOCK_SCALING;
ulDivisor = configCPU_CLOCK_HZ / ulWantedClock;
/* Set the DLAB bit so we can access the divisor. */
UART0_LCR |= serDLAB;
/* Setup the divisor. */
UART0_DLL = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
ulDivisor >>= 8;
UART0_DLM = ( unsigned char ) ( ulDivisor & ( unsigned long ) 0xff );
/* Turn on the FIFO's and clear the buffers. */
UART0_FCR = ( serFIFO_ON | serCLEAR_FIFO );
/* Setup transmission format. */
UART0_LCR = serNO_PARITY | ser1_STOP_BIT | ser8_BIT_CHARS;
/* Setup the VIC for the UART. */
VICIntSelect &= ~( serUART0_VIC_CHANNEL_BIT );
VICIntEnable |= serUART0_VIC_CHANNEL_BIT;
VICVectAddr1 = ( long ) vUART_ISR_Wrapper;
VICVectCntl1 = serUART0_VIC_CHANNEL | serUART0_VIC_ENABLE;
/* Enable UART0 interrupts. */
UART0_IER |= serENABLE_INTERRUPTS;
}
portEXIT_CRITICAL();
}
else
{
xReturn = ( xComPortHandle ) 0;
}
return xReturn;
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )
{
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
/* Get the next character from the buffer. Return false if no characters
are available, or arrive before xBlockTime expires. */
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
{
return pdTRUE;
}
else
{
return pdFALSE;
}
}
/*-----------------------------------------------------------*/
void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )
{
signed char *pxNext;
/* NOTE: This implementation does not handle the queue being full as no
block time is used! */
/* The port handle is not required as this driver only supports UART0. */
( void ) pxPort;
( void ) usStringLength;
/* Send each character in the string, one at a time. */
pxNext = ( signed char * ) pcString;
while( *pxNext )
{
xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
pxNext++;
}
}
/*-----------------------------------------------------------*/
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )
{
signed portBASE_TYPE xReturn;
/* This demo driver only supports one port so the parameter is not used. */
( void ) pxPort;
portENTER_CRITICAL();
{
/* Is there space to write directly to the UART? */
if( *plTHREEmpty == ( long ) pdTRUE )
{
/* We wrote the character directly to the UART, so was
successful. */
*plTHREEmpty = pdFALSE;
UART0_THR = cOutChar;
xReturn = pdPASS;
}
else
{
/* We cannot write directly to the UART, so queue the character.
Block for a maximum of xBlockTime if there is no space in the
queue. */
xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
/* Depending on queue sizing and task prioritisation: While we
were blocked waiting to post interrupts were not disabled. It is
possible that the serial ISR has emptied the Tx queue, in which
case we need to start the Tx off again. */
if( ( *plTHREEmpty == ( long ) pdTRUE ) && ( xReturn == pdPASS ) )
{
xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
*plTHREEmpty = pdFALSE;
UART0_THR = cOutChar;
}
}
}
portEXIT_CRITICAL();
return xReturn;
}
/*-----------------------------------------------------------*/
void vSerialClose( xComPortHandle xPort )
{
/* Not supported as not required by the demo application. */
( void ) xPort;
}
/*-----------------------------------------------------------*/

205
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@ -0,0 +1,205 @@
/*
FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong? *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, training, latest information,
license and contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool.
Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
the code with commercial support, indemnification, and middleware, under
the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
provide a safety engineered and independently SIL3 certified version under
the SafeRTOS brand: http://www.SafeRTOS.com.
*/
/*
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
This file contains all the serial port components that must be compiled
to ARM mode. The components that can be compiled to either ARM or THUMB
mode are contained in serial.c.
*/
/* Standard includes. */
#include <stdlib.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "queue.h"
#include "task.h"
/* Demo application includes. */
#include "serial.h"
/*-----------------------------------------------------------*/
/* Constant to access the VIC. */
#define serCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 )
/* Constants to determine the ISR source. */
#define serSOURCE_THRE ( ( unsigned char ) 0x02 )
#define serSOURCE_RX_TIMEOUT ( ( unsigned char ) 0x0c )
#define serSOURCE_ERROR ( ( unsigned char ) 0x06 )
#define serSOURCE_RX ( ( unsigned char ) 0x04 )
#define serINTERRUPT_SOURCE_MASK ( ( unsigned char ) 0x0f )
/* Queues used to hold received characters, and characters waiting to be
transmitted. */
static xQueueHandle xRxedChars;
static xQueueHandle xCharsForTx;
static volatile long lTHREEmpty;
/*-----------------------------------------------------------*/
/*
* The queues are created in serialISR.c as they are used from the ISR.
* Obtain references to the queues and THRE Empty flag.
*/
void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx, long volatile **pplTHREEmptyFlag );
/* UART0 interrupt service routine entry point. */
void vUART_ISR_Wrapper( void ) __attribute__ ((naked));
/* UART0 interrupt service routine handler. */
void vUART_ISR_Handler( void ) __attribute__ ((noinline));
/*-----------------------------------------------------------*/
void vSerialISRCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars,
xQueueHandle *pxCharsForTx, long volatile **pplTHREEmptyFlag )
{
/* Create the queues used to hold Rx and Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
/* Pass back a reference to the queues so the serial API file can
post/receive characters. */
*pxRxedChars = xRxedChars;
*pxCharsForTx = xCharsForTx;
/* Initialise the THRE empty flag - and pass back a reference. */
lTHREEmpty = ( long ) pdTRUE;
*pplTHREEmptyFlag = &lTHREEmpty;
}
/*-----------------------------------------------------------*/
void vUART_ISR_Wrapper( void )
{
/* Save the context of the interrupted task. */
portSAVE_CONTEXT();
/* Call the handler. This must be a separate function from the wrapper
to ensure the correct stack frame is set up. */
__asm volatile ("bl vUART_ISR_Handler");
/* Restore the context of whichever task is going to run next. */
portRESTORE_CONTEXT();
}
/*-----------------------------------------------------------*/
void vUART_ISR_Handler( void )
{
signed char cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* What caused the interrupt? */
switch( UART0_IIR & serINTERRUPT_SOURCE_MASK )
{
case serSOURCE_ERROR : /* Not handling this, but clear the interrupt. */
cChar = UART0_LSR;
break;
case serSOURCE_THRE : /* The THRE is empty. If there is another
character in the Tx queue, send it now. */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
UART0_THR = cChar;
}
else
{
/* There are no further characters
queued to send so we can indicate
that the THRE is available. */
lTHREEmpty = pdTRUE;
}
break;
case serSOURCE_RX_TIMEOUT :
case serSOURCE_RX : /* A character was received. Place it in
the queue of received characters. */
cChar = UART0_RBR;
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
break;
default : /* There is nothing to do, leave the ISR. */
break;
}
if( xHigherPriorityTaskWoken )
{
portYIELD_FROM_ISR();
}
/* Clear the ISR in the VIC. */
VICVectAddr = serCLEAR_VIC_INTERRUPT;
}