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Update to use new xQueueSendFromISR() and xSemaphoreGiveFromISR() function semantics.

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This commit is contained in:
Richard Barry 2008-04-12 23:32:18 +00:00
parent 7eb7201b46
commit f4dd20dffc
54 changed files with 266 additions and 251 deletions
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11
Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c
View file

@ -112,7 +112,7 @@ void vUART_ISR_Handler( void )
{
/* Now we can declare the local variables. These must be static. */
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
unsigned portLONG ulStatus;
/* What caused the interrupt? */
@ -122,7 +122,7 @@ unsigned portLONG ulStatus;
{
/* The interrupt was caused by the THR becoming empty. Are there any
more characters to transmit? */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* A character was retrieved from the queue so can be sent to the
THR now. */
@ -140,10 +140,7 @@ unsigned portLONG ulStatus;
/* The interrupt was caused by the receiver getting data. */
cChar = AT91C_BASE_US0->US_RHR;
if (xQueueSendFromISR(xRxedChars, &cChar, pdFALSE))
{
xTaskWokenByRx = pdTRUE;
}
xQueueSendFromISR(xRxedChars, &cChar, &xHigherPriorityTaskWoken);
}
/* Acknowledge the interrupt at AIC level... */
@ -153,7 +150,7 @@ unsigned portLONG ulStatus;
ensure that the unblocked task is the task that executes when the interrupt
completes if the unblocked task has a priority higher than the interrupted
task. */
if( xTaskWokenByTx || xTaskWokenByRx )
if( xHigherPriorityTaskWoken )
{
portYIELD_FROM_ISR();
}

114
Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c
View file

@ -19,7 +19,7 @@
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS.org, without being obliged to provide
the source code for any proprietary components. See the licensing section
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
@ -37,26 +37,26 @@
Please ensure to read the configuration and relevant port sections of the
online documentation.
http://www.FreeRTOS.org - Documentation, latest information, license and
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
Sample interrupt driven USB device driver. This is a minimal implementation
Sample interrupt driven USB device driver. This is a minimal implementation
for demonstration only. Although functional, it is not a full and compliant
implementation.
implementation.
The USB device enumerates as a simple 3 axis joystick, and once configured
transmits 3 axis of data which can be viewed from the USB host machine.
This file implements the USB interrupt service routine, and a demo FreeRTOS
task. The interrupt service routine handles the USB hardware - taking a
This file implements the USB interrupt service routine, and a demo FreeRTOS
task. The interrupt service routine handles the USB hardware - taking a
snapshot of the USB status at the point of the interrupt. The task receives
the status information from the interrupt for processing at the task level.
@ -67,7 +67,7 @@
Changes from V2.5.5
+ Descriptors that have a length that is an exact multiple of usbFIFO_LENGTH
can now be transmitted. To this end an extra parameter has been
can now be transmitted. To this end an extra parameter has been
added to the prvSendControlData() function, and the state
eSENDING_EVEN_DESCRIPTOR has been introduced. Thanks to Scott Miller for
assisting with this contribution.
@ -127,7 +127,7 @@
#define usbINTERFACE_STRING ( 4 )
/* Data indexes for reading the request from the xISRStatus.ucFifoData[]
into xUSB_REQUEST. The data order is designed for speed - so looks a
into xUSB_REQUEST. The data order is designed for speed - so looks a
little odd. */
#define usbREQUEST_TYPE_INDEX ( 7 )
#define usbREQUEST_INDEX ( 6 )
@ -176,7 +176,7 @@ typedef struct X_ISR_STATUS
} xISRStatus;
/* Structure used to hold the received requests. */
typedef struct
typedef struct
{
unsigned portCHAR ucReqType;
unsigned portCHAR ucRequest;
@ -205,7 +205,7 @@ typedef struct
/*-----------------------------------------------------------*/
/*
/*
* The USB interrupt service routine. This takes a snapshot of the USB
* device at the time of the interrupt, clears the interrupts, and posts
* the data to the USB processing task.
@ -219,7 +219,7 @@ __arm void vUSB_ISR( void );
static void prvResetEndPoints( void );
/*
* Setup the USB hardware, install the interrupt service routine and
* Setup the USB hardware, install the interrupt service routine and
* initialise all the state variables.
*/
static void vInitUSBInterface( void );
@ -229,17 +229,17 @@ static void vInitUSBInterface( void );
*/
static void prvProcessEndPoint0Interrupt( xISRStatus *pxMessage );
/*
* For simplicity requests are separated into device, interface, class
/*
* For simplicity requests are separated into device, interface, class
* interface and end point requests.
*
* Decode and handle standard device requests originating on the control
* end point.
* end point.
*/
static void prvHandleStandardDeviceRequest( xUSB_REQUEST *pxRequest );
/*
* For simplicity requests are separated into device, interface, class
* For simplicity requests are separated into device, interface, class
* interface and end point requests.
*
* Decode and handle standard interface requests originating on the control
@ -248,7 +248,7 @@ static void prvHandleStandardDeviceRequest( xUSB_REQUEST *pxRequest );
static void prvHandleStandardInterfaceRequest( xUSB_REQUEST *pxRequest );
/*
* For simplicity requests are separated into device, interface, class
* For simplicity requests are separated into device, interface, class
* interface and end point requests.
*
* Decode and handle standard end point requests originating on the control
@ -257,7 +257,7 @@ static void prvHandleStandardInterfaceRequest( xUSB_REQUEST *pxRequest );
static void prvHandleStandardEndPointRequest( xUSB_REQUEST *pxRequest );
/*
* For simplicity requests are separated into device, interface, class
* For simplicity requests are separated into device, interface, class
* interface and end point requests.
*
* Decode and handle the class interface requests.
@ -277,7 +277,7 @@ static void prvSendControlData( unsigned portCHAR *pucData, unsigned portSHORT u
/*
* Examine the Tx buffer to see if there is any more data to be transmitted.
*
*
* If there is data to be transmitted then send the next segment. A segment
* can have a maximum of 8 bytes (this is defined as the maximum for the end
* point by the descriptor). The final segment may be less than 8 bytes if
@ -288,36 +288,36 @@ static void prvSendNextSegment( void );
/*
* A stall condition is forced each time the host makes a request that is not
* supported by this minimal implementation.
*
*
* A stall is forced by setting the appropriate bit in the end points control
* and status register.
* and status register.
*/
static void prvSendStall( void );
/*
* A NULL (or zero length packet) is transmitted in acknowledge the reception
* A NULL (or zero length packet) is transmitted in acknowledge the reception
* of certain events from the host.
*/
static void prvUSBTransmitNull( void );
/*
* When the host requests a descriptor this function is called to determine
/*
* When the host requests a descriptor this function is called to determine
* which descriptor is being requested and start its transmission.
*/
static void prvGetStandardInterfaceDescriptor( xUSB_REQUEST *pxRequest );
/*
* This demo USB device enumerates as a simple 3 axis joystick. Once
* This demo USB device enumerates as a simple 3 axis joystick. Once
* configured this function is periodically called to generate some sample
* joystick data.
*
* The x and y axis are made to move in a square. The z axis is made to
* The x and y axis are made to move in a square. The z axis is made to
* repeatedly increment up to its maximum.
*/
static void prvTransmitSampleValues( void );
/*
* The created task to handle the USB demo functionality.
* The created task to handle the USB demo functionality.
*/
void vUSBDemoTask( void *pvParameters );
@ -343,7 +343,7 @@ const portCHAR pxLanguageStringDescriptor[] =
0x09, 0x04
};
const portCHAR pxManufacturerStringDescriptor[] =
const portCHAR pxManufacturerStringDescriptor[] =
{
18,
usbDESCRIPTOR_TYPE_STRING,
@ -358,7 +358,7 @@ const portCHAR pxManufacturerStringDescriptor[] =
'S', 0x00
};
const portCHAR pxProductStringDescriptor[] =
const portCHAR pxProductStringDescriptor[] =
{
44,
usbDESCRIPTOR_TYPE_STRING,
@ -386,7 +386,7 @@ const portCHAR pxProductStringDescriptor[] =
'k', 0x00
};
const portCHAR pxConfigurationStringDescriptor[] =
const portCHAR pxConfigurationStringDescriptor[] =
{
38,
usbDESCRIPTOR_TYPE_STRING,
@ -411,7 +411,7 @@ const portCHAR pxConfigurationStringDescriptor[] =
'e', 0x00
};
const portCHAR pxInterfaceStringDescriptor[] =
const portCHAR pxInterfaceStringDescriptor[] =
{
30,
usbDESCRIPTOR_TYPE_STRING,
@ -453,7 +453,7 @@ const portCHAR pxReportDescriptor[] =
0xc0 /* END_COLLECTION */
};
const char pxDeviceDescriptor[] =
const char pxDeviceDescriptor[] =
{
/* Device descriptor */
0x12, /* bLength */
@ -526,7 +526,7 @@ static xISRStatus xISRMessages[ usbQUEUE_LENGTH + 1 ];
static xTX_MESSAGE pxCharsForTx;
/* Queue used to pass messages between the ISR and the task. */
static xQueueHandle xUSBInterruptQueue;
static xQueueHandle xUSBInterruptQueue;
/* ISR entry has to be written in the asm file as we want a context switch
to occur from within the ISR. See the port documentation on the FreeRTOS.org
@ -535,9 +535,9 @@ extern void vUSBISREntry( void );
/*-----------------------------------------------------------*/
/* Macros to manipulate the control and status registers. These registers
cannot be accessed using a direct read modify write operation outside of the
ISR as some bits are left unchanged by writing with a 0, and some are left
/* Macros to manipulate the control and status registers. These registers
cannot be accessed using a direct read modify write operation outside of the
ISR as some bits are left unchanged by writing with a 0, and some are left
unchanged by writing with a 1. */
#define usbINT_CLEAR_MASK (AT91C_UDP_TXCOMP | AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP | AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 )
@ -576,7 +576,7 @@ unchanged by writing with a 1. */
__arm void vUSB_ISR( void )
{
portBASE_TYPE xTaskWokenByPost = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
static volatile unsigned portLONG ulNextMessage = 0;
xISRStatus *pxMessage;
unsigned portLONG ulTemp, ulRxBytes;
@ -595,7 +595,7 @@ unsigned portLONG ulTemp, ulRxBytes;
cleared separately as it does not appear in the mask register. */
AT91C_BASE_UDP->UDP_ICR = AT91C_BASE_UDP->UDP_IMR | AT91C_UDP_ENDBUSRES;
/* If there are bytes in the FIFO then we have to retrieve them here.
/* If there are bytes in the FIFO then we have to retrieve them here.
Ideally this would be done at the task level. However we need to clear the
RXSETUP interrupt before leaving the ISR, and this may cause the data in
the FIFO to be overwritten. Also the DIR bit has to be changed before the
@ -606,7 +606,7 @@ unsigned portLONG ulTemp, ulRxBytes;
ulRxBytes = ulTemp >> 16;
ulRxBytes &= usbRX_COUNT_MASK;
/* With this minimal implementation we are only interested in receiving
/* With this minimal implementation we are only interested in receiving
setup bytes on the control end point. */
if( ( ulRxBytes > 0 ) && ( ulTemp & AT91C_UDP_RXSETUP ) )
{
@ -635,11 +635,11 @@ unsigned portLONG ulTemp, ulRxBytes;
/* The message now contains the entire state and optional data from
the USB interrupt. This can now be posted on the Rx queue ready for
processing at the task level. */
xTaskWokenByPost = xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, xTaskWokenByPost );
xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
/* We may want to switch to the USB task, if this message has made
it the highest priority task that is ready to execute. */
portEND_SWITCHING_ISR( xTaskWokenByPost );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
/* Clear the AIC ready for the next interrupt. */
AT91C_BASE_AIC->AIC_EOICR = 0;
@ -658,7 +658,7 @@ xISRStatus *pxMessage;
vInitUSBInterface();
portEXIT_CRITICAL();
/* Process interrupts as they arrive. The ISR takes a snapshot of the
/* Process interrupts as they arrive. The ISR takes a snapshot of the
interrupt status then posts the information on this queue for processing
at the task level. This simple demo implementation only processes
a few interrupt sources. */
@ -825,7 +825,7 @@ static void prvProcessEndPoint0Interrupt( xISRStatus *pxMessage )
{
if( pxMessage->ulCSR0 & AT91C_UDP_RX_DATA_BK0 )
{
/* We only expect to receive zero length data here as ACK's.
/* We only expect to receive zero length data here as ACK's.
Set the data pointer to the end of the current Tx packet to
ensure we don't send out any more data. */
pxCharsForTx.ulNextCharIndex = pxCharsForTx.ulTotalDataLength;
@ -910,9 +910,9 @@ static void prvProcessEndPoint0Interrupt( xISRStatus *pxMessage )
xRequest.usLength <<= 8;
xRequest.usLength |= pxMessage->ucFifoData[ usbLENGTH_LOW_BYTE ];
/* Manipulate the ucRequestType and the ucRequest parameters to
generate a zero based request selection. This is just done to
break up the requests into subsections for clarity. The
/* Manipulate the ucRequestType and the ucRequest parameters to
generate a zero based request selection. This is just done to
break up the requests into subsections for clarity. The
alternative would be to have more huge switch statement that would
be difficult to optimise. */
ucRequest = ( ( xRequest.ucReqType & 0x60 ) >> 3 );
@ -1040,8 +1040,8 @@ unsigned portSHORT usStatus = 0;
case usbSET_CONFIGURATION_REQUEST:
/* Acknowledge the SET_CONFIGURATION, but (according to the manual)
we cannot actually move to the configured state until we get a
/* Acknowledge the SET_CONFIGURATION, but (according to the manual)
we cannot actually move to the configured state until we get a
TXCOMP interrupt from this NULL packet. Therefore we just remember the
config and set our state so we know we have received the go ahead. */
ucUSBConfig = ( unsigned portCHAR ) ( pxRequest->usValue & 0xff );
@ -1109,7 +1109,7 @@ unsigned portSHORT usStatus = 0;
break;
case usbGET_DESCRIPTOR_REQUEST:
prvGetStandardInterfaceDescriptor( pxRequest );
prvGetStandardInterfaceDescriptor( pxRequest );
break;
/* This minimal implementation does not respond to these. */
@ -1130,7 +1130,7 @@ static void prvHandleStandardEndPointRequest( xUSB_REQUEST *pxRequest )
{
/* This minimal implementation does not expect to respond to these. */
case usbGET_STATUS_REQUEST:
case usbCLEAR_FEATURE_REQUEST:
case usbCLEAR_FEATURE_REQUEST:
case usbSET_FEATURE_REQUEST:
default:
@ -1164,7 +1164,7 @@ volatile unsigned portLONG ulTemp;
/* Setup the PIO for the USB pull up resistor. */
AT91F_PIO_CfgOutput(AT91C_BASE_PIOA,AT91C_PIO_PA16);
/* Start without the pullup - this will get set at the end of this
/* Start without the pullup - this will get set at the end of this
function. */
AT91F_PIO_SetOutput( AT91C_BASE_PIOA, AT91C_PIO_PA16 );
@ -1181,7 +1181,7 @@ volatile unsigned portLONG ulTemp;
/* Enable the transceiver. */
AT91C_UDP_TRANSCEIVER_ENABLE = 0;
/* Enable the USB interrupts - other interrupts get enabled as the
/* Enable the USB interrupts - other interrupts get enabled as the
enumeration process progresses. */
AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_UDP, usbINTERRUPT_PRIORITY, AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE, ( void (*)( void ) ) vUSBISREntry );
AT91F_AIC_EnableIt( AT91C_BASE_AIC, AT91C_ID_UDP );
@ -1201,7 +1201,7 @@ static void prvSendControlData( unsigned portCHAR *pucData, unsigned portSHORT u
}
else if( ( ulLengthToSend < ( unsigned portLONG ) usRequestedLength ) && lSendingDescriptor )
{
/* We are sending a descriptor. If the descriptor is an exact
/* We are sending a descriptor. If the descriptor is an exact
multiple of the FIFO length then it will have to be terminated
with a NULL packet. Set the state to indicate this if
necessary. */
@ -1218,12 +1218,12 @@ static void prvSendControlData( unsigned portCHAR *pucData, unsigned portSHORT u
(if it is greater than 8 bytes in length). */
memcpy( pxCharsForTx.ucTxBuffer, pucData, ulLengthToSend );
/* Reinitialise the buffer index so we start sending from the start of
/* Reinitialise the buffer index so we start sending from the start of
the data. */
pxCharsForTx.ulTotalDataLength = ulLengthToSend;
pxCharsForTx.ulNextCharIndex = ( unsigned portLONG ) 0;
/* Send the first 8 bytes now. The rest will get sent in response to
/* Send the first 8 bytes now. The rest will get sent in response to
TXCOMP interrupts. */
prvSendNextSegment();
}
@ -1275,7 +1275,7 @@ volatile unsigned portLONG ulNextLength, ulStatus, ulLengthLeftToSend;
}
else
{
/* There is no data to send. If we were sending a descriptor and the
/* There is no data to send. If we were sending a descriptor and the
descriptor was an exact multiple of the max packet size then we need
to send a null to terminate the transmission. */
if( eDriverState == eSENDING_EVEN_DESCRIPTOR )

8
Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c
View file

@ -218,7 +218,7 @@ __arm void vSerialISR( void )
{
unsigned portLONG ulStatus;
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* What caused the interrupt? */
ulStatus = serCOM0->US_CSR &= serCOM0->US_IMR;
@ -227,7 +227,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
{
/* The interrupt was caused by the THR becoming empty. Are there any
more characters to transmit? */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* A character was retrieved from the queue so can be sent to the
THR now. */
@ -246,12 +246,12 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
character from the RHR and place it in the queue or received
characters. */
cChar = serCOM0->US_RHR;
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
}
/* If a task was woken by either a character being received or a character
being transmitted then we may need to switch to another task. */
portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
/* End the interrupt in the AIC. */
AT91C_BASE_AIC->AIC_EOICR = 0;

6
Demo/ARM7_AT91SAM7X256_Eclipse/RTOSDemo/USB/USB_ISR.c
View file

@ -99,7 +99,7 @@ extern xQueueHandle xUSBInterruptQueue;
void vUSB_ISR_Handler( void )
{
portBASE_TYPE xTaskWokenByPost = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
static volatile unsigned portLONG ulNextMessage = 0;
xISRStatus *pxMessage;
unsigned portLONG ulTemp, ulRxBytes;
@ -163,11 +163,11 @@ unsigned portLONG ulTemp, ulRxBytes;
/* The message now contains the entire state and optional data from
the USB interrupt. This can now be posted on the Rx queue ready for
processing at the task level. */
xTaskWokenByPost = xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, xTaskWokenByPost );
xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
/* We may want to switch to the USB task, if this message has made
it the highest priority task that is ready to execute. */
if( xTaskWokenByPost )
if( xHigherPriorityTaskWoken )
{
portYIELD_FROM_ISR();
}

6
Demo/ARM7_AT91SAM7X256_Eclipse/RTOSDemo/webserver/EMAC_ISR.c
View file

@ -71,7 +71,7 @@ void vPassEMACSemaphore( xSemaphoreHandle xSemaphore )
void vEMACISR_Handler( void )
{
volatile unsigned portLONG ulIntStatus, ulRxStatus;
portBASE_TYPE xSwitchRequired = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
ulIntStatus = AT91C_BASE_EMAC->EMAC_ISR;
ulRxStatus = AT91C_BASE_EMAC->EMAC_RSR;
@ -80,7 +80,7 @@ portBASE_TYPE xSwitchRequired = pdFALSE;
{
/* A frame has been received, signal the uIP task so it can process
the Rx descriptors. */
xSwitchRequired = xSemaphoreGiveFromISR( xEMACSemaphore, pdFALSE );
xSemaphoreGiveFromISR( xEMACSemaphore, &xHigherPriorityTaskWoken );
AT91C_BASE_EMAC->EMAC_RSR = AT91C_EMAC_REC;
}
@ -88,7 +88,7 @@ portBASE_TYPE xSwitchRequired = pdFALSE;
AT91C_BASE_AIC->AIC_EOICR = 0;
/* Switch to the uIP task. */
if( xSwitchRequired )
if( xHigherPriorityTaskWoken )
{
/* If a task of higher priority than the interrupted task was
unblocked by the ISR then this call will ensure that the

11
Demo/ARM7_LPC2106_GCC/serial/serialISR.c
View file

@ -136,7 +136,7 @@ void vUART_ISR_Wrapper( void )
void vUART_ISR_Handler( void )
{
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* What caused the interrupt? */
switch( UART0_IIR & serINTERRUPT_SOURCE_MASK )
@ -147,7 +147,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
case serSOURCE_THRE : /* The THRE is empty. If there is another
character in the Tx queue, send it now. */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
UART0_THR = cChar;
}
@ -164,17 +164,14 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
case serSOURCE_RX : /* A character was received. Place it in
the queue of received characters. */
cChar = UART0_RBR;
if( xQueueSendFromISR( xRxedChars, &cChar, ( portBASE_TYPE ) pdFALSE ) )
{
xTaskWokenByRx = pdTRUE;
}
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
break;
default : /* There is nothing to do, leave the ISR. */
break;
}
if( xTaskWokenByTx || xTaskWokenByRx )
if( xHigherPriorityTaskWoken )
{
portYIELD_FROM_ISR();
}

11
Demo/ARM7_LPC2129_IAR/serial/serial.c
View file

@ -257,7 +257,7 @@ signed portBASE_TYPE xReturn;
__arm void vSerialISR( void )
{
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* What caused the interrupt? */
switch( U0IIR & serINTERRUPT_SOURCE_MASK )
@ -268,7 +268,7 @@ portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
case serSOURCE_THRE : /* The THRE is empty. If there is another
character in the Tx queue, send it now. */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
U0THR = cChar;
}
@ -285,10 +285,7 @@ portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
case serSOURCE_RX : /* A character was received. Place it in
the queue of received characters. */
cChar = U0RBR;
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
{
xTaskWokenByRx = pdTRUE;
}
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
break;
default : /* There is nothing to do, leave the ISR. */
@ -297,7 +294,7 @@ portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
/* Exit the ISR. If a task was woken by either a character being received
or transmitted then a context switch will occur. */
portEND_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
/* Clear the ISR in the VIC. */
VICVectAddr = serCLEAR_VIC_INTERRUPT;

14
Demo/ARM7_LPC2129_Keil/serial/serialISR.c
View file

@ -120,10 +120,9 @@ void vUART_ISR( void ) __task
/* Now we can declare the local variables. */
static signed portCHAR cChar;
static portBASE_TYPE xTaskWokenByRx, xTaskWokenByTx;
static portBASE_TYPE xHigherPriorityTaskWoken;
xTaskWokenByTx = pdFALSE;
xTaskWokenByRx = pdFALSE;
xHigherPriorityTaskWoken = pdFALSE;
/* What caused the interrupt? */
switch( U0IIR & serINTERRUPT_SOURCE_MASK )
@ -134,7 +133,7 @@ void vUART_ISR( void ) __task
case serSOURCE_THRE : /* The THRE is empty. If there is another
character in the Tx queue, send it now. */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
U0THR = cChar;
}
@ -151,10 +150,7 @@ void vUART_ISR( void ) __task
case serSOURCE_RX : /* A character was received. Place it in
the queue of received characters. */
cChar = U0RBR;
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
{
xTaskWokenByRx = pdTRUE;
}
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
break;
default : /* There is nothing to do, leave the ISR. */
@ -166,7 +162,7 @@ void vUART_ISR( void ) __task
/* Exit the ISR. If a task was woken by either a character being received
or transmitted then a context switch will occur. */
portEXIT_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
}
/*-----------------------------------------------------------*/

5
Demo/ARM7_LPC2138_Rowley/mainISR.c
View file

@ -64,8 +64,11 @@ void vButtonHandler( void );
void vButtonHandler( void )
{
extern xSemaphoreHandle xButtonSemaphore;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
if( xSemaphoreGiveFromISR( xButtonSemaphore, pdFALSE ) )
xSemaphoreGiveFromISR( xButtonSemaphore, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken )
{
/* We have woken a task. Calling "yield from ISR" here will ensure
the interrupt returns to the woken task if it has a priority higher

6
Demo/ARM7_LPC2368_Eclipse/RTOSDemo/webserver/EMAC_ISR.c
View file

@ -13,14 +13,16 @@ extern xSemaphoreHandle xEMACSemaphore;
void vEMAC_ISR_Handler( void )
{
portBASE_TYPE xSwitchRequired = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Clear the interrupt. */
MAC_INTCLEAR = 0xffff;
VICVectAddr = 0;
/* Ensure the uIP task is not blocked as data has arrived. */
if( xSemaphoreGiveFromISR( xEMACSemaphore, pdFALSE ) )
xSemaphoreGiveFromISR( xEMACSemaphore, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken )
{
/* Giving the semaphore woke a task. */
portYIELD_FROM_ISR();

6
Demo/ARM7_LPC2368_Rowley/webserver/EMAC_ISR.c
View file

@ -13,12 +13,16 @@ extern xSemaphoreHandle xEMACSemaphore;
void vEMAC_ISR_Handler( void )
{
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Clear the interrupt. */
IntClear = 0xffff;
VICVectAddr = 0;
/* Ensure the uIP task is not blocked as data has arrived. */
if( xSemaphoreGiveFromISR( xEMACSemaphore, pdFALSE ) )
xSemaphoreGiveFromISR( xEMACSemaphore, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken )
{
/* If the uIP task was unblocked then calling "Yield from ISR" here
will ensure the interrupt returns directly to the uIP task, if it

8
Demo/ARM7_STR71x_IAR/serial/serial.c
View file

@ -213,7 +213,7 @@ __arm void vSerialISR( void )
{
unsigned portSHORT usStatus;
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* What caused the interrupt? */
usStatus = UART_FlagStatus( UART0 );
@ -222,7 +222,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
{
/* The interrupt was caused by the THR becoming empty. Are there any
more characters to transmit? */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* A character was retrieved from the queue so can be sent to the
THR now. */
@ -241,12 +241,12 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
character from the RHR and place it in the queue of received
characters. */
cChar = UART0->RxBUFR;
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
}
/* If a task was woken by either a character being received or a character
being transmitted then we may need to switch to another task. */
portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
/* End the interrupt in the EIC. */
portCLEAR_EIC();

8
Demo/ARM7_STR75x_GCC/serial/serialISR.c
View file

@ -77,7 +77,7 @@ void vConfigureQueues( xQueueHandle xQForRx, xQueueHandle xQForTx, portBASE_TYPE
void vSerialISR( void )
{
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
do
{
@ -85,7 +85,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
{
/* The interrupt was caused by the THR becoming empty. Are there any
more characters to transmit? */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* A character was retrieved from the queue so can be sent to the
THR now. */
@ -105,14 +105,14 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
character from the RHR and place it in the queue of received
characters. */
cChar = UART0->DR;
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
UART_ClearITPendingBit( UART0, UART_IT_Receive );
}
} while( UART0->MIS );
/* If a task was woken by either a character being received or a character
being transmitted then we may need to switch to another task. */
portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}

8
Demo/ARM7_STR75x_IAR/serial/serial.c
View file

@ -235,7 +235,7 @@ void vSerialClose( xComPortHandle xPort )
__arm void vSerialISR( void )
{
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
do
{
@ -243,7 +243,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
{
/* The interrupt was caused by the THR becoming empty. Are there any
more characters to transmit? */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* A character was retrieved from the queue so can be sent to the
THR now. */
@ -263,14 +263,14 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
character from the RHR and place it in the queue of received
characters. */
cChar = UART0->DR;
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
UART_ClearITPendingBit( UART0, UART_IT_Receive );
}
} while( UART0->MIS );
/* If a task was woken by either a character being received or a character
being transmitted then we may need to switch to another task. */
portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}

6
Demo/ARM9_STR91X_IAR/lwip/netif/ethernetif.c
View file

@ -415,16 +415,16 @@ ethernetif_init(struct netif *netif)
void ENET_IRQHandler(void)
{
portBASE_TYPE xSwitchRequired;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Give the semaphore in case the lwIP task needs waking. */
xSwitchRequired = xSemaphoreGiveFromISR( s_xSemaphore, pdFALSE );
xSemaphoreGiveFromISR( s_xSemaphore, &xHigherPriorityTaskWoken );
/* Clear the interrupt. */
ENET_DMA->ISR = DMI_RX_CURRENT_DONE;
/* Switch tasks if necessary. */
portEND_SWITCHING_ISR( xSwitchRequired );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}
/*-----------------------------------------------------------*/

8
Demo/ARM9_STR91X_IAR/serial/serial.c
View file

@ -270,7 +270,7 @@ void vSerialClose( xComPortHandle xPort )
void UART1_IRQHandler( void )
{
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
while( UART1->RIS & mainRXRIS )
{
@ -278,7 +278,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
character from the DR and place it in the queue of received
characters. */
cChar = UART1->DR;
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
}
if( UART1->RIS & mainTXRIS )
@ -287,7 +287,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
{
/* This interrupt was caused by space becoming available on the Tx
FIFO, wake any task that is waiting to post (if any). */
xTaskWokenByTx = xSemaphoreGiveFromISR( xTxFIFOSemaphore, xTaskWokenByTx );
xSemaphoreGiveFromISR( xTxFIFOSemaphore, &xHigherPriorityTaskWoken );
lTaskWaiting = pdFALSE;
}
@ -296,7 +296,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
/* If a task was woken by either a character being received or a character
being transmitted then we may need to switch to another task. */
portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}

6
Demo/ARM9_STR91X_IAR/webserver/uIP_Task.c
View file

@ -297,16 +297,16 @@ static unsigned portCHAR *pcTxData;
void ENET_IRQHandler(void)
{
portBASE_TYPE xSwitchRequired;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Give the semaphore in case the uIP task needs waking. */
xSwitchRequired = xSemaphoreGiveFromISR( xSemaphore, pdFALSE );
xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
/* Clear the interrupt. */
ENET_DMA->ISR = uipDMI_RX_CURRENT_DONE;
/* Switch tasks if necessary. */
portEND_SWITCHING_ISR( xSwitchRequired );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}
/*-----------------------------------------------------------*/

2
Demo/AVR32_UC3/AT32UC3A/IAR/settings/rtosdemo.cspy.bat
View file

@ -25,7 +25,7 @@
"C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\bin\cspybat" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\avr32proc.dll" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\avr32jtagicemkII.dll" %1 --plugin "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\<libsupport_plugin>" --backend -B "--core" "avr32a" "--avr32_simd_instructions" "disabled" "--avr32_dsp_instructions" "enabled" "--avr32_rmw_instructions" "enabled" "-p" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\config\iouc3a0512.ddf" "-d" "jtagicemkII" "--drv_communication" "USB" "--jtagice_clock" "100000"
@REM loaded plugins:
@REM Loaded plugins:
@REM avr32LibSupport.dll
@REM C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\CodeCoverage\CodeCoverage.dll
@REM C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\Profiling\Profiling.dll

13
Demo/AVR32_UC3/serial/serial.c
View file

@ -89,7 +89,7 @@ static portBASE_TYPE prvUSART_ISR_NonNakedBehaviour( void )
{
/* Now we can declare the local variables. */
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
unsigned portLONG ulStatus;
volatile avr32_usart_t *usart = serialPORT_USART;
portBASE_TYPE retstatus;
@ -104,7 +104,7 @@ static portBASE_TYPE prvUSART_ISR_NonNakedBehaviour( void )
Because FreeRTOS is not supposed to run with nested interrupts, put all OS
calls in a critical section . */
portENTER_CRITICAL();
retstatus = xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx );
retstatus = xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken );
portEXIT_CRITICAL();
if (retstatus == pdTRUE)
@ -128,18 +128,13 @@ static portBASE_TYPE prvUSART_ISR_NonNakedBehaviour( void )
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
calls in a critical section . */
portENTER_CRITICAL();
retstatus = xQueueSendFromISR(xRxedChars, &cChar, pdFALSE);
retstatus = xQueueSendFromISR(xRxedChars, &cChar, &xHigherPriorityTaskWoken);
portEXIT_CRITICAL();
if( retstatus )
{
xTaskWokenByRx = pdTRUE;
}
}
/* The return value will be used by portEXIT_SWITCHING_ISR() to know if it
should perform a vTaskSwitchContext(). */
return ( xTaskWokenByTx || xTaskWokenByRx );
return ( xHigherPriorityTaskWoken );
}
/*-----------------------------------------------------------*/

5
Demo/AVR_ATMega323_IAR/serial/serial.c
View file

@ -181,13 +181,16 @@ unsigned portCHAR ucByte;
__interrupt void SIG_UART_RECV( void )
{
signed portCHAR cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Get the character and post it on the queue of Rxed characters.
If the post causes a task to wake force a context switch as the woken task
may have a higher priority than the task we have interrupted. */
cChar = UDR;
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken != pdFALSE )
{
taskYIELD();
}

2
Demo/AVR_ATMega323_WinAVR/main.c
View file

@ -188,7 +188,7 @@ portSHORT main( void )
vStartRegTestTasks();
/* Create the tasks defined within this file. */
xTaskCreate( vErrorChecks, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
xTaskCreate( vErrorChecks, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* Create the co-routines that flash the LED's. */
vStartFlashCoRoutines( mainNUM_FLASH_COROUTINES );

5
Demo/AVR_ATMega323_WinAVR/serial/serial.c
View file

@ -210,13 +210,16 @@ unsigned portCHAR ucByte;
SIGNAL( SIG_UART_RECV )
{
signed portCHAR cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Get the character and post it on the queue of Rxed characters.
If the post causes a task to wake force a context switch as the woken task
may have a higher priority than the task we have interrupted. */
cChar = UDR;
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken != pdFALSE )
{
taskYIELD();
}

15
Demo/Cygnal/serial/serial.c
View file

@ -124,7 +124,7 @@ unsigned portCHAR ucOriginalSFRPage;
void vSerialISR( void ) interrupt 4
{
portCHAR cChar;
portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* 8051 port interrupt routines MUST be placed within a critical section
if taskYIELD() is used within the ISR! */
@ -134,20 +134,17 @@ portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
if( RI )
{
/* Get the character and post it on the queue of Rxed characters.
If the post causes a task to wake force a context switch as the woken task
may have a higher priority than the task we have interrupted. */
If the post causes a task to wake force a context switch if the woken task
has a higher priority than the task we have interrupted. */
cChar = SBUF;
RI = 0;
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
{
xTaskWokenByRx = ( portBASE_TYPE ) pdTRUE;
}
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
}
if( TI )
{
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == ( portBASE_TYPE ) pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == ( portBASE_TYPE ) pdTRUE )
{
/* Send the next character queued for Tx. */
SBUF = cChar;
@ -161,7 +158,7 @@ portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
TI = 0;
}
if( xTaskWokenByRx || xTaskWokenByTx )
if( xHigherPriorityTaskWoken )
{
portYIELD();
}

18
Demo/Flshlite/serial/serial.c
View file

@ -435,7 +435,7 @@ static portBASE_TYPE xComPortISR( xComPort * const pxPort )
{
unsigned portSHORT usStatusRegister;
portCHAR cChar;
portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE, xContinue = pdTRUE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, xContinue = pdTRUE;
/* NOTE: THIS IS NOT AN EFFICIENT ISR AS IT IS DESIGNED SOLELY TO TEST
THE SCHEDULER FUNCTIONALITY. REAL APPLICATIONS SHOULD NOT USE THIS
@ -450,10 +450,10 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTa
if( usStatusRegister & serRX_READY )
{
cChar = ( portCHAR ) portINPUT_WORD( pxPort->usRxReg );
xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cChar, xTaskWokenByPost );
xQueueSendFromISR( pxPort->xRxedChars, &cChar, &xHigherPriorityTaskWoken );
/* Also release the semaphore - this does nothing interesting and is just a test. */
xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );
xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
/* We have performed an action this cycle - there may be other to perform. */
xContinue = pdTRUE;
@ -461,7 +461,7 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTa
if( pxPort->sTxInterruptOn && ( usStatusRegister & serTX_EMPTY ) )
{
if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
portOUTPUT_WORD( pxPort->usTxReg, ( unsigned portSHORT ) cChar );
@ -481,17 +481,11 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTa
/* If posting to the queue woke a task that was blocked on the queue we may
want to switch to the woken task - depending on its priority relative to
the task interrupted by this ISR. */
if( xTaskWokenByPost || xAnotherTaskWokenByPost || xTaskWokenByTx)
{
return pdTRUE;
}
else
{
return pdFALSE;
}
return xHigherPriorityTaskWoken;
}

8
Demo/H8S/RTOSDemo/serial/serial.c
View file

@ -204,14 +204,16 @@ void vCOM_1_Rx_ISR( void )
/* As this is a switching ISR the local variables must be declared as
static. */
static portCHAR cRxByte;
static portBASE_TYPE xTaskWokenByPost;
static portBASE_TYPE xHigherPriorityTaskWoken;
xHigherPriorityTaskWoken = pdFALSE;
/* Get the character. */
cRxByte = RDR1;
/* Post the character onto the queue of received characters - noting
whether or not this wakes a task. */
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cRxByte, pdFALSE );
xQueueSendFromISR( xRxedChars, &cRxByte, &xHigherPriorityTaskWoken );
/* Clear the interrupt. */
SSR1 &= ~serRX_INTERRUPT;
@ -219,7 +221,7 @@ void vCOM_1_Rx_ISR( void )
/* This must be the last line in the function. We pass cTaskWokenByPost so
a context switch will occur if the received character woke a task that has
a priority higher than the task we interrupted. */
portEXIT_SWITCHING_ISR( xTaskWokenByPost );
portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
}
/*-----------------------------------------------------------*/

8
Demo/HCS12_CodeWarrior_banked/serial/serial.c
View file

@ -146,7 +146,7 @@ void vSerialClose( xComPortHandle xPort )
__interrupt void vCOM0_ISR( void )
{
volatile unsigned portCHAR ucByte, ucStatus;
portBASE_TYPE xTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* What caused the interrupt? */
ucStatus = SCI0SR1;
@ -166,13 +166,13 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
/* Post the character onto the queue of received characters - noting
whether or not this wakes a task. */
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, ( void * ) &ucByte, pdFALSE );
xQueueSendFromISR( xRxedChars, ( void * ) &ucByte, &xHigherPriorityTaskWoken );
}
if( ( ucStatus & serTX_INTERRUPT ) && ( SCI0CR2_SCTIE ) )
{
/* The interrupt was caused by a character being transmitted. */
if( xQueueReceiveFromISR( xCharsForTx, ( void * ) &ucByte, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, ( void * ) &ucByte, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* Clear the SCRF bit. */
SCI0DRL = ucByte;
@ -184,7 +184,7 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
}
}
if( ( xTaskWokenByPost ) || ( xTaskWokenByTx ) )
if( xHigherPriorityTaskWoken )
{
portYIELD();
}

7
Demo/HCS12_CodeWarrior_small/main.c
View file

@ -355,6 +355,9 @@ unsigned portBASE_TYPE uxExpected = 1, uxReceived;
void interrupt vButtonPush( void )
{
static unsigned portBASE_TYPE uxValToSend = 0;
static unsigned portLONG xHigherPriorityTaskWoken;
xHigherPriorityTaskWoken = pdFALSE;
/* Send an incrementing value to the button push task each run. */
uxValToSend++;
@ -366,7 +369,9 @@ unsigned portBASE_TYPE uxExpected = 1, uxReceived;
blocked waiting for the data. As the button push task is high priority
it will wake and a context switch should be performed before leaving
the ISR. */
if( xQueueSendFromISR( xButtonQueue, &uxValToSend, pdFALSE ) )
xQueueSendFromISR( xButtonQueue, &uxValToSend, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken )
{
/* NOTE: This macro can only be used if there are no local
variables defined. This function uses a static variable so it's

9
Demo/HCS12_GCC_banked/serial.c
View file

@ -103,7 +103,7 @@ void ATTR_INT ATTR_NEAR vCOM_ISR( void );
void vCOM_ISR( void )
{
volatile unsigned portCHAR ucByte, ucStatus;
portBASE_TYPE xTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* What caused the interrupt? */
ucStatus = SCISR1;
@ -123,13 +123,13 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
/* Post the character onto the queue of received characters - noting
whether or not this wakes a task. */
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, ( void * ) &ucByte, pdFALSE );
xQueueSendFromISR( xRxedChars, ( void * ) &ucByte, &xHigherPriorityTaskWoken );
}
if( ( ucStatus & serTX_INTERRUPT ) && ( SCICR2 & 0x80 ) )
{
/* The interrupt was caused by a character being transmitted. */
if( xQueueReceiveFromISR( xCharsForTx, ( void * ) &ucByte, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, ( void * ) &ucByte, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* Clear the SCRF bit. */
SCIDRL = ucByte;
@ -141,10 +141,9 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
}
}
if( ( xTaskWokenByPost ) || ( xTaskWokenByTx ) )
if( xHigherPriorityTaskWoken )
{
portYIELD();
}
}

5
Demo/MB91460_Softune/SRC/serial/serial.c
View file

@ -176,12 +176,15 @@ signed portBASE_TYPE xReturn;
__interrupt void UART2_RxISR (void)
{
signed portCHAR cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Get the character from the UART and post it on the queue of Rxed
characters. */
cChar = RDR02;
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken )
{
/*If the post causes a task to wake force a context switch
as the woken task may have a higher priority than the task we have

3
Demo/MB91460_Softune/SRC/utility/taskutility.c
View file

@ -209,7 +209,8 @@ static void vUART5Task( void *pvParameters )
__interrupt void UART5_RxISR( void )
{
unsigned portCHAR ch;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
ch = RDR05;
xQueueSendFromISR( xQueue, &ch, pdFALSE );
xQueueSendFromISR( xQueue, &ch, &xHigherPriorityTaskWoken );
}

5
Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/serial/serial.c
View file

@ -184,12 +184,15 @@ signed portBASE_TYPE xReturn;
__interrupt void UART0_RxISR( void )
{
volatile signed portCHAR cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Get the character from the UART and post it on the queue of Rxed
characters. */
cChar = RDR0;
if( xQueueSendFromISR( xRxedChars, ( const void *const ) &cChar, (signed portBASE_TYPE) pdFALSE ) )
xQueueSendFromISR( xRxedChars, ( const void *const ) &cChar, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken )
{
/*If the post causes a task to wake force a context switch
as the woken task may have a higher priority than the task we have

3
Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/utility/taskutility.c
View file

@ -220,7 +220,8 @@ static void vUART0Task( void *pvParameters )
__interrupt void UART0_TraceRxISR( void )
{
unsigned portCHAR ch;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
ch = RDR0;
xQueueSendFromISR( xQueue, &ch, pdFALSE );
xQueueSendFromISR( xQueue, &ch, &xHigherPriorityTaskWoken );
}

10
Demo/MCF5235_GCC/system/serial.c
View file

@ -270,7 +270,7 @@ void
prvSerialISR( void )
{
static signed portCHAR cChar;
static portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
static portBASE_TYPE xHigherPriorityTaskWoken;
/* We have to remvoe the effect of the GCC. Please note that the
* __attribute__ ((interrupt_handler)) does not work here because we
@ -285,12 +285,13 @@ prvSerialISR( void )
* variable declarations.
*/
portENTER_SWITCHING_ISR();
xHigherPriorityTaskWoken = pdFALSE;
/* Ready to send a character from the buffer. */
if( MCF_UART_USR0 & MCF_UART_USR_TXRDY )
{
/* Transmit buffer is ready. Test if there are characters available. */
if( xQueueReceiveFromISR( xComPortIF[ 0 ].xTXChars, &cChar, &xTaskWokenByTx ) ==
if( xQueueReceiveFromISR( xComPortIF[ 0 ].xTXChars, &cChar, &xHigherPriorityTaskWoken ) ==
pdTRUE )
{
/* A character was retrieved from the queue so can be sent. */
@ -305,11 +306,10 @@ prvSerialISR( void )
if( MCF_UART_USR0 & MCF_UART_USR_RXRDY )
{
cChar = MCF_UART_URB0;
xTaskWokenByRx =
xQueueSendFromISR( xComPortIF[ 0].xRXChars, &cChar, xTaskWokenByRx );
xQueueSendFromISR( xComPortIF[ 0].xRXChars, &cChar, &xHigherPriorityTaskWoken );
}
/* Exit the ISR. If a task was woken by either a character being
* or transmitted then a context switch will occur.
*/
portEXIT_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
}

8
Demo/MicroBlaze/serial/serial.c
View file

@ -178,7 +178,7 @@ void vSerialClose( xComPortHandle xPort )
void vSerialISR( void *pvBaseAddress )
{
unsigned portLONG ulISRStatus;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
portCHAR cChar;
/* Determine the cause of the interrupt. */
@ -190,7 +190,7 @@ portCHAR cChar;
characters. This might wake a task that was blocked waiting for
data. */
cChar = ( portCHAR )XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_RX_FIFO_OFFSET );
xTaskWokenByRx = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByRx );
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
}
if( ( ulISRStatus & XUL_SR_TX_FIFO_EMPTY ) != 0 )
@ -198,14 +198,14 @@ portCHAR cChar;
/* There is space in the FIFO - if there are any characters queue for
transmission they can be send to the UART now. This might unblock a
task that was waiting for space to become available on the Tx queue. */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cChar );
}
}
/* If we woke any tasks we may require a context switch. */
if( xTaskWokenByTx || xTaskWokenByRx )
if( xHigherPriorityTaskWoken )
{
portYIELD_FROM_ISR();
}

5
Demo/PIC18_MPLAB/serial/serial.c
View file

@ -204,6 +204,7 @@ void vSerialClose( xComPortHandle xPort )
void vSerialRxISR( void )
{
portCHAR cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Get the character and post it on the queue of Rxed characters.
If the post causes a task to wake force a context switch as the woken task
@ -217,7 +218,9 @@ portCHAR cChar;
RCSTAbits.CREN = serCONTINUOUS_RX;
}
if( xQueueSendFromISR( xRxedChars, ( const void * ) &cChar, pdFALSE ) )
xQueueSendFromISR( xRxedChars, ( const void * ) &cChar, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken )
{
taskYIELD();
}

6
Demo/PIC18_WizC/serial/isrSerialRx.c
View file

@ -83,6 +83,7 @@ Changes from V3.0.1
* because this SFR will be restored before exiting the ISR.
*/
extern portCHAR cChar;
extern portBASE_TYPE xHigherPriorityTaskWoken;
#pragma locate cChar &PRODL
/*
@ -112,7 +113,10 @@ Changes from V3.0.1
bCREN = serCONTINUOUS_RX;
}
if( xQueueSendFromISR( xRxedChars, ( const void * ) &cChar, pdFALSE ) )
xHigherPriorityTaskWoken = pdFALSE;
xQueueSendFromISR( xRxedChars, ( const void * ) &cChar, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken )
{
uxSwitchRequested = pdTRUE;
}

1
Demo/PIC18_WizC/serial/serial.c
View file

@ -80,6 +80,7 @@ Changes from V3.0.1
/* Queues to interface between comms API and interrupt routines. */
xQueueHandle xRxedChars;
xQueueHandle xCharsForTx;
portBASE_TYPE xHigherPriorityTaskWoken;
/*-----------------------------------------------------------*/

6
Demo/PIC24_MPLAB/serial/serial.c
View file

@ -197,7 +197,7 @@ void vSerialClose( xComPortHandle xPort )
void __attribute__((__interrupt__, auto_psv)) _U2RXInterrupt( void )
{
portCHAR cChar;
portBASE_TYPE xYieldRequired = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Get the character and post it on the queue of Rxed characters.
If the post causes a task to wake force a context switch as the woken task
@ -206,10 +206,10 @@ portBASE_TYPE xYieldRequired = pdFALSE;
while( U2STAbits.URXDA )
{
cChar = U2RXREG;
xYieldRequired = xQueueSendFromISR( xRxedChars, &cChar, xYieldRequired );
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
}
if( xYieldRequired != pdFALSE )
if( xHigherPriorityTaskWoken != pdFALSE )
{
taskYIELD();
}

10
Demo/PIC32MX_MPLAB/serial/serial.c
View file

@ -153,9 +153,9 @@ void vU2InterruptHandler( void )
{
/* Declared static to minimise stack use. */
static portCHAR cChar;
static portBASE_TYPE xYieldRequired;
static portBASE_TYPE xHigherPriorityTaskWoken;
xYieldRequired = pdFALSE;
xHigherPriorityTaskWoken = pdFALSE;
/* Are any Rx interrupts pending? */
if( mU2RXGetIntFlag() )
@ -165,7 +165,7 @@ static portBASE_TYPE xYieldRequired;
/* Retrieve the received character and place it in the queue of
received characters. */
cChar = U2RXREG;
xYieldRequired = xQueueSendFromISR( xRxedChars, &cChar, xYieldRequired );
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
}
mU2RXClearIntFlag();
}
@ -175,7 +175,7 @@ static portBASE_TYPE xYieldRequired;
{
while( !( U2STAbits.UTXBF ) )
{
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xYieldRequired ) == pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* Send the next character queued for Tx. */
U2TXREG = cChar;
@ -192,7 +192,7 @@ static portBASE_TYPE xYieldRequired;
}
/* If sending or receiving necessitates a context switch, then switch now. */
portEND_SWITCHING_ISR( xYieldRequired );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
}

8
Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/serial/serial.c
View file

@ -184,7 +184,7 @@ void vSerialClose( xComPortHandle xPort )
static void vSerialISR( XUartLite *pxUART )
{
unsigned portLONG ulISRStatus;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE, lDidSomething;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, lDidSomething;
portCHAR cChar;
do
@ -199,7 +199,7 @@ portCHAR cChar;
characters. This might wake a task that was blocked waiting for
data. */
cChar = ( portCHAR ) XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_RX_FIFO_OFFSET );
xTaskWokenByRx = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByRx );
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
lDidSomething = pdTRUE;
}
@ -208,7 +208,7 @@ portCHAR cChar;
/* There is space in the FIFO - if there are any characters queue for
transmission they can be sent to the UART now. This might unblock a
task that was waiting for space to become available on the Tx queue. */
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cChar );
lDidSomething = pdTRUE;
@ -217,7 +217,7 @@ portCHAR cChar;
} while( lDidSomething == pdTRUE );
/* If we woke any tasks we may require a context switch. */
if( xTaskWokenByTx || xTaskWokenByRx )
if( xHigherPriorityTaskWoken )
{
portYIELD_FROM_ISR();
}

6
Demo/WizNET_DEMO_GCC_ARM7/TCPISR.c
View file

@ -76,10 +76,10 @@ static portLONG lDummyVariable;
void vEINT0_ISR_Handler( void )
{
extern xQueueHandle xTCPISRQueue;
portBASE_TYPE xTaskWoken = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Just wake the TCP task so it knows an ISR has occurred. */
xTaskWoken = xQueueSendFromISR( xTCPISRQueue, ( void * ) &lDummyVariable, xTaskWoken );
xQueueSendFromISR( xTCPISRQueue, ( void * ) &lDummyVariable, &xHigherPriorityTaskWoken );
/* We cannot carry on processing interrupts until the TCP task has
processed this one - so for now interrupts are disabled. The TCP task will
@ -89,7 +89,7 @@ portBASE_TYPE xTaskWoken = pdFALSE;
/* Clear the interrupt bit. */
VICVectAddr = tcpCLEAR_VIC_INTERRUPT;
if( xTaskWoken )
if( xHigherPriorityTaskWoken )
{
portYIELD_FROM_ISR();
}

12
Demo/WizNET_DEMO_GCC_ARM7/i2cISR.c
View file

@ -161,7 +161,7 @@ void vI2C_ISR_Handler( void )
/* Holds the current transmission state. */
static I2C_STATE eCurrentState = eSentStart;
static portLONG lMessageIndex = -i2cBUFFER_ADDRESS_BYTES; /* There are two address bytes to send prior to the data. */
portBASE_TYPE xTaskWokenByTx = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
portLONG lBytesLeft;
/* The action taken for this interrupt depends on our current state. */
@ -268,11 +268,11 @@ portLONG lBytesLeft;
must 'give' the semaphore so the task is woken.*/
if( pxCurrentMessage->xMessageCompleteSemaphore )
{
xTaskWokenByTx = xSemaphoreGiveFromISR( pxCurrentMessage->xMessageCompleteSemaphore, xTaskWokenByTx );
xSemaphoreGiveFromISR( pxCurrentMessage->xMessageCompleteSemaphore, &xHigherPriorityTaskWoken );
}
/* Are there any other messages to transact? */
if( xQueueReceiveFromISR( xMessagesForTx, &pxCurrentMessage, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xMessagesForTx, &pxCurrentMessage, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* Start the next message - which was
retrieved from the queue. */
@ -336,11 +336,11 @@ portLONG lBytesLeft;
semaphore must be 'given' to wake the task. */
if( pxCurrentMessage->xMessageCompleteSemaphore )
{
xTaskWokenByTx = xSemaphoreGiveFromISR( pxCurrentMessage->xMessageCompleteSemaphore, xTaskWokenByTx );
xSemaphoreGiveFromISR( pxCurrentMessage->xMessageCompleteSemaphore, &xHigherPriorityTaskWoken );
}
/* Are there any other messages to transact? */
if( xQueueReceiveFromISR( xMessagesForTx, &pxCurrentMessage, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( xMessagesForTx, &pxCurrentMessage, &xHigherPriorityTaskWoken ) == pdTRUE )
{
/* Start the next message from the Tx queue. */
I2C_I2CONSET = i2cSTA_BIT;
@ -371,7 +371,7 @@ portLONG lBytesLeft;
I2C_I2CONCLR = i2cSI_BIT;
VICVectAddr = i2cCLEAR_VIC_INTERRUPT;
if( xTaskWokenByTx )
if( xHigherPriorityTaskWoken )
{
portYIELD_FROM_ISR();
}

10
Demo/WizNET_DEMO_TERN_186/serial/serial.c
View file

@ -409,7 +409,7 @@ static portBASE_TYPE xComPortISR( xComPort * const pxPort )
{
unsigned portSHORT usStatusRegister;
portCHAR cChar;
portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* NOTE: THIS IS NOT AN EFFICIENT ISR AS IT IS DESIGNED SOLELY TO TEST
THE SCHEDULER FUNCTIONALITY. REAL APPLICATIONS SHOULD NOT USE THIS
@ -420,14 +420,14 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTa
if( usStatusRegister & serRX_READY )
{
cChar = ( portCHAR ) portINPUT_WORD( pxPort->usRxReg );
xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cChar, xTaskWokenByPost );
xQueueSendFromISR( pxPort->xRxedChars, &cChar, &xHigherPriorityTaskWoken );
/* Also release the semaphore - this does nothing interesting and is just a test. */
xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );
xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
}
else if( pxPort->sTxInterruptOn && ( usStatusRegister & serTX_EMPTY ) )
{
if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
{
portOUTPUT_WORD( pxPort->usTxReg, ( unsigned portSHORT ) cChar );
}
@ -443,7 +443,7 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTa
/* If posting to the queue woke a task that was blocked on the queue we may
want to switch to the woken task - depending on its priority relative to
the task interrupted by this ISR. */
if( xTaskWokenByPost || xAnotherTaskWokenByPost || xTaskWokenByTx)
if( xHigherPriorityTaskWoken )
{
return pdTRUE;
}

10
Demo/WizNET_DEMO_TERN_186/tern_code/socket.c
View file

@ -80,7 +80,7 @@ portBASE_TYPE prvProcessISR( void )
{
unsigned char status;
extern xSemaphoreHandle xTCPSemaphore;
portBASE_TYPE xSwitchRequired = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
#ifdef I2CHIP_WINDOW
u_int current_window = i2chip_get_window();
@ -91,7 +91,7 @@ status = READ_VALUE(INT_REG);
if (status)
{
xSwitchRequired = pdTRUE;
xHigherPriorityTaskWoken = pdTRUE;
// channel 0 interrupt(sysinit, sockinit, established, closed, timeout, send_ok, recv_ok)
if (status & 0x01)
{
@ -178,12 +178,12 @@ WRITE_VALUE(INT_REG, 0xFF);
i2chip_set_window(current_window);
#endif
if( xSwitchRequired == pdTRUE )
if( xHigherPriorityTaskWoken == pdTRUE )
{
xSwitchRequired = xSemaphoreGiveFromISR( xTCPSemaphore, pdFALSE );
xSemaphoreGiveFromISR( xTCPSemaphore, &xHigherPriorityTaskWoken );
}
return xSwitchRequired;
return xHigherPriorityTaskWoken;
}
void far interrupt in4_isr_i2chip(void)

6
Demo/dsPIC_MPLAB/serial/serial.c
View file

@ -196,7 +196,7 @@ void vSerialClose( xComPortHandle xPort )
void __attribute__((__interrupt__, auto_psv)) _U2RXInterrupt( void )
{
portCHAR cChar;
portBASE_TYPE xYieldRequired = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Get the character and post it on the queue of Rxed characters.
If the post causes a task to wake force a context switch as the woken task
@ -205,10 +205,10 @@ portBASE_TYPE xYieldRequired = pdFALSE;
while( U2STAbits.URXDA )
{
cChar = U2RXREG;
xYieldRequired = xQueueSendFromISR( xRxedChars, &cChar, xYieldRequired );
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
}
if( xYieldRequired != pdFALSE )
if( xHigherPriorityTaskWoken != pdFALSE )
{
taskYIELD();
}

6
Demo/lwIP_AVR32_UC3/DRIVERS/MACB/macb.c
View file

@ -900,7 +900,7 @@ static long prvMACB_ISR_NonNakedBehaviour( void )
// Variable definitions can be made now.
volatile unsigned long ulIntStatus, ulEventStatus;
long xSwitchRequired = FALSE;
long xHigherPriorityTaskWoken = FALSE;
// Find the cause of the interrupt.
ulIntStatus = AVR32_MACB.isr;
@ -912,7 +912,7 @@ static long prvMACB_ISR_NonNakedBehaviour( void )
// the Rx descriptors.
portENTER_CRITICAL();
#ifdef FREERTOS_USED
xSwitchRequired = xSemaphoreGiveFromISR( xSemaphore, FALSE );
xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
#else
DataToRead = TRUE;
#endif
@ -930,7 +930,7 @@ static long prvMACB_ISR_NonNakedBehaviour( void )
AVR32_MACB.tsr;
}
return ( xSwitchRequired );
return ( xHigherPriorityTaskWoken );
}

12
Demo/lwIP_AVR32_UC3/SERIAL/serial.c
View file

@ -88,7 +88,7 @@ static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
{
/* Now we can declare the local variables. */
signed portCHAR cChar;
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
unsigned portLONG ulStatus;
volatile avr32_usart_t *usart0 = &AVR32_USART0;
portBASE_TYPE retstatus;
@ -103,7 +103,7 @@ static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
calls in a critical section . */
portENTER_CRITICAL();
retstatus = xQueueReceiveFromISR(xCharsForTx, &cChar, &xTaskWokenByTx);
retstatus = xQueueReceiveFromISR(xCharsForTx, &cChar, &xHigherPriorityTaskWoken);
portEXIT_CRITICAL();
if (retstatus == pdTRUE)
{
@ -126,17 +126,13 @@ static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
calls in a critical section . */
portENTER_CRITICAL();
retstatus = xQueueSendFromISR(xRxedChars, &cChar, pdFALSE);
xQueueSendFromISR(xRxedChars, &cChar, &xHigherPriorityTaskWoken);
portEXIT_CRITICAL();
if (retstatus)
{
xTaskWokenByRx = pdTRUE;
}
}
/* The return value will be used by portEXIT_SWITCHING_ISR() to know if it
should perform a vTaskSwitchContext(). */
return ( xTaskWokenByTx || xTaskWokenByRx );
return ( xHigherPriorityTaskWoken );
}

6
Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC_ISR.c
View file

@ -74,7 +74,7 @@ void vEMACISR_Handler( void );
void vEMACISR_Handler( void )
{
volatile unsigned portLONG ulIntStatus, ulEventStatus;
portBASE_TYPE xSwitchRequired = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
extern void vClearEMACTxBuffer( void );
/* Find the cause of the interrupt. */
@ -85,7 +85,7 @@ extern void vClearEMACTxBuffer( void );
{
/* A frame has been received, signal the lwIP task so it can process
the Rx descriptors. */
xSwitchRequired = xSemaphoreGiveFromISR( xSemaphore, pdFALSE );
xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
AT91C_BASE_EMAC->EMAC_RSR = AT91C_EMAC_REC;
}
@ -104,7 +104,7 @@ extern void vClearEMACTxBuffer( void );
switch to another task. If the unblocked task was of higher priority then
the interrupted task it will then execute immediately that the ISR
completes. */
if( xSwitchRequired )
if( xHigherPriorityTaskWoken )
{
portYIELD_FROM_ISR();
}

6
Demo/lwIP_Demo_Rowley_ARM7/USB/USBIsr.c
View file

@ -68,7 +68,7 @@ void vUSB_ISR_Handler( void );
void vUSB_ISR_Handler( void )
{
portCHAR cTaskWokenByPost = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
static volatile unsigned portLONG ulNextMessage = 0;
xISRStatus *pxMessage;
unsigned portLONG ulRxBytes;
@ -145,13 +145,13 @@ unsigned portCHAR ucFifoIndex;
AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_3 ] &= ~usbINT_CLEAR_MASK;
/* Post ISR data to queue for task-level processing */
cTaskWokenByPost = xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, cTaskWokenByPost );
xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
/* Clear AIC to complete ISR processing */
AT91C_BASE_AIC->AIC_EOICR = 0;
/* Do a task switch if needed */
if( cTaskWokenByPost )
if( xHigherPriorityTaskWoken )
{
/* This call will ensure that the unblocked task will be executed
immediately upon completion of the ISR if it has a priority higher

8
Demo/lwIP_MCF5235_GCC/lwip/contrib/port/FreeRTOS/MCF5235/netif/fec.c
View file

@ -346,7 +346,7 @@ eth_input( struct netif *netif, struct pbuf *p )
void
mcf523xfec_rx_irq( void )
{
static portBASE_TYPE xNeedSwitch = pdFALSE;
static portBASE_TYPE xHigherPriorityTaskWoken;
/* Workaround GCC if frame pointers are enabled. This is an ISR and
* we must not modify the stack before portENTER_SWITCHING_ISR( )
@ -359,7 +359,7 @@ mcf523xfec_rx_irq( void )
* a call to the portENTER_SWITCHING_ISR() macro.
*/
portENTER_SWITCHING_ISR( );
xHigherPriorityTaskWoken = pdFALSE;
/* Set Debug PIN to high to measure RX latency. */
FEC_DEBUG_RX_TIMING( 1 );
@ -368,9 +368,9 @@ mcf523xfec_rx_irq( void )
{
/* Clear interrupt from EIR register immediately */
MCF_FEC_EIR = ( MCF_FEC_EIR_RXB | MCF_FEC_EIR_RXF );
xNeedSwitch = xSemaphoreGiveFromISR( fecif_g->rx_sem, pdFALSE );
xSemaphoreGiveFromISR( fecif_g->rx_sem, &xHigherPriorityTaskWoken );
}
portEXIT_SWITCHING_ISR( xNeedSwitch );
portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
}
void

10
Demo/lwIP_MCF5235_GCC/system/serial.c
View file

@ -270,7 +270,7 @@ void
prvSerialISR( void )
{
static signed portCHAR cChar;
static portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
static portBASE_TYPE xHigherPriorityTaskWoken;
/* We have to remvoe the effect of the GCC. Please note that the
* __attribute__ ((interrupt_handler)) does not work here because we
@ -285,12 +285,13 @@ prvSerialISR( void )
* variable declarations.
*/
portENTER_SWITCHING_ISR();
xHigherPriorityTaskWoken = pdFALSE;
/* Ready to send a character from the buffer. */
if( MCF_UART_USR0 & MCF_UART_USR_TXRDY )
{
/* Transmit buffer is ready. Test if there are characters available. */
if( xQueueReceiveFromISR( xComPortIF[ 0 ].xTXChars, &cChar, &xTaskWokenByTx ) ==
if( xQueueReceiveFromISR( xComPortIF[ 0 ].xTXChars, &cChar, &xHigherPriorityTaskWoken ) ==
pdTRUE )
{
/* A character was retrieved from the queue so can be sent. */
@ -305,11 +306,10 @@ prvSerialISR( void )
if( MCF_UART_USR0 & MCF_UART_USR_RXRDY )
{
cChar = MCF_UART_URB0;
xTaskWokenByRx =
xQueueSendFromISR( xComPortIF[ 0].xRXChars, &cChar, xTaskWokenByRx );
xQueueSendFromISR( xComPortIF[ 0].xRXChars, &cChar, &xHigherPriorityTaskWoken );
}
/* Exit the ISR. If a task was woken by either a character being
* or transmitted then a context switch will occur.
*/
portEXIT_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
}

10
Demo/msp430_CrossWorks/serial/serial.c
View file

@ -210,12 +210,15 @@ signed portBASE_TYPE xReturn;
void vRxISR( void ) __interrupt[ UART1RX_VECTOR ]
{
signed portCHAR cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Get the character from the UART and post it on the queue of Rxed
characters. */
cChar = U1RXBUF;
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken )
{
/*If the post causes a task to wake force a context switch
as the woken task may have a higher priority than the task we have
@ -258,12 +261,15 @@ signed portBASE_TYPE xReturn;
void ISRCom1Rx( void )
{
signed portCHAR cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Get the character from the UART and post it on the queue of Rxed
characters. */
cChar = U1RXBUF;
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken )
{
/*If the post causes a task to wake force a context switch
as the woken task may have a higher priority than the task we have

5
Demo/msp430_GCC/serial/serial.c
View file

@ -211,12 +211,15 @@ signed portBASE_TYPE xReturn;
interrupt (UART1RX_VECTOR) vRxISR( void )
{
signed portCHAR cChar;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
/* Get the character from the UART and post it on the queue of Rxed
characters. */
cChar = U1RXBUF;
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
if( xHigherPriorityTaskWoken )
{
/*If the post causes a task to wake force a context switch
as the woken task may have a higher priority than the task we have

6
Demo/uIP_Demo_IAR_ARM7/EMAC/SAM7_EMAC.c
View file

@ -515,7 +515,7 @@ static void prvSetupEMACInterrupt( void )
__arm void vEMACISR( void )
{
volatile unsigned portLONG ulIntStatus, ulRxStatus;
portBASE_TYPE xSwitchRequired = pdFALSE;
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
ulIntStatus = AT91C_BASE_EMAC->EMAC_ISR;
ulRxStatus = AT91C_BASE_EMAC->EMAC_RSR;
@ -524,13 +524,13 @@ portBASE_TYPE xSwitchRequired = pdFALSE;
{
/* A frame has been received, signal the uIP task so it can process
the Rx descriptors. */
xSwitchRequired = xSemaphoreGiveFromISR( xSemaphore, pdFALSE );
xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
AT91C_BASE_EMAC->EMAC_RSR = AT91C_EMAC_REC;
}
/* If a task was woken by either a character being received or a character
being transmitted then we may need to switch to another task. */
portEND_SWITCHING_ISR( xSwitchRequired );
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
/* Clear the interrupt. */
AT91C_BASE_AIC->AIC_EOICR = 0;