mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-20 05:21:59 -04:00
Update to use new xQueueSendFromISR() and xSemaphoreGiveFromISR() function semantics.
This commit is contained in:
parent
7eb7201b46
commit
f4dd20dffc
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@ -112,7 +112,7 @@ void vUART_ISR_Handler( void )
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{
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{
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/* Now we can declare the local variables. These must be static. */
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/* Now we can declare the local variables. These must be static. */
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signed portCHAR cChar;
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signed portCHAR cChar;
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portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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unsigned portLONG ulStatus;
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unsigned portLONG ulStatus;
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/* What caused the interrupt? */
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/* What caused the interrupt? */
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@ -122,7 +122,7 @@ unsigned portLONG ulStatus;
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{
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{
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/* The interrupt was caused by the THR becoming empty. Are there any
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/* The interrupt was caused by the THR becoming empty. Are there any
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more characters to transmit? */
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more characters to transmit? */
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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{
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{
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/* A character was retrieved from the queue so can be sent to the
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/* A character was retrieved from the queue so can be sent to the
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THR now. */
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THR now. */
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@ -140,10 +140,7 @@ unsigned portLONG ulStatus;
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/* The interrupt was caused by the receiver getting data. */
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/* The interrupt was caused by the receiver getting data. */
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cChar = AT91C_BASE_US0->US_RHR;
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cChar = AT91C_BASE_US0->US_RHR;
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if (xQueueSendFromISR(xRxedChars, &cChar, pdFALSE))
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xQueueSendFromISR(xRxedChars, &cChar, &xHigherPriorityTaskWoken);
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{
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xTaskWokenByRx = pdTRUE;
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}
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}
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}
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/* Acknowledge the interrupt at AIC level... */
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/* Acknowledge the interrupt at AIC level... */
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@ -153,7 +150,7 @@ unsigned portLONG ulStatus;
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ensure that the unblocked task is the task that executes when the interrupt
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ensure that the unblocked task is the task that executes when the interrupt
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completes if the unblocked task has a priority higher than the interrupted
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completes if the unblocked task has a priority higher than the interrupted
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task. */
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task. */
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if( xTaskWokenByTx || xTaskWokenByRx )
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if( xHigherPriorityTaskWoken )
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{
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{
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portYIELD_FROM_ISR();
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portYIELD_FROM_ISR();
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}
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}
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@ -576,7 +576,7 @@ unchanged by writing with a 1. */
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__arm void vUSB_ISR( void )
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__arm void vUSB_ISR( void )
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{
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{
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portBASE_TYPE xTaskWokenByPost = pdFALSE;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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static volatile unsigned portLONG ulNextMessage = 0;
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static volatile unsigned portLONG ulNextMessage = 0;
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xISRStatus *pxMessage;
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xISRStatus *pxMessage;
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unsigned portLONG ulTemp, ulRxBytes;
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unsigned portLONG ulTemp, ulRxBytes;
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@ -635,11 +635,11 @@ unsigned portLONG ulTemp, ulRxBytes;
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/* The message now contains the entire state and optional data from
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/* The message now contains the entire state and optional data from
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the USB interrupt. This can now be posted on the Rx queue ready for
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the USB interrupt. This can now be posted on the Rx queue ready for
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processing at the task level. */
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processing at the task level. */
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xTaskWokenByPost = xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, xTaskWokenByPost );
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xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
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/* We may want to switch to the USB task, if this message has made
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/* We may want to switch to the USB task, if this message has made
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it the highest priority task that is ready to execute. */
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it the highest priority task that is ready to execute. */
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portEND_SWITCHING_ISR( xTaskWokenByPost );
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portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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/* Clear the AIC ready for the next interrupt. */
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/* Clear the AIC ready for the next interrupt. */
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AT91C_BASE_AIC->AIC_EOICR = 0;
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AT91C_BASE_AIC->AIC_EOICR = 0;
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@ -218,7 +218,7 @@ __arm void vSerialISR( void )
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{
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{
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unsigned portLONG ulStatus;
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unsigned portLONG ulStatus;
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signed portCHAR cChar;
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signed portCHAR cChar;
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portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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/* What caused the interrupt? */
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/* What caused the interrupt? */
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ulStatus = serCOM0->US_CSR &= serCOM0->US_IMR;
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ulStatus = serCOM0->US_CSR &= serCOM0->US_IMR;
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@ -227,7 +227,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
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{
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{
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/* The interrupt was caused by the THR becoming empty. Are there any
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/* The interrupt was caused by the THR becoming empty. Are there any
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more characters to transmit? */
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more characters to transmit? */
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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{
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{
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/* A character was retrieved from the queue so can be sent to the
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/* A character was retrieved from the queue so can be sent to the
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THR now. */
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THR now. */
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@ -246,12 +246,12 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
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character from the RHR and place it in the queue or received
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character from the RHR and place it in the queue or received
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characters. */
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characters. */
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cChar = serCOM0->US_RHR;
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cChar = serCOM0->US_RHR;
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xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );
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xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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}
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}
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/* If a task was woken by either a character being received or a character
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/* If a task was woken by either a character being received or a character
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being transmitted then we may need to switch to another task. */
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being transmitted then we may need to switch to another task. */
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portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );
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portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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/* End the interrupt in the AIC. */
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/* End the interrupt in the AIC. */
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AT91C_BASE_AIC->AIC_EOICR = 0;
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AT91C_BASE_AIC->AIC_EOICR = 0;
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@ -99,7 +99,7 @@ extern xQueueHandle xUSBInterruptQueue;
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void vUSB_ISR_Handler( void )
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void vUSB_ISR_Handler( void )
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{
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{
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portBASE_TYPE xTaskWokenByPost = pdFALSE;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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static volatile unsigned portLONG ulNextMessage = 0;
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static volatile unsigned portLONG ulNextMessage = 0;
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xISRStatus *pxMessage;
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xISRStatus *pxMessage;
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unsigned portLONG ulTemp, ulRxBytes;
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unsigned portLONG ulTemp, ulRxBytes;
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@ -163,11 +163,11 @@ unsigned portLONG ulTemp, ulRxBytes;
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/* The message now contains the entire state and optional data from
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/* The message now contains the entire state and optional data from
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the USB interrupt. This can now be posted on the Rx queue ready for
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the USB interrupt. This can now be posted on the Rx queue ready for
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processing at the task level. */
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processing at the task level. */
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xTaskWokenByPost = xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, xTaskWokenByPost );
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xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
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/* We may want to switch to the USB task, if this message has made
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/* We may want to switch to the USB task, if this message has made
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it the highest priority task that is ready to execute. */
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it the highest priority task that is ready to execute. */
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if( xTaskWokenByPost )
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if( xHigherPriorityTaskWoken )
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{
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{
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portYIELD_FROM_ISR();
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portYIELD_FROM_ISR();
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}
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}
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@ -71,7 +71,7 @@ void vPassEMACSemaphore( xSemaphoreHandle xSemaphore )
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void vEMACISR_Handler( void )
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void vEMACISR_Handler( void )
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{
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{
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volatile unsigned portLONG ulIntStatus, ulRxStatus;
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volatile unsigned portLONG ulIntStatus, ulRxStatus;
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portBASE_TYPE xSwitchRequired = pdFALSE;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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ulIntStatus = AT91C_BASE_EMAC->EMAC_ISR;
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ulIntStatus = AT91C_BASE_EMAC->EMAC_ISR;
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ulRxStatus = AT91C_BASE_EMAC->EMAC_RSR;
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ulRxStatus = AT91C_BASE_EMAC->EMAC_RSR;
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@ -80,7 +80,7 @@ portBASE_TYPE xSwitchRequired = pdFALSE;
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{
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{
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/* A frame has been received, signal the uIP task so it can process
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/* A frame has been received, signal the uIP task so it can process
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the Rx descriptors. */
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the Rx descriptors. */
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xSwitchRequired = xSemaphoreGiveFromISR( xEMACSemaphore, pdFALSE );
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xSemaphoreGiveFromISR( xEMACSemaphore, &xHigherPriorityTaskWoken );
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AT91C_BASE_EMAC->EMAC_RSR = AT91C_EMAC_REC;
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AT91C_BASE_EMAC->EMAC_RSR = AT91C_EMAC_REC;
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}
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}
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@ -88,7 +88,7 @@ portBASE_TYPE xSwitchRequired = pdFALSE;
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AT91C_BASE_AIC->AIC_EOICR = 0;
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AT91C_BASE_AIC->AIC_EOICR = 0;
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/* Switch to the uIP task. */
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/* Switch to the uIP task. */
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if( xSwitchRequired )
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if( xHigherPriorityTaskWoken )
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{
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{
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/* If a task of higher priority than the interrupted task was
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/* If a task of higher priority than the interrupted task was
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unblocked by the ISR then this call will ensure that the
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unblocked by the ISR then this call will ensure that the
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@ -136,7 +136,7 @@ void vUART_ISR_Wrapper( void )
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void vUART_ISR_Handler( void )
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void vUART_ISR_Handler( void )
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{
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{
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signed portCHAR cChar;
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signed portCHAR cChar;
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portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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/* What caused the interrupt? */
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/* What caused the interrupt? */
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switch( UART0_IIR & serINTERRUPT_SOURCE_MASK )
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switch( UART0_IIR & serINTERRUPT_SOURCE_MASK )
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@ -147,7 +147,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
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case serSOURCE_THRE : /* The THRE is empty. If there is another
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case serSOURCE_THRE : /* The THRE is empty. If there is another
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character in the Tx queue, send it now. */
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character in the Tx queue, send it now. */
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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{
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{
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UART0_THR = cChar;
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UART0_THR = cChar;
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}
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}
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@ -164,17 +164,14 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
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case serSOURCE_RX : /* A character was received. Place it in
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case serSOURCE_RX : /* A character was received. Place it in
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the queue of received characters. */
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the queue of received characters. */
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cChar = UART0_RBR;
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cChar = UART0_RBR;
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if( xQueueSendFromISR( xRxedChars, &cChar, ( portBASE_TYPE ) pdFALSE ) )
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xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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{
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xTaskWokenByRx = pdTRUE;
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}
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break;
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break;
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default : /* There is nothing to do, leave the ISR. */
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default : /* There is nothing to do, leave the ISR. */
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break;
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break;
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}
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}
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if( xTaskWokenByTx || xTaskWokenByRx )
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if( xHigherPriorityTaskWoken )
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{
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{
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portYIELD_FROM_ISR();
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portYIELD_FROM_ISR();
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}
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}
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@ -257,7 +257,7 @@ signed portBASE_TYPE xReturn;
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__arm void vSerialISR( void )
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__arm void vSerialISR( void )
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{
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{
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signed portCHAR cChar;
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signed portCHAR cChar;
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portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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/* What caused the interrupt? */
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/* What caused the interrupt? */
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switch( U0IIR & serINTERRUPT_SOURCE_MASK )
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switch( U0IIR & serINTERRUPT_SOURCE_MASK )
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@ -268,7 +268,7 @@ portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
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case serSOURCE_THRE : /* The THRE is empty. If there is another
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case serSOURCE_THRE : /* The THRE is empty. If there is another
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character in the Tx queue, send it now. */
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character in the Tx queue, send it now. */
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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{
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{
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U0THR = cChar;
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U0THR = cChar;
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}
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}
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@ -285,10 +285,7 @@ portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
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case serSOURCE_RX : /* A character was received. Place it in
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case serSOURCE_RX : /* A character was received. Place it in
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the queue of received characters. */
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the queue of received characters. */
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cChar = U0RBR;
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cChar = U0RBR;
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if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
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xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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{
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xTaskWokenByRx = pdTRUE;
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}
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break;
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break;
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default : /* There is nothing to do, leave the ISR. */
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default : /* There is nothing to do, leave the ISR. */
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@ -297,7 +294,7 @@ portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
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/* Exit the ISR. If a task was woken by either a character being received
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/* Exit the ISR. If a task was woken by either a character being received
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or transmitted then a context switch will occur. */
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or transmitted then a context switch will occur. */
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portEND_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
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portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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/* Clear the ISR in the VIC. */
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/* Clear the ISR in the VIC. */
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VICVectAddr = serCLEAR_VIC_INTERRUPT;
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VICVectAddr = serCLEAR_VIC_INTERRUPT;
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@ -120,10 +120,9 @@ void vUART_ISR( void ) __task
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/* Now we can declare the local variables. */
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/* Now we can declare the local variables. */
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static signed portCHAR cChar;
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static signed portCHAR cChar;
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static portBASE_TYPE xTaskWokenByRx, xTaskWokenByTx;
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static portBASE_TYPE xHigherPriorityTaskWoken;
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xTaskWokenByTx = pdFALSE;
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xHigherPriorityTaskWoken = pdFALSE;
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xTaskWokenByRx = pdFALSE;
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/* What caused the interrupt? */
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/* What caused the interrupt? */
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switch( U0IIR & serINTERRUPT_SOURCE_MASK )
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switch( U0IIR & serINTERRUPT_SOURCE_MASK )
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@ -134,7 +133,7 @@ void vUART_ISR( void ) __task
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case serSOURCE_THRE : /* The THRE is empty. If there is another
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case serSOURCE_THRE : /* The THRE is empty. If there is another
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character in the Tx queue, send it now. */
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character in the Tx queue, send it now. */
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
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if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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{
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{
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U0THR = cChar;
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U0THR = cChar;
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}
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}
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@ -151,10 +150,7 @@ void vUART_ISR( void ) __task
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case serSOURCE_RX : /* A character was received. Place it in
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case serSOURCE_RX : /* A character was received. Place it in
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the queue of received characters. */
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the queue of received characters. */
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cChar = U0RBR;
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cChar = U0RBR;
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if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
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xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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{
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xTaskWokenByRx = pdTRUE;
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}
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break;
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break;
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default : /* There is nothing to do, leave the ISR. */
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default : /* There is nothing to do, leave the ISR. */
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@ -166,7 +162,7 @@ void vUART_ISR( void ) __task
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/* Exit the ISR. If a task was woken by either a character being received
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/* Exit the ISR. If a task was woken by either a character being received
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or transmitted then a context switch will occur. */
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or transmitted then a context switch will occur. */
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portEXIT_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
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portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
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}
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -64,8 +64,11 @@ void vButtonHandler( void );
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void vButtonHandler( void )
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void vButtonHandler( void )
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{
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{
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extern xSemaphoreHandle xButtonSemaphore;
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extern xSemaphoreHandle xButtonSemaphore;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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if( xSemaphoreGiveFromISR( xButtonSemaphore, pdFALSE ) )
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xSemaphoreGiveFromISR( xButtonSemaphore, &xHigherPriorityTaskWoken );
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if( xHigherPriorityTaskWoken )
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{
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{
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/* We have woken a task. Calling "yield from ISR" here will ensure
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/* We have woken a task. Calling "yield from ISR" here will ensure
|
||||||
the interrupt returns to the woken task if it has a priority higher
|
the interrupt returns to the woken task if it has a priority higher
|
||||||
|
|
|
@ -13,14 +13,16 @@ extern xSemaphoreHandle xEMACSemaphore;
|
||||||
|
|
||||||
void vEMAC_ISR_Handler( void )
|
void vEMAC_ISR_Handler( void )
|
||||||
{
|
{
|
||||||
portBASE_TYPE xSwitchRequired = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Clear the interrupt. */
|
/* Clear the interrupt. */
|
||||||
MAC_INTCLEAR = 0xffff;
|
MAC_INTCLEAR = 0xffff;
|
||||||
VICVectAddr = 0;
|
VICVectAddr = 0;
|
||||||
|
|
||||||
/* Ensure the uIP task is not blocked as data has arrived. */
|
/* Ensure the uIP task is not blocked as data has arrived. */
|
||||||
if( xSemaphoreGiveFromISR( xEMACSemaphore, pdFALSE ) )
|
xSemaphoreGiveFromISR( xEMACSemaphore, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
/* Giving the semaphore woke a task. */
|
/* Giving the semaphore woke a task. */
|
||||||
portYIELD_FROM_ISR();
|
portYIELD_FROM_ISR();
|
||||||
|
|
|
@ -13,12 +13,16 @@ extern xSemaphoreHandle xEMACSemaphore;
|
||||||
|
|
||||||
void vEMAC_ISR_Handler( void )
|
void vEMAC_ISR_Handler( void )
|
||||||
{
|
{
|
||||||
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Clear the interrupt. */
|
/* Clear the interrupt. */
|
||||||
IntClear = 0xffff;
|
IntClear = 0xffff;
|
||||||
VICVectAddr = 0;
|
VICVectAddr = 0;
|
||||||
|
|
||||||
/* Ensure the uIP task is not blocked as data has arrived. */
|
/* Ensure the uIP task is not blocked as data has arrived. */
|
||||||
if( xSemaphoreGiveFromISR( xEMACSemaphore, pdFALSE ) )
|
xSemaphoreGiveFromISR( xEMACSemaphore, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
/* If the uIP task was unblocked then calling "Yield from ISR" here
|
/* If the uIP task was unblocked then calling "Yield from ISR" here
|
||||||
will ensure the interrupt returns directly to the uIP task, if it
|
will ensure the interrupt returns directly to the uIP task, if it
|
||||||
|
|
|
@ -213,7 +213,7 @@ __arm void vSerialISR( void )
|
||||||
{
|
{
|
||||||
unsigned portSHORT usStatus;
|
unsigned portSHORT usStatus;
|
||||||
signed portCHAR cChar;
|
signed portCHAR cChar;
|
||||||
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* What caused the interrupt? */
|
/* What caused the interrupt? */
|
||||||
usStatus = UART_FlagStatus( UART0 );
|
usStatus = UART_FlagStatus( UART0 );
|
||||||
|
@ -222,7 +222,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
|
||||||
{
|
{
|
||||||
/* The interrupt was caused by the THR becoming empty. Are there any
|
/* The interrupt was caused by the THR becoming empty. Are there any
|
||||||
more characters to transmit? */
|
more characters to transmit? */
|
||||||
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
|
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||||
{
|
{
|
||||||
/* A character was retrieved from the queue so can be sent to the
|
/* A character was retrieved from the queue so can be sent to the
|
||||||
THR now. */
|
THR now. */
|
||||||
|
@ -241,12 +241,12 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
|
||||||
character from the RHR and place it in the queue of received
|
character from the RHR and place it in the queue of received
|
||||||
characters. */
|
characters. */
|
||||||
cChar = UART0->RxBUFR;
|
cChar = UART0->RxBUFR;
|
||||||
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If a task was woken by either a character being received or a character
|
/* If a task was woken by either a character being received or a character
|
||||||
being transmitted then we may need to switch to another task. */
|
being transmitted then we may need to switch to another task. */
|
||||||
portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );
|
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
/* End the interrupt in the EIC. */
|
/* End the interrupt in the EIC. */
|
||||||
portCLEAR_EIC();
|
portCLEAR_EIC();
|
||||||
|
|
|
@ -77,7 +77,7 @@ void vConfigureQueues( xQueueHandle xQForRx, xQueueHandle xQForTx, portBASE_TYPE
|
||||||
void vSerialISR( void )
|
void vSerialISR( void )
|
||||||
{
|
{
|
||||||
signed portCHAR cChar;
|
signed portCHAR cChar;
|
||||||
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
do
|
do
|
||||||
{
|
{
|
||||||
|
@ -85,7 +85,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
|
||||||
{
|
{
|
||||||
/* The interrupt was caused by the THR becoming empty. Are there any
|
/* The interrupt was caused by the THR becoming empty. Are there any
|
||||||
more characters to transmit? */
|
more characters to transmit? */
|
||||||
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
|
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||||
{
|
{
|
||||||
/* A character was retrieved from the queue so can be sent to the
|
/* A character was retrieved from the queue so can be sent to the
|
||||||
THR now. */
|
THR now. */
|
||||||
|
@ -105,14 +105,14 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
|
||||||
character from the RHR and place it in the queue of received
|
character from the RHR and place it in the queue of received
|
||||||
characters. */
|
characters. */
|
||||||
cChar = UART0->DR;
|
cChar = UART0->DR;
|
||||||
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
UART_ClearITPendingBit( UART0, UART_IT_Receive );
|
UART_ClearITPendingBit( UART0, UART_IT_Receive );
|
||||||
}
|
}
|
||||||
} while( UART0->MIS );
|
} while( UART0->MIS );
|
||||||
|
|
||||||
/* If a task was woken by either a character being received or a character
|
/* If a task was woken by either a character being received or a character
|
||||||
being transmitted then we may need to switch to another task. */
|
being transmitted then we may need to switch to another task. */
|
||||||
portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );
|
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -235,7 +235,7 @@ void vSerialClose( xComPortHandle xPort )
|
||||||
__arm void vSerialISR( void )
|
__arm void vSerialISR( void )
|
||||||
{
|
{
|
||||||
signed portCHAR cChar;
|
signed portCHAR cChar;
|
||||||
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
do
|
do
|
||||||
{
|
{
|
||||||
|
@ -243,7 +243,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
|
||||||
{
|
{
|
||||||
/* The interrupt was caused by the THR becoming empty. Are there any
|
/* The interrupt was caused by the THR becoming empty. Are there any
|
||||||
more characters to transmit? */
|
more characters to transmit? */
|
||||||
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
|
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||||
{
|
{
|
||||||
/* A character was retrieved from the queue so can be sent to the
|
/* A character was retrieved from the queue so can be sent to the
|
||||||
THR now. */
|
THR now. */
|
||||||
|
@ -263,14 +263,14 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
|
||||||
character from the RHR and place it in the queue of received
|
character from the RHR and place it in the queue of received
|
||||||
characters. */
|
characters. */
|
||||||
cChar = UART0->DR;
|
cChar = UART0->DR;
|
||||||
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
UART_ClearITPendingBit( UART0, UART_IT_Receive );
|
UART_ClearITPendingBit( UART0, UART_IT_Receive );
|
||||||
}
|
}
|
||||||
} while( UART0->MIS );
|
} while( UART0->MIS );
|
||||||
|
|
||||||
/* If a task was woken by either a character being received or a character
|
/* If a task was woken by either a character being received or a character
|
||||||
being transmitted then we may need to switch to another task. */
|
being transmitted then we may need to switch to another task. */
|
||||||
portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );
|
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -415,16 +415,16 @@ ethernetif_init(struct netif *netif)
|
||||||
|
|
||||||
void ENET_IRQHandler(void)
|
void ENET_IRQHandler(void)
|
||||||
{
|
{
|
||||||
portBASE_TYPE xSwitchRequired;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Give the semaphore in case the lwIP task needs waking. */
|
/* Give the semaphore in case the lwIP task needs waking. */
|
||||||
xSwitchRequired = xSemaphoreGiveFromISR( s_xSemaphore, pdFALSE );
|
xSemaphoreGiveFromISR( s_xSemaphore, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
/* Clear the interrupt. */
|
/* Clear the interrupt. */
|
||||||
ENET_DMA->ISR = DMI_RX_CURRENT_DONE;
|
ENET_DMA->ISR = DMI_RX_CURRENT_DONE;
|
||||||
|
|
||||||
/* Switch tasks if necessary. */
|
/* Switch tasks if necessary. */
|
||||||
portEND_SWITCHING_ISR( xSwitchRequired );
|
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -270,7 +270,7 @@ void vSerialClose( xComPortHandle xPort )
|
||||||
void UART1_IRQHandler( void )
|
void UART1_IRQHandler( void )
|
||||||
{
|
{
|
||||||
signed portCHAR cChar;
|
signed portCHAR cChar;
|
||||||
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
while( UART1->RIS & mainRXRIS )
|
while( UART1->RIS & mainRXRIS )
|
||||||
{
|
{
|
||||||
|
@ -278,7 +278,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
|
||||||
character from the DR and place it in the queue of received
|
character from the DR and place it in the queue of received
|
||||||
characters. */
|
characters. */
|
||||||
cChar = UART1->DR;
|
cChar = UART1->DR;
|
||||||
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByPost );
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
if( UART1->RIS & mainTXRIS )
|
if( UART1->RIS & mainTXRIS )
|
||||||
|
@ -287,7 +287,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
|
||||||
{
|
{
|
||||||
/* This interrupt was caused by space becoming available on the Tx
|
/* This interrupt was caused by space becoming available on the Tx
|
||||||
FIFO, wake any task that is waiting to post (if any). */
|
FIFO, wake any task that is waiting to post (if any). */
|
||||||
xTaskWokenByTx = xSemaphoreGiveFromISR( xTxFIFOSemaphore, xTaskWokenByTx );
|
xSemaphoreGiveFromISR( xTxFIFOSemaphore, &xHigherPriorityTaskWoken );
|
||||||
lTaskWaiting = pdFALSE;
|
lTaskWaiting = pdFALSE;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -296,7 +296,7 @@ portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByPost = pdFALSE;
|
||||||
|
|
||||||
/* If a task was woken by either a character being received or a character
|
/* If a task was woken by either a character being received or a character
|
||||||
being transmitted then we may need to switch to another task. */
|
being transmitted then we may need to switch to another task. */
|
||||||
portEND_SWITCHING_ISR( ( xTaskWokenByPost || xTaskWokenByTx ) );
|
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -297,16 +297,16 @@ static unsigned portCHAR *pcTxData;
|
||||||
|
|
||||||
void ENET_IRQHandler(void)
|
void ENET_IRQHandler(void)
|
||||||
{
|
{
|
||||||
portBASE_TYPE xSwitchRequired;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Give the semaphore in case the uIP task needs waking. */
|
/* Give the semaphore in case the uIP task needs waking. */
|
||||||
xSwitchRequired = xSemaphoreGiveFromISR( xSemaphore, pdFALSE );
|
xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
/* Clear the interrupt. */
|
/* Clear the interrupt. */
|
||||||
ENET_DMA->ISR = uipDMI_RX_CURRENT_DONE;
|
ENET_DMA->ISR = uipDMI_RX_CURRENT_DONE;
|
||||||
|
|
||||||
/* Switch tasks if necessary. */
|
/* Switch tasks if necessary. */
|
||||||
portEND_SWITCHING_ISR( xSwitchRequired );
|
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -25,7 +25,7 @@
|
||||||
"C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\bin\cspybat" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\avr32proc.dll" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\avr32jtagicemkII.dll" %1 --plugin "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\<libsupport_plugin>" --backend -B "--core" "avr32a" "--avr32_simd_instructions" "disabled" "--avr32_dsp_instructions" "enabled" "--avr32_rmw_instructions" "enabled" "-p" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\config\iouc3a0512.ddf" "-d" "jtagicemkII" "--drv_communication" "USB" "--jtagice_clock" "100000"
|
"C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\bin\cspybat" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\avr32proc.dll" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\avr32jtagicemkII.dll" %1 --plugin "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\bin\<libsupport_plugin>" --backend -B "--core" "avr32a" "--avr32_simd_instructions" "disabled" "--avr32_dsp_instructions" "enabled" "--avr32_rmw_instructions" "enabled" "-p" "C:\Devtools\IAR Systems\Embedded Workbench 4.0\avr32\config\iouc3a0512.ddf" "-d" "jtagicemkII" "--drv_communication" "USB" "--jtagice_clock" "100000"
|
||||||
|
|
||||||
|
|
||||||
@REM loaded plugins:
|
@REM Loaded plugins:
|
||||||
@REM avr32LibSupport.dll
|
@REM avr32LibSupport.dll
|
||||||
@REM C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\CodeCoverage\CodeCoverage.dll
|
@REM C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\CodeCoverage\CodeCoverage.dll
|
||||||
@REM C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\Profiling\Profiling.dll
|
@REM C:\Devtools\IAR Systems\Embedded Workbench 4.0\common\plugins\Profiling\Profiling.dll
|
||||||
|
|
|
@ -89,7 +89,7 @@ static portBASE_TYPE prvUSART_ISR_NonNakedBehaviour( void )
|
||||||
{
|
{
|
||||||
/* Now we can declare the local variables. */
|
/* Now we can declare the local variables. */
|
||||||
signed portCHAR cChar;
|
signed portCHAR cChar;
|
||||||
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
unsigned portLONG ulStatus;
|
unsigned portLONG ulStatus;
|
||||||
volatile avr32_usart_t *usart = serialPORT_USART;
|
volatile avr32_usart_t *usart = serialPORT_USART;
|
||||||
portBASE_TYPE retstatus;
|
portBASE_TYPE retstatus;
|
||||||
|
@ -104,7 +104,7 @@ static portBASE_TYPE prvUSART_ISR_NonNakedBehaviour( void )
|
||||||
Because FreeRTOS is not supposed to run with nested interrupts, put all OS
|
Because FreeRTOS is not supposed to run with nested interrupts, put all OS
|
||||||
calls in a critical section . */
|
calls in a critical section . */
|
||||||
portENTER_CRITICAL();
|
portENTER_CRITICAL();
|
||||||
retstatus = xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx );
|
retstatus = xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken );
|
||||||
portEXIT_CRITICAL();
|
portEXIT_CRITICAL();
|
||||||
|
|
||||||
if (retstatus == pdTRUE)
|
if (retstatus == pdTRUE)
|
||||||
|
@ -128,18 +128,13 @@ static portBASE_TYPE prvUSART_ISR_NonNakedBehaviour( void )
|
||||||
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
|
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
|
||||||
calls in a critical section . */
|
calls in a critical section . */
|
||||||
portENTER_CRITICAL();
|
portENTER_CRITICAL();
|
||||||
retstatus = xQueueSendFromISR(xRxedChars, &cChar, pdFALSE);
|
retstatus = xQueueSendFromISR(xRxedChars, &cChar, &xHigherPriorityTaskWoken);
|
||||||
portEXIT_CRITICAL();
|
portEXIT_CRITICAL();
|
||||||
|
|
||||||
if( retstatus )
|
|
||||||
{
|
|
||||||
xTaskWokenByRx = pdTRUE;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* The return value will be used by portEXIT_SWITCHING_ISR() to know if it
|
/* The return value will be used by portEXIT_SWITCHING_ISR() to know if it
|
||||||
should perform a vTaskSwitchContext(). */
|
should perform a vTaskSwitchContext(). */
|
||||||
return ( xTaskWokenByTx || xTaskWokenByRx );
|
return ( xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -181,13 +181,16 @@ unsigned portCHAR ucByte;
|
||||||
__interrupt void SIG_UART_RECV( void )
|
__interrupt void SIG_UART_RECV( void )
|
||||||
{
|
{
|
||||||
signed portCHAR cChar;
|
signed portCHAR cChar;
|
||||||
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Get the character and post it on the queue of Rxed characters.
|
/* Get the character and post it on the queue of Rxed characters.
|
||||||
If the post causes a task to wake force a context switch as the woken task
|
If the post causes a task to wake force a context switch as the woken task
|
||||||
may have a higher priority than the task we have interrupted. */
|
may have a higher priority than the task we have interrupted. */
|
||||||
cChar = UDR;
|
cChar = UDR;
|
||||||
|
|
||||||
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
|
if( xHigherPriorityTaskWoken != pdFALSE )
|
||||||
{
|
{
|
||||||
taskYIELD();
|
taskYIELD();
|
||||||
}
|
}
|
||||||
|
|
|
@ -188,7 +188,7 @@ portSHORT main( void )
|
||||||
vStartRegTestTasks();
|
vStartRegTestTasks();
|
||||||
|
|
||||||
/* Create the tasks defined within this file. */
|
/* Create the tasks defined within this file. */
|
||||||
xTaskCreate( vErrorChecks, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
|
xTaskCreate( vErrorChecks, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
|
||||||
|
|
||||||
/* Create the co-routines that flash the LED's. */
|
/* Create the co-routines that flash the LED's. */
|
||||||
vStartFlashCoRoutines( mainNUM_FLASH_COROUTINES );
|
vStartFlashCoRoutines( mainNUM_FLASH_COROUTINES );
|
||||||
|
|
|
@ -210,13 +210,16 @@ unsigned portCHAR ucByte;
|
||||||
SIGNAL( SIG_UART_RECV )
|
SIGNAL( SIG_UART_RECV )
|
||||||
{
|
{
|
||||||
signed portCHAR cChar;
|
signed portCHAR cChar;
|
||||||
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Get the character and post it on the queue of Rxed characters.
|
/* Get the character and post it on the queue of Rxed characters.
|
||||||
If the post causes a task to wake force a context switch as the woken task
|
If the post causes a task to wake force a context switch as the woken task
|
||||||
may have a higher priority than the task we have interrupted. */
|
may have a higher priority than the task we have interrupted. */
|
||||||
cChar = UDR;
|
cChar = UDR;
|
||||||
|
|
||||||
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
|
if( xHigherPriorityTaskWoken != pdFALSE )
|
||||||
{
|
{
|
||||||
taskYIELD();
|
taskYIELD();
|
||||||
}
|
}
|
||||||
|
|
|
@ -124,7 +124,7 @@ unsigned portCHAR ucOriginalSFRPage;
|
||||||
void vSerialISR( void ) interrupt 4
|
void vSerialISR( void ) interrupt 4
|
||||||
{
|
{
|
||||||
portCHAR cChar;
|
portCHAR cChar;
|
||||||
portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* 8051 port interrupt routines MUST be placed within a critical section
|
/* 8051 port interrupt routines MUST be placed within a critical section
|
||||||
if taskYIELD() is used within the ISR! */
|
if taskYIELD() is used within the ISR! */
|
||||||
|
@ -134,20 +134,17 @@ portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
|
||||||
if( RI )
|
if( RI )
|
||||||
{
|
{
|
||||||
/* Get the character and post it on the queue of Rxed characters.
|
/* Get the character and post it on the queue of Rxed characters.
|
||||||
If the post causes a task to wake force a context switch as the woken task
|
If the post causes a task to wake force a context switch if the woken task
|
||||||
may have a higher priority than the task we have interrupted. */
|
has a higher priority than the task we have interrupted. */
|
||||||
cChar = SBUF;
|
cChar = SBUF;
|
||||||
RI = 0;
|
RI = 0;
|
||||||
|
|
||||||
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
{
|
|
||||||
xTaskWokenByRx = ( portBASE_TYPE ) pdTRUE;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
if( TI )
|
if( TI )
|
||||||
{
|
{
|
||||||
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == ( portBASE_TYPE ) pdTRUE )
|
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == ( portBASE_TYPE ) pdTRUE )
|
||||||
{
|
{
|
||||||
/* Send the next character queued for Tx. */
|
/* Send the next character queued for Tx. */
|
||||||
SBUF = cChar;
|
SBUF = cChar;
|
||||||
|
@ -161,7 +158,7 @@ portBASE_TYPE xTaskWokenByRx = pdFALSE, xTaskWokenByTx = pdFALSE;
|
||||||
TI = 0;
|
TI = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
if( xTaskWokenByRx || xTaskWokenByTx )
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
portYIELD();
|
portYIELD();
|
||||||
}
|
}
|
||||||
|
|
|
@ -435,7 +435,7 @@ static portBASE_TYPE xComPortISR( xComPort * const pxPort )
|
||||||
{
|
{
|
||||||
unsigned portSHORT usStatusRegister;
|
unsigned portSHORT usStatusRegister;
|
||||||
portCHAR cChar;
|
portCHAR cChar;
|
||||||
portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE, xContinue = pdTRUE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, xContinue = pdTRUE;
|
||||||
|
|
||||||
/* NOTE: THIS IS NOT AN EFFICIENT ISR AS IT IS DESIGNED SOLELY TO TEST
|
/* NOTE: THIS IS NOT AN EFFICIENT ISR AS IT IS DESIGNED SOLELY TO TEST
|
||||||
THE SCHEDULER FUNCTIONALITY. REAL APPLICATIONS SHOULD NOT USE THIS
|
THE SCHEDULER FUNCTIONALITY. REAL APPLICATIONS SHOULD NOT USE THIS
|
||||||
|
@ -450,10 +450,10 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTa
|
||||||
if( usStatusRegister & serRX_READY )
|
if( usStatusRegister & serRX_READY )
|
||||||
{
|
{
|
||||||
cChar = ( portCHAR ) portINPUT_WORD( pxPort->usRxReg );
|
cChar = ( portCHAR ) portINPUT_WORD( pxPort->usRxReg );
|
||||||
xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cChar, xTaskWokenByPost );
|
xQueueSendFromISR( pxPort->xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
/* Also release the semaphore - this does nothing interesting and is just a test. */
|
/* Also release the semaphore - this does nothing interesting and is just a test. */
|
||||||
xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );
|
xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
/* We have performed an action this cycle - there may be other to perform. */
|
/* We have performed an action this cycle - there may be other to perform. */
|
||||||
xContinue = pdTRUE;
|
xContinue = pdTRUE;
|
||||||
|
@ -461,7 +461,7 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTa
|
||||||
|
|
||||||
if( pxPort->sTxInterruptOn && ( usStatusRegister & serTX_EMPTY ) )
|
if( pxPort->sTxInterruptOn && ( usStatusRegister & serTX_EMPTY ) )
|
||||||
{
|
{
|
||||||
if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
|
if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||||
{
|
{
|
||||||
portOUTPUT_WORD( pxPort->usTxReg, ( unsigned portSHORT ) cChar );
|
portOUTPUT_WORD( pxPort->usTxReg, ( unsigned portSHORT ) cChar );
|
||||||
|
|
||||||
|
@ -481,17 +481,11 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTa
|
||||||
/* If posting to the queue woke a task that was blocked on the queue we may
|
/* If posting to the queue woke a task that was blocked on the queue we may
|
||||||
want to switch to the woken task - depending on its priority relative to
|
want to switch to the woken task - depending on its priority relative to
|
||||||
the task interrupted by this ISR. */
|
the task interrupted by this ISR. */
|
||||||
if( xTaskWokenByPost || xAnotherTaskWokenByPost || xTaskWokenByTx)
|
return xHigherPriorityTaskWoken;
|
||||||
{
|
|
||||||
return pdTRUE;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
return pdFALSE;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -204,14 +204,16 @@ void vCOM_1_Rx_ISR( void )
|
||||||
/* As this is a switching ISR the local variables must be declared as
|
/* As this is a switching ISR the local variables must be declared as
|
||||||
static. */
|
static. */
|
||||||
static portCHAR cRxByte;
|
static portCHAR cRxByte;
|
||||||
static portBASE_TYPE xTaskWokenByPost;
|
static portBASE_TYPE xHigherPriorityTaskWoken;
|
||||||
|
|
||||||
|
xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Get the character. */
|
/* Get the character. */
|
||||||
cRxByte = RDR1;
|
cRxByte = RDR1;
|
||||||
|
|
||||||
/* Post the character onto the queue of received characters - noting
|
/* Post the character onto the queue of received characters - noting
|
||||||
whether or not this wakes a task. */
|
whether or not this wakes a task. */
|
||||||
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, &cRxByte, pdFALSE );
|
xQueueSendFromISR( xRxedChars, &cRxByte, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
/* Clear the interrupt. */
|
/* Clear the interrupt. */
|
||||||
SSR1 &= ~serRX_INTERRUPT;
|
SSR1 &= ~serRX_INTERRUPT;
|
||||||
|
@ -219,7 +221,7 @@ void vCOM_1_Rx_ISR( void )
|
||||||
/* This must be the last line in the function. We pass cTaskWokenByPost so
|
/* This must be the last line in the function. We pass cTaskWokenByPost so
|
||||||
a context switch will occur if the received character woke a task that has
|
a context switch will occur if the received character woke a task that has
|
||||||
a priority higher than the task we interrupted. */
|
a priority higher than the task we interrupted. */
|
||||||
portEXIT_SWITCHING_ISR( xTaskWokenByPost );
|
portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -146,7 +146,7 @@ void vSerialClose( xComPortHandle xPort )
|
||||||
__interrupt void vCOM0_ISR( void )
|
__interrupt void vCOM0_ISR( void )
|
||||||
{
|
{
|
||||||
volatile unsigned portCHAR ucByte, ucStatus;
|
volatile unsigned portCHAR ucByte, ucStatus;
|
||||||
portBASE_TYPE xTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* What caused the interrupt? */
|
/* What caused the interrupt? */
|
||||||
ucStatus = SCI0SR1;
|
ucStatus = SCI0SR1;
|
||||||
|
@ -166,13 +166,13 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
|
||||||
|
|
||||||
/* Post the character onto the queue of received characters - noting
|
/* Post the character onto the queue of received characters - noting
|
||||||
whether or not this wakes a task. */
|
whether or not this wakes a task. */
|
||||||
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, ( void * ) &ucByte, pdFALSE );
|
xQueueSendFromISR( xRxedChars, ( void * ) &ucByte, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
if( ( ucStatus & serTX_INTERRUPT ) && ( SCI0CR2_SCTIE ) )
|
if( ( ucStatus & serTX_INTERRUPT ) && ( SCI0CR2_SCTIE ) )
|
||||||
{
|
{
|
||||||
/* The interrupt was caused by a character being transmitted. */
|
/* The interrupt was caused by a character being transmitted. */
|
||||||
if( xQueueReceiveFromISR( xCharsForTx, ( void * ) &ucByte, &xTaskWokenByTx ) == pdTRUE )
|
if( xQueueReceiveFromISR( xCharsForTx, ( void * ) &ucByte, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||||
{
|
{
|
||||||
/* Clear the SCRF bit. */
|
/* Clear the SCRF bit. */
|
||||||
SCI0DRL = ucByte;
|
SCI0DRL = ucByte;
|
||||||
|
@ -184,7 +184,7 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if( ( xTaskWokenByPost ) || ( xTaskWokenByTx ) )
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
portYIELD();
|
portYIELD();
|
||||||
}
|
}
|
||||||
|
|
|
@ -355,6 +355,9 @@ unsigned portBASE_TYPE uxExpected = 1, uxReceived;
|
||||||
void interrupt vButtonPush( void )
|
void interrupt vButtonPush( void )
|
||||||
{
|
{
|
||||||
static unsigned portBASE_TYPE uxValToSend = 0;
|
static unsigned portBASE_TYPE uxValToSend = 0;
|
||||||
|
static unsigned portLONG xHigherPriorityTaskWoken;
|
||||||
|
|
||||||
|
xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Send an incrementing value to the button push task each run. */
|
/* Send an incrementing value to the button push task each run. */
|
||||||
uxValToSend++;
|
uxValToSend++;
|
||||||
|
@ -366,7 +369,9 @@ unsigned portBASE_TYPE uxExpected = 1, uxReceived;
|
||||||
blocked waiting for the data. As the button push task is high priority
|
blocked waiting for the data. As the button push task is high priority
|
||||||
it will wake and a context switch should be performed before leaving
|
it will wake and a context switch should be performed before leaving
|
||||||
the ISR. */
|
the ISR. */
|
||||||
if( xQueueSendFromISR( xButtonQueue, &uxValToSend, pdFALSE ) )
|
xQueueSendFromISR( xButtonQueue, &uxValToSend, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
/* NOTE: This macro can only be used if there are no local
|
/* NOTE: This macro can only be used if there are no local
|
||||||
variables defined. This function uses a static variable so it's
|
variables defined. This function uses a static variable so it's
|
||||||
|
|
|
@ -103,7 +103,7 @@ void ATTR_INT ATTR_NEAR vCOM_ISR( void );
|
||||||
void vCOM_ISR( void )
|
void vCOM_ISR( void )
|
||||||
{
|
{
|
||||||
volatile unsigned portCHAR ucByte, ucStatus;
|
volatile unsigned portCHAR ucByte, ucStatus;
|
||||||
portBASE_TYPE xTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* What caused the interrupt? */
|
/* What caused the interrupt? */
|
||||||
ucStatus = SCISR1;
|
ucStatus = SCISR1;
|
||||||
|
@ -123,13 +123,13 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
|
||||||
|
|
||||||
/* Post the character onto the queue of received characters - noting
|
/* Post the character onto the queue of received characters - noting
|
||||||
whether or not this wakes a task. */
|
whether or not this wakes a task. */
|
||||||
xTaskWokenByPost = xQueueSendFromISR( xRxedChars, ( void * ) &ucByte, pdFALSE );
|
xQueueSendFromISR( xRxedChars, ( void * ) &ucByte, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
if( ( ucStatus & serTX_INTERRUPT ) && ( SCICR2 & 0x80 ) )
|
if( ( ucStatus & serTX_INTERRUPT ) && ( SCICR2 & 0x80 ) )
|
||||||
{
|
{
|
||||||
/* The interrupt was caused by a character being transmitted. */
|
/* The interrupt was caused by a character being transmitted. */
|
||||||
if( xQueueReceiveFromISR( xCharsForTx, ( void * ) &ucByte, &xTaskWokenByTx ) == pdTRUE )
|
if( xQueueReceiveFromISR( xCharsForTx, ( void * ) &ucByte, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||||
{
|
{
|
||||||
/* Clear the SCRF bit. */
|
/* Clear the SCRF bit. */
|
||||||
SCIDRL = ucByte;
|
SCIDRL = ucByte;
|
||||||
|
@ -141,10 +141,9 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if( ( xTaskWokenByPost ) || ( xTaskWokenByTx ) )
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
portYIELD();
|
portYIELD();
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -176,12 +176,15 @@ signed portBASE_TYPE xReturn;
|
||||||
__interrupt void UART2_RxISR (void)
|
__interrupt void UART2_RxISR (void)
|
||||||
{
|
{
|
||||||
signed portCHAR cChar;
|
signed portCHAR cChar;
|
||||||
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Get the character from the UART and post it on the queue of Rxed
|
/* Get the character from the UART and post it on the queue of Rxed
|
||||||
characters. */
|
characters. */
|
||||||
cChar = RDR02;
|
cChar = RDR02;
|
||||||
|
|
||||||
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
/*If the post causes a task to wake force a context switch
|
/*If the post causes a task to wake force a context switch
|
||||||
as the woken task may have a higher priority than the task we have
|
as the woken task may have a higher priority than the task we have
|
||||||
|
|
|
@ -209,7 +209,8 @@ static void vUART5Task( void *pvParameters )
|
||||||
__interrupt void UART5_RxISR( void )
|
__interrupt void UART5_RxISR( void )
|
||||||
{
|
{
|
||||||
unsigned portCHAR ch;
|
unsigned portCHAR ch;
|
||||||
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
ch = RDR05;
|
ch = RDR05;
|
||||||
xQueueSendFromISR( xQueue, &ch, pdFALSE );
|
xQueueSendFromISR( xQueue, &ch, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
|
@ -184,12 +184,15 @@ signed portBASE_TYPE xReturn;
|
||||||
__interrupt void UART0_RxISR( void )
|
__interrupt void UART0_RxISR( void )
|
||||||
{
|
{
|
||||||
volatile signed portCHAR cChar;
|
volatile signed portCHAR cChar;
|
||||||
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Get the character from the UART and post it on the queue of Rxed
|
/* Get the character from the UART and post it on the queue of Rxed
|
||||||
characters. */
|
characters. */
|
||||||
cChar = RDR0;
|
cChar = RDR0;
|
||||||
|
|
||||||
if( xQueueSendFromISR( xRxedChars, ( const void *const ) &cChar, (signed portBASE_TYPE) pdFALSE ) )
|
xQueueSendFromISR( xRxedChars, ( const void *const ) &cChar, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
/*If the post causes a task to wake force a context switch
|
/*If the post causes a task to wake force a context switch
|
||||||
as the woken task may have a higher priority than the task we have
|
as the woken task may have a higher priority than the task we have
|
||||||
|
|
|
@ -220,7 +220,8 @@ static void vUART0Task( void *pvParameters )
|
||||||
__interrupt void UART0_TraceRxISR( void )
|
__interrupt void UART0_TraceRxISR( void )
|
||||||
{
|
{
|
||||||
unsigned portCHAR ch;
|
unsigned portCHAR ch;
|
||||||
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
ch = RDR0;
|
ch = RDR0;
|
||||||
xQueueSendFromISR( xQueue, &ch, pdFALSE );
|
xQueueSendFromISR( xQueue, &ch, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
|
@ -270,7 +270,7 @@ void
|
||||||
prvSerialISR( void )
|
prvSerialISR( void )
|
||||||
{
|
{
|
||||||
static signed portCHAR cChar;
|
static signed portCHAR cChar;
|
||||||
static portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
|
static portBASE_TYPE xHigherPriorityTaskWoken;
|
||||||
|
|
||||||
/* We have to remvoe the effect of the GCC. Please note that the
|
/* We have to remvoe the effect of the GCC. Please note that the
|
||||||
* __attribute__ ((interrupt_handler)) does not work here because we
|
* __attribute__ ((interrupt_handler)) does not work here because we
|
||||||
|
@ -285,12 +285,13 @@ prvSerialISR( void )
|
||||||
* variable declarations.
|
* variable declarations.
|
||||||
*/
|
*/
|
||||||
portENTER_SWITCHING_ISR();
|
portENTER_SWITCHING_ISR();
|
||||||
|
xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Ready to send a character from the buffer. */
|
/* Ready to send a character from the buffer. */
|
||||||
if( MCF_UART_USR0 & MCF_UART_USR_TXRDY )
|
if( MCF_UART_USR0 & MCF_UART_USR_TXRDY )
|
||||||
{
|
{
|
||||||
/* Transmit buffer is ready. Test if there are characters available. */
|
/* Transmit buffer is ready. Test if there are characters available. */
|
||||||
if( xQueueReceiveFromISR( xComPortIF[ 0 ].xTXChars, &cChar, &xTaskWokenByTx ) ==
|
if( xQueueReceiveFromISR( xComPortIF[ 0 ].xTXChars, &cChar, &xHigherPriorityTaskWoken ) ==
|
||||||
pdTRUE )
|
pdTRUE )
|
||||||
{
|
{
|
||||||
/* A character was retrieved from the queue so can be sent. */
|
/* A character was retrieved from the queue so can be sent. */
|
||||||
|
@ -305,11 +306,10 @@ prvSerialISR( void )
|
||||||
if( MCF_UART_USR0 & MCF_UART_USR_RXRDY )
|
if( MCF_UART_USR0 & MCF_UART_USR_RXRDY )
|
||||||
{
|
{
|
||||||
cChar = MCF_UART_URB0;
|
cChar = MCF_UART_URB0;
|
||||||
xTaskWokenByRx =
|
xQueueSendFromISR( xComPortIF[ 0].xRXChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
xQueueSendFromISR( xComPortIF[ 0].xRXChars, &cChar, xTaskWokenByRx );
|
|
||||||
}
|
}
|
||||||
/* Exit the ISR. If a task was woken by either a character being
|
/* Exit the ISR. If a task was woken by either a character being
|
||||||
* or transmitted then a context switch will occur.
|
* or transmitted then a context switch will occur.
|
||||||
*/
|
*/
|
||||||
portEXIT_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
|
portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
|
@ -178,7 +178,7 @@ void vSerialClose( xComPortHandle xPort )
|
||||||
void vSerialISR( void *pvBaseAddress )
|
void vSerialISR( void *pvBaseAddress )
|
||||||
{
|
{
|
||||||
unsigned portLONG ulISRStatus;
|
unsigned portLONG ulISRStatus;
|
||||||
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
portCHAR cChar;
|
portCHAR cChar;
|
||||||
|
|
||||||
/* Determine the cause of the interrupt. */
|
/* Determine the cause of the interrupt. */
|
||||||
|
@ -190,7 +190,7 @@ portCHAR cChar;
|
||||||
characters. This might wake a task that was blocked waiting for
|
characters. This might wake a task that was blocked waiting for
|
||||||
data. */
|
data. */
|
||||||
cChar = ( portCHAR )XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_RX_FIFO_OFFSET );
|
cChar = ( portCHAR )XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_RX_FIFO_OFFSET );
|
||||||
xTaskWokenByRx = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByRx );
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
if( ( ulISRStatus & XUL_SR_TX_FIFO_EMPTY ) != 0 )
|
if( ( ulISRStatus & XUL_SR_TX_FIFO_EMPTY ) != 0 )
|
||||||
|
@ -198,14 +198,14 @@ portCHAR cChar;
|
||||||
/* There is space in the FIFO - if there are any characters queue for
|
/* There is space in the FIFO - if there are any characters queue for
|
||||||
transmission they can be send to the UART now. This might unblock a
|
transmission they can be send to the UART now. This might unblock a
|
||||||
task that was waiting for space to become available on the Tx queue. */
|
task that was waiting for space to become available on the Tx queue. */
|
||||||
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
|
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||||
{
|
{
|
||||||
XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cChar );
|
XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cChar );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If we woke any tasks we may require a context switch. */
|
/* If we woke any tasks we may require a context switch. */
|
||||||
if( xTaskWokenByTx || xTaskWokenByRx )
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
portYIELD_FROM_ISR();
|
portYIELD_FROM_ISR();
|
||||||
}
|
}
|
||||||
|
|
|
@ -204,6 +204,7 @@ void vSerialClose( xComPortHandle xPort )
|
||||||
void vSerialRxISR( void )
|
void vSerialRxISR( void )
|
||||||
{
|
{
|
||||||
portCHAR cChar;
|
portCHAR cChar;
|
||||||
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Get the character and post it on the queue of Rxed characters.
|
/* Get the character and post it on the queue of Rxed characters.
|
||||||
If the post causes a task to wake force a context switch as the woken task
|
If the post causes a task to wake force a context switch as the woken task
|
||||||
|
@ -217,7 +218,9 @@ portCHAR cChar;
|
||||||
RCSTAbits.CREN = serCONTINUOUS_RX;
|
RCSTAbits.CREN = serCONTINUOUS_RX;
|
||||||
}
|
}
|
||||||
|
|
||||||
if( xQueueSendFromISR( xRxedChars, ( const void * ) &cChar, pdFALSE ) )
|
xQueueSendFromISR( xRxedChars, ( const void * ) &cChar, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
taskYIELD();
|
taskYIELD();
|
||||||
}
|
}
|
||||||
|
|
|
@ -83,6 +83,7 @@ Changes from V3.0.1
|
||||||
* because this SFR will be restored before exiting the ISR.
|
* because this SFR will be restored before exiting the ISR.
|
||||||
*/
|
*/
|
||||||
extern portCHAR cChar;
|
extern portCHAR cChar;
|
||||||
|
extern portBASE_TYPE xHigherPriorityTaskWoken;
|
||||||
#pragma locate cChar &PRODL
|
#pragma locate cChar &PRODL
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -112,7 +113,10 @@ Changes from V3.0.1
|
||||||
bCREN = serCONTINUOUS_RX;
|
bCREN = serCONTINUOUS_RX;
|
||||||
}
|
}
|
||||||
|
|
||||||
if( xQueueSendFromISR( xRxedChars, ( const void * ) &cChar, pdFALSE ) )
|
xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
xQueueSendFromISR( xRxedChars, ( const void * ) &cChar, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
uxSwitchRequested = pdTRUE;
|
uxSwitchRequested = pdTRUE;
|
||||||
}
|
}
|
||||||
|
|
|
@ -80,6 +80,7 @@ Changes from V3.0.1
|
||||||
/* Queues to interface between comms API and interrupt routines. */
|
/* Queues to interface between comms API and interrupt routines. */
|
||||||
xQueueHandle xRxedChars;
|
xQueueHandle xRxedChars;
|
||||||
xQueueHandle xCharsForTx;
|
xQueueHandle xCharsForTx;
|
||||||
|
portBASE_TYPE xHigherPriorityTaskWoken;
|
||||||
|
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -197,7 +197,7 @@ void vSerialClose( xComPortHandle xPort )
|
||||||
void __attribute__((__interrupt__, auto_psv)) _U2RXInterrupt( void )
|
void __attribute__((__interrupt__, auto_psv)) _U2RXInterrupt( void )
|
||||||
{
|
{
|
||||||
portCHAR cChar;
|
portCHAR cChar;
|
||||||
portBASE_TYPE xYieldRequired = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Get the character and post it on the queue of Rxed characters.
|
/* Get the character and post it on the queue of Rxed characters.
|
||||||
If the post causes a task to wake force a context switch as the woken task
|
If the post causes a task to wake force a context switch as the woken task
|
||||||
|
@ -206,10 +206,10 @@ portBASE_TYPE xYieldRequired = pdFALSE;
|
||||||
while( U2STAbits.URXDA )
|
while( U2STAbits.URXDA )
|
||||||
{
|
{
|
||||||
cChar = U2RXREG;
|
cChar = U2RXREG;
|
||||||
xYieldRequired = xQueueSendFromISR( xRxedChars, &cChar, xYieldRequired );
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
if( xYieldRequired != pdFALSE )
|
if( xHigherPriorityTaskWoken != pdFALSE )
|
||||||
{
|
{
|
||||||
taskYIELD();
|
taskYIELD();
|
||||||
}
|
}
|
||||||
|
|
|
@ -153,9 +153,9 @@ void vU2InterruptHandler( void )
|
||||||
{
|
{
|
||||||
/* Declared static to minimise stack use. */
|
/* Declared static to minimise stack use. */
|
||||||
static portCHAR cChar;
|
static portCHAR cChar;
|
||||||
static portBASE_TYPE xYieldRequired;
|
static portBASE_TYPE xHigherPriorityTaskWoken;
|
||||||
|
|
||||||
xYieldRequired = pdFALSE;
|
xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Are any Rx interrupts pending? */
|
/* Are any Rx interrupts pending? */
|
||||||
if( mU2RXGetIntFlag() )
|
if( mU2RXGetIntFlag() )
|
||||||
|
@ -165,7 +165,7 @@ static portBASE_TYPE xYieldRequired;
|
||||||
/* Retrieve the received character and place it in the queue of
|
/* Retrieve the received character and place it in the queue of
|
||||||
received characters. */
|
received characters. */
|
||||||
cChar = U2RXREG;
|
cChar = U2RXREG;
|
||||||
xYieldRequired = xQueueSendFromISR( xRxedChars, &cChar, xYieldRequired );
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
mU2RXClearIntFlag();
|
mU2RXClearIntFlag();
|
||||||
}
|
}
|
||||||
|
@ -175,7 +175,7 @@ static portBASE_TYPE xYieldRequired;
|
||||||
{
|
{
|
||||||
while( !( U2STAbits.UTXBF ) )
|
while( !( U2STAbits.UTXBF ) )
|
||||||
{
|
{
|
||||||
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xYieldRequired ) == pdTRUE )
|
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||||
{
|
{
|
||||||
/* Send the next character queued for Tx. */
|
/* Send the next character queued for Tx. */
|
||||||
U2TXREG = cChar;
|
U2TXREG = cChar;
|
||||||
|
@ -192,7 +192,7 @@ static portBASE_TYPE xYieldRequired;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If sending or receiving necessitates a context switch, then switch now. */
|
/* If sending or receiving necessitates a context switch, then switch now. */
|
||||||
portEND_SWITCHING_ISR( xYieldRequired );
|
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -184,7 +184,7 @@ void vSerialClose( xComPortHandle xPort )
|
||||||
static void vSerialISR( XUartLite *pxUART )
|
static void vSerialISR( XUartLite *pxUART )
|
||||||
{
|
{
|
||||||
unsigned portLONG ulISRStatus;
|
unsigned portLONG ulISRStatus;
|
||||||
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE, lDidSomething;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, lDidSomething;
|
||||||
portCHAR cChar;
|
portCHAR cChar;
|
||||||
|
|
||||||
do
|
do
|
||||||
|
@ -199,7 +199,7 @@ portCHAR cChar;
|
||||||
characters. This might wake a task that was blocked waiting for
|
characters. This might wake a task that was blocked waiting for
|
||||||
data. */
|
data. */
|
||||||
cChar = ( portCHAR ) XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_RX_FIFO_OFFSET );
|
cChar = ( portCHAR ) XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_RX_FIFO_OFFSET );
|
||||||
xTaskWokenByRx = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByRx );
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
lDidSomething = pdTRUE;
|
lDidSomething = pdTRUE;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -208,7 +208,7 @@ portCHAR cChar;
|
||||||
/* There is space in the FIFO - if there are any characters queue for
|
/* There is space in the FIFO - if there are any characters queue for
|
||||||
transmission they can be sent to the UART now. This might unblock a
|
transmission they can be sent to the UART now. This might unblock a
|
||||||
task that was waiting for space to become available on the Tx queue. */
|
task that was waiting for space to become available on the Tx queue. */
|
||||||
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
|
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||||
{
|
{
|
||||||
XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cChar );
|
XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cChar );
|
||||||
lDidSomething = pdTRUE;
|
lDidSomething = pdTRUE;
|
||||||
|
@ -217,7 +217,7 @@ portCHAR cChar;
|
||||||
} while( lDidSomething == pdTRUE );
|
} while( lDidSomething == pdTRUE );
|
||||||
|
|
||||||
/* If we woke any tasks we may require a context switch. */
|
/* If we woke any tasks we may require a context switch. */
|
||||||
if( xTaskWokenByTx || xTaskWokenByRx )
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
portYIELD_FROM_ISR();
|
portYIELD_FROM_ISR();
|
||||||
}
|
}
|
||||||
|
|
|
@ -76,10 +76,10 @@ static portLONG lDummyVariable;
|
||||||
void vEINT0_ISR_Handler( void )
|
void vEINT0_ISR_Handler( void )
|
||||||
{
|
{
|
||||||
extern xQueueHandle xTCPISRQueue;
|
extern xQueueHandle xTCPISRQueue;
|
||||||
portBASE_TYPE xTaskWoken = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Just wake the TCP task so it knows an ISR has occurred. */
|
/* Just wake the TCP task so it knows an ISR has occurred. */
|
||||||
xTaskWoken = xQueueSendFromISR( xTCPISRQueue, ( void * ) &lDummyVariable, xTaskWoken );
|
xQueueSendFromISR( xTCPISRQueue, ( void * ) &lDummyVariable, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
/* We cannot carry on processing interrupts until the TCP task has
|
/* We cannot carry on processing interrupts until the TCP task has
|
||||||
processed this one - so for now interrupts are disabled. The TCP task will
|
processed this one - so for now interrupts are disabled. The TCP task will
|
||||||
|
@ -89,7 +89,7 @@ portBASE_TYPE xTaskWoken = pdFALSE;
|
||||||
/* Clear the interrupt bit. */
|
/* Clear the interrupt bit. */
|
||||||
VICVectAddr = tcpCLEAR_VIC_INTERRUPT;
|
VICVectAddr = tcpCLEAR_VIC_INTERRUPT;
|
||||||
|
|
||||||
if( xTaskWoken )
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
portYIELD_FROM_ISR();
|
portYIELD_FROM_ISR();
|
||||||
}
|
}
|
||||||
|
|
|
@ -161,7 +161,7 @@ void vI2C_ISR_Handler( void )
|
||||||
/* Holds the current transmission state. */
|
/* Holds the current transmission state. */
|
||||||
static I2C_STATE eCurrentState = eSentStart;
|
static I2C_STATE eCurrentState = eSentStart;
|
||||||
static portLONG lMessageIndex = -i2cBUFFER_ADDRESS_BYTES; /* There are two address bytes to send prior to the data. */
|
static portLONG lMessageIndex = -i2cBUFFER_ADDRESS_BYTES; /* There are two address bytes to send prior to the data. */
|
||||||
portBASE_TYPE xTaskWokenByTx = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
portLONG lBytesLeft;
|
portLONG lBytesLeft;
|
||||||
|
|
||||||
/* The action taken for this interrupt depends on our current state. */
|
/* The action taken for this interrupt depends on our current state. */
|
||||||
|
@ -268,11 +268,11 @@ portLONG lBytesLeft;
|
||||||
must 'give' the semaphore so the task is woken.*/
|
must 'give' the semaphore so the task is woken.*/
|
||||||
if( pxCurrentMessage->xMessageCompleteSemaphore )
|
if( pxCurrentMessage->xMessageCompleteSemaphore )
|
||||||
{
|
{
|
||||||
xTaskWokenByTx = xSemaphoreGiveFromISR( pxCurrentMessage->xMessageCompleteSemaphore, xTaskWokenByTx );
|
xSemaphoreGiveFromISR( pxCurrentMessage->xMessageCompleteSemaphore, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Are there any other messages to transact? */
|
/* Are there any other messages to transact? */
|
||||||
if( xQueueReceiveFromISR( xMessagesForTx, &pxCurrentMessage, &xTaskWokenByTx ) == pdTRUE )
|
if( xQueueReceiveFromISR( xMessagesForTx, &pxCurrentMessage, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||||
{
|
{
|
||||||
/* Start the next message - which was
|
/* Start the next message - which was
|
||||||
retrieved from the queue. */
|
retrieved from the queue. */
|
||||||
|
@ -336,11 +336,11 @@ portLONG lBytesLeft;
|
||||||
semaphore must be 'given' to wake the task. */
|
semaphore must be 'given' to wake the task. */
|
||||||
if( pxCurrentMessage->xMessageCompleteSemaphore )
|
if( pxCurrentMessage->xMessageCompleteSemaphore )
|
||||||
{
|
{
|
||||||
xTaskWokenByTx = xSemaphoreGiveFromISR( pxCurrentMessage->xMessageCompleteSemaphore, xTaskWokenByTx );
|
xSemaphoreGiveFromISR( pxCurrentMessage->xMessageCompleteSemaphore, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Are there any other messages to transact? */
|
/* Are there any other messages to transact? */
|
||||||
if( xQueueReceiveFromISR( xMessagesForTx, &pxCurrentMessage, &xTaskWokenByTx ) == pdTRUE )
|
if( xQueueReceiveFromISR( xMessagesForTx, &pxCurrentMessage, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||||
{
|
{
|
||||||
/* Start the next message from the Tx queue. */
|
/* Start the next message from the Tx queue. */
|
||||||
I2C_I2CONSET = i2cSTA_BIT;
|
I2C_I2CONSET = i2cSTA_BIT;
|
||||||
|
@ -371,7 +371,7 @@ portLONG lBytesLeft;
|
||||||
I2C_I2CONCLR = i2cSI_BIT;
|
I2C_I2CONCLR = i2cSI_BIT;
|
||||||
VICVectAddr = i2cCLEAR_VIC_INTERRUPT;
|
VICVectAddr = i2cCLEAR_VIC_INTERRUPT;
|
||||||
|
|
||||||
if( xTaskWokenByTx )
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
portYIELD_FROM_ISR();
|
portYIELD_FROM_ISR();
|
||||||
}
|
}
|
||||||
|
|
|
@ -409,7 +409,7 @@ static portBASE_TYPE xComPortISR( xComPort * const pxPort )
|
||||||
{
|
{
|
||||||
unsigned portSHORT usStatusRegister;
|
unsigned portSHORT usStatusRegister;
|
||||||
portCHAR cChar;
|
portCHAR cChar;
|
||||||
portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTaskWokenByTx = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* NOTE: THIS IS NOT AN EFFICIENT ISR AS IT IS DESIGNED SOLELY TO TEST
|
/* NOTE: THIS IS NOT AN EFFICIENT ISR AS IT IS DESIGNED SOLELY TO TEST
|
||||||
THE SCHEDULER FUNCTIONALITY. REAL APPLICATIONS SHOULD NOT USE THIS
|
THE SCHEDULER FUNCTIONALITY. REAL APPLICATIONS SHOULD NOT USE THIS
|
||||||
|
@ -420,14 +420,14 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTa
|
||||||
if( usStatusRegister & serRX_READY )
|
if( usStatusRegister & serRX_READY )
|
||||||
{
|
{
|
||||||
cChar = ( portCHAR ) portINPUT_WORD( pxPort->usRxReg );
|
cChar = ( portCHAR ) portINPUT_WORD( pxPort->usRxReg );
|
||||||
xTaskWokenByPost = xQueueSendFromISR( pxPort->xRxedChars, &cChar, xTaskWokenByPost );
|
xQueueSendFromISR( pxPort->xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
/* Also release the semaphore - this does nothing interesting and is just a test. */
|
/* Also release the semaphore - this does nothing interesting and is just a test. */
|
||||||
xAnotherTaskWokenByPost = xSemaphoreGiveFromISR( pxPort->xTestSem, xAnotherTaskWokenByPost );
|
xSemaphoreGiveFromISR( pxPort->xTestSem, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
else if( pxPort->sTxInterruptOn && ( usStatusRegister & serTX_EMPTY ) )
|
else if( pxPort->sTxInterruptOn && ( usStatusRegister & serTX_EMPTY ) )
|
||||||
{
|
{
|
||||||
if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
|
if( xQueueReceiveFromISR( pxPort->xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
|
||||||
{
|
{
|
||||||
portOUTPUT_WORD( pxPort->usTxReg, ( unsigned portSHORT ) cChar );
|
portOUTPUT_WORD( pxPort->usTxReg, ( unsigned portSHORT ) cChar );
|
||||||
}
|
}
|
||||||
|
@ -443,7 +443,7 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE, xAnotherTaskWokenByPost = pdFALSE, xTa
|
||||||
/* If posting to the queue woke a task that was blocked on the queue we may
|
/* If posting to the queue woke a task that was blocked on the queue we may
|
||||||
want to switch to the woken task - depending on its priority relative to
|
want to switch to the woken task - depending on its priority relative to
|
||||||
the task interrupted by this ISR. */
|
the task interrupted by this ISR. */
|
||||||
if( xTaskWokenByPost || xAnotherTaskWokenByPost || xTaskWokenByTx)
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
return pdTRUE;
|
return pdTRUE;
|
||||||
}
|
}
|
||||||
|
|
|
@ -80,7 +80,7 @@ portBASE_TYPE prvProcessISR( void )
|
||||||
{
|
{
|
||||||
unsigned char status;
|
unsigned char status;
|
||||||
extern xSemaphoreHandle xTCPSemaphore;
|
extern xSemaphoreHandle xTCPSemaphore;
|
||||||
portBASE_TYPE xSwitchRequired = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
#ifdef I2CHIP_WINDOW
|
#ifdef I2CHIP_WINDOW
|
||||||
u_int current_window = i2chip_get_window();
|
u_int current_window = i2chip_get_window();
|
||||||
|
@ -91,7 +91,7 @@ status = READ_VALUE(INT_REG);
|
||||||
|
|
||||||
if (status)
|
if (status)
|
||||||
{
|
{
|
||||||
xSwitchRequired = pdTRUE;
|
xHigherPriorityTaskWoken = pdTRUE;
|
||||||
// channel 0 interrupt(sysinit, sockinit, established, closed, timeout, send_ok, recv_ok)
|
// channel 0 interrupt(sysinit, sockinit, established, closed, timeout, send_ok, recv_ok)
|
||||||
if (status & 0x01)
|
if (status & 0x01)
|
||||||
{
|
{
|
||||||
|
@ -178,12 +178,12 @@ WRITE_VALUE(INT_REG, 0xFF);
|
||||||
i2chip_set_window(current_window);
|
i2chip_set_window(current_window);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
if( xSwitchRequired == pdTRUE )
|
if( xHigherPriorityTaskWoken == pdTRUE )
|
||||||
{
|
{
|
||||||
xSwitchRequired = xSemaphoreGiveFromISR( xTCPSemaphore, pdFALSE );
|
xSemaphoreGiveFromISR( xTCPSemaphore, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
return xSwitchRequired;
|
return xHigherPriorityTaskWoken;
|
||||||
}
|
}
|
||||||
|
|
||||||
void far interrupt in4_isr_i2chip(void)
|
void far interrupt in4_isr_i2chip(void)
|
||||||
|
|
|
@ -196,7 +196,7 @@ void vSerialClose( xComPortHandle xPort )
|
||||||
void __attribute__((__interrupt__, auto_psv)) _U2RXInterrupt( void )
|
void __attribute__((__interrupt__, auto_psv)) _U2RXInterrupt( void )
|
||||||
{
|
{
|
||||||
portCHAR cChar;
|
portCHAR cChar;
|
||||||
portBASE_TYPE xYieldRequired = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Get the character and post it on the queue of Rxed characters.
|
/* Get the character and post it on the queue of Rxed characters.
|
||||||
If the post causes a task to wake force a context switch as the woken task
|
If the post causes a task to wake force a context switch as the woken task
|
||||||
|
@ -205,10 +205,10 @@ portBASE_TYPE xYieldRequired = pdFALSE;
|
||||||
while( U2STAbits.URXDA )
|
while( U2STAbits.URXDA )
|
||||||
{
|
{
|
||||||
cChar = U2RXREG;
|
cChar = U2RXREG;
|
||||||
xYieldRequired = xQueueSendFromISR( xRxedChars, &cChar, xYieldRequired );
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
if( xYieldRequired != pdFALSE )
|
if( xHigherPriorityTaskWoken != pdFALSE )
|
||||||
{
|
{
|
||||||
taskYIELD();
|
taskYIELD();
|
||||||
}
|
}
|
||||||
|
|
|
@ -900,7 +900,7 @@ static long prvMACB_ISR_NonNakedBehaviour( void )
|
||||||
|
|
||||||
// Variable definitions can be made now.
|
// Variable definitions can be made now.
|
||||||
volatile unsigned long ulIntStatus, ulEventStatus;
|
volatile unsigned long ulIntStatus, ulEventStatus;
|
||||||
long xSwitchRequired = FALSE;
|
long xHigherPriorityTaskWoken = FALSE;
|
||||||
|
|
||||||
// Find the cause of the interrupt.
|
// Find the cause of the interrupt.
|
||||||
ulIntStatus = AVR32_MACB.isr;
|
ulIntStatus = AVR32_MACB.isr;
|
||||||
|
@ -912,7 +912,7 @@ static long prvMACB_ISR_NonNakedBehaviour( void )
|
||||||
// the Rx descriptors.
|
// the Rx descriptors.
|
||||||
portENTER_CRITICAL();
|
portENTER_CRITICAL();
|
||||||
#ifdef FREERTOS_USED
|
#ifdef FREERTOS_USED
|
||||||
xSwitchRequired = xSemaphoreGiveFromISR( xSemaphore, FALSE );
|
xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
|
||||||
#else
|
#else
|
||||||
DataToRead = TRUE;
|
DataToRead = TRUE;
|
||||||
#endif
|
#endif
|
||||||
|
@ -930,7 +930,7 @@ static long prvMACB_ISR_NonNakedBehaviour( void )
|
||||||
AVR32_MACB.tsr;
|
AVR32_MACB.tsr;
|
||||||
}
|
}
|
||||||
|
|
||||||
return ( xSwitchRequired );
|
return ( xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -88,7 +88,7 @@ static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
|
||||||
{
|
{
|
||||||
/* Now we can declare the local variables. */
|
/* Now we can declare the local variables. */
|
||||||
signed portCHAR cChar;
|
signed portCHAR cChar;
|
||||||
portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
unsigned portLONG ulStatus;
|
unsigned portLONG ulStatus;
|
||||||
volatile avr32_usart_t *usart0 = &AVR32_USART0;
|
volatile avr32_usart_t *usart0 = &AVR32_USART0;
|
||||||
portBASE_TYPE retstatus;
|
portBASE_TYPE retstatus;
|
||||||
|
@ -103,7 +103,7 @@ static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
|
||||||
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
|
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
|
||||||
calls in a critical section . */
|
calls in a critical section . */
|
||||||
portENTER_CRITICAL();
|
portENTER_CRITICAL();
|
||||||
retstatus = xQueueReceiveFromISR(xCharsForTx, &cChar, &xTaskWokenByTx);
|
retstatus = xQueueReceiveFromISR(xCharsForTx, &cChar, &xHigherPriorityTaskWoken);
|
||||||
portEXIT_CRITICAL();
|
portEXIT_CRITICAL();
|
||||||
if (retstatus == pdTRUE)
|
if (retstatus == pdTRUE)
|
||||||
{
|
{
|
||||||
|
@ -126,17 +126,13 @@ static portBASE_TYPE prvUSART0_ISR_NonNakedBehaviour( void )
|
||||||
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
|
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
|
||||||
calls in a critical section . */
|
calls in a critical section . */
|
||||||
portENTER_CRITICAL();
|
portENTER_CRITICAL();
|
||||||
retstatus = xQueueSendFromISR(xRxedChars, &cChar, pdFALSE);
|
xQueueSendFromISR(xRxedChars, &cChar, &xHigherPriorityTaskWoken);
|
||||||
portEXIT_CRITICAL();
|
portEXIT_CRITICAL();
|
||||||
if (retstatus)
|
|
||||||
{
|
|
||||||
xTaskWokenByRx = pdTRUE;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* The return value will be used by portEXIT_SWITCHING_ISR() to know if it
|
/* The return value will be used by portEXIT_SWITCHING_ISR() to know if it
|
||||||
should perform a vTaskSwitchContext(). */
|
should perform a vTaskSwitchContext(). */
|
||||||
return ( xTaskWokenByTx || xTaskWokenByRx );
|
return ( xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -74,7 +74,7 @@ void vEMACISR_Handler( void );
|
||||||
void vEMACISR_Handler( void )
|
void vEMACISR_Handler( void )
|
||||||
{
|
{
|
||||||
volatile unsigned portLONG ulIntStatus, ulEventStatus;
|
volatile unsigned portLONG ulIntStatus, ulEventStatus;
|
||||||
portBASE_TYPE xSwitchRequired = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
extern void vClearEMACTxBuffer( void );
|
extern void vClearEMACTxBuffer( void );
|
||||||
|
|
||||||
/* Find the cause of the interrupt. */
|
/* Find the cause of the interrupt. */
|
||||||
|
@ -85,7 +85,7 @@ extern void vClearEMACTxBuffer( void );
|
||||||
{
|
{
|
||||||
/* A frame has been received, signal the lwIP task so it can process
|
/* A frame has been received, signal the lwIP task so it can process
|
||||||
the Rx descriptors. */
|
the Rx descriptors. */
|
||||||
xSwitchRequired = xSemaphoreGiveFromISR( xSemaphore, pdFALSE );
|
xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
|
||||||
AT91C_BASE_EMAC->EMAC_RSR = AT91C_EMAC_REC;
|
AT91C_BASE_EMAC->EMAC_RSR = AT91C_EMAC_REC;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -104,7 +104,7 @@ extern void vClearEMACTxBuffer( void );
|
||||||
switch to another task. If the unblocked task was of higher priority then
|
switch to another task. If the unblocked task was of higher priority then
|
||||||
the interrupted task it will then execute immediately that the ISR
|
the interrupted task it will then execute immediately that the ISR
|
||||||
completes. */
|
completes. */
|
||||||
if( xSwitchRequired )
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
portYIELD_FROM_ISR();
|
portYIELD_FROM_ISR();
|
||||||
}
|
}
|
||||||
|
|
|
@ -68,7 +68,7 @@ void vUSB_ISR_Handler( void );
|
||||||
|
|
||||||
void vUSB_ISR_Handler( void )
|
void vUSB_ISR_Handler( void )
|
||||||
{
|
{
|
||||||
portCHAR cTaskWokenByPost = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
static volatile unsigned portLONG ulNextMessage = 0;
|
static volatile unsigned portLONG ulNextMessage = 0;
|
||||||
xISRStatus *pxMessage;
|
xISRStatus *pxMessage;
|
||||||
unsigned portLONG ulRxBytes;
|
unsigned portLONG ulRxBytes;
|
||||||
|
@ -145,13 +145,13 @@ unsigned portCHAR ucFifoIndex;
|
||||||
AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_3 ] &= ~usbINT_CLEAR_MASK;
|
AT91C_BASE_UDP->UDP_CSR[ usbEND_POINT_3 ] &= ~usbINT_CLEAR_MASK;
|
||||||
|
|
||||||
/* Post ISR data to queue for task-level processing */
|
/* Post ISR data to queue for task-level processing */
|
||||||
cTaskWokenByPost = xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, cTaskWokenByPost );
|
xQueueSendFromISR( xUSBInterruptQueue, &pxMessage, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
/* Clear AIC to complete ISR processing */
|
/* Clear AIC to complete ISR processing */
|
||||||
AT91C_BASE_AIC->AIC_EOICR = 0;
|
AT91C_BASE_AIC->AIC_EOICR = 0;
|
||||||
|
|
||||||
/* Do a task switch if needed */
|
/* Do a task switch if needed */
|
||||||
if( cTaskWokenByPost )
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
/* This call will ensure that the unblocked task will be executed
|
/* This call will ensure that the unblocked task will be executed
|
||||||
immediately upon completion of the ISR if it has a priority higher
|
immediately upon completion of the ISR if it has a priority higher
|
||||||
|
|
|
@ -346,7 +346,7 @@ eth_input( struct netif *netif, struct pbuf *p )
|
||||||
void
|
void
|
||||||
mcf523xfec_rx_irq( void )
|
mcf523xfec_rx_irq( void )
|
||||||
{
|
{
|
||||||
static portBASE_TYPE xNeedSwitch = pdFALSE;
|
static portBASE_TYPE xHigherPriorityTaskWoken;
|
||||||
|
|
||||||
/* Workaround GCC if frame pointers are enabled. This is an ISR and
|
/* Workaround GCC if frame pointers are enabled. This is an ISR and
|
||||||
* we must not modify the stack before portENTER_SWITCHING_ISR( )
|
* we must not modify the stack before portENTER_SWITCHING_ISR( )
|
||||||
|
@ -359,7 +359,7 @@ mcf523xfec_rx_irq( void )
|
||||||
* a call to the portENTER_SWITCHING_ISR() macro.
|
* a call to the portENTER_SWITCHING_ISR() macro.
|
||||||
*/
|
*/
|
||||||
portENTER_SWITCHING_ISR( );
|
portENTER_SWITCHING_ISR( );
|
||||||
|
xHigherPriorityTaskWoken = pdFALSE;
|
||||||
/* Set Debug PIN to high to measure RX latency. */
|
/* Set Debug PIN to high to measure RX latency. */
|
||||||
FEC_DEBUG_RX_TIMING( 1 );
|
FEC_DEBUG_RX_TIMING( 1 );
|
||||||
|
|
||||||
|
@ -368,9 +368,9 @@ mcf523xfec_rx_irq( void )
|
||||||
{
|
{
|
||||||
/* Clear interrupt from EIR register immediately */
|
/* Clear interrupt from EIR register immediately */
|
||||||
MCF_FEC_EIR = ( MCF_FEC_EIR_RXB | MCF_FEC_EIR_RXF );
|
MCF_FEC_EIR = ( MCF_FEC_EIR_RXB | MCF_FEC_EIR_RXF );
|
||||||
xNeedSwitch = xSemaphoreGiveFromISR( fecif_g->rx_sem, pdFALSE );
|
xSemaphoreGiveFromISR( fecif_g->rx_sem, &xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
portEXIT_SWITCHING_ISR( xNeedSwitch );
|
portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
|
|
|
@ -270,7 +270,7 @@ void
|
||||||
prvSerialISR( void )
|
prvSerialISR( void )
|
||||||
{
|
{
|
||||||
static signed portCHAR cChar;
|
static signed portCHAR cChar;
|
||||||
static portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
|
static portBASE_TYPE xHigherPriorityTaskWoken;
|
||||||
|
|
||||||
/* We have to remvoe the effect of the GCC. Please note that the
|
/* We have to remvoe the effect of the GCC. Please note that the
|
||||||
* __attribute__ ((interrupt_handler)) does not work here because we
|
* __attribute__ ((interrupt_handler)) does not work here because we
|
||||||
|
@ -285,12 +285,13 @@ prvSerialISR( void )
|
||||||
* variable declarations.
|
* variable declarations.
|
||||||
*/
|
*/
|
||||||
portENTER_SWITCHING_ISR();
|
portENTER_SWITCHING_ISR();
|
||||||
|
xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Ready to send a character from the buffer. */
|
/* Ready to send a character from the buffer. */
|
||||||
if( MCF_UART_USR0 & MCF_UART_USR_TXRDY )
|
if( MCF_UART_USR0 & MCF_UART_USR_TXRDY )
|
||||||
{
|
{
|
||||||
/* Transmit buffer is ready. Test if there are characters available. */
|
/* Transmit buffer is ready. Test if there are characters available. */
|
||||||
if( xQueueReceiveFromISR( xComPortIF[ 0 ].xTXChars, &cChar, &xTaskWokenByTx ) ==
|
if( xQueueReceiveFromISR( xComPortIF[ 0 ].xTXChars, &cChar, &xHigherPriorityTaskWoken ) ==
|
||||||
pdTRUE )
|
pdTRUE )
|
||||||
{
|
{
|
||||||
/* A character was retrieved from the queue so can be sent. */
|
/* A character was retrieved from the queue so can be sent. */
|
||||||
|
@ -305,11 +306,10 @@ prvSerialISR( void )
|
||||||
if( MCF_UART_USR0 & MCF_UART_USR_RXRDY )
|
if( MCF_UART_USR0 & MCF_UART_USR_RXRDY )
|
||||||
{
|
{
|
||||||
cChar = MCF_UART_URB0;
|
cChar = MCF_UART_URB0;
|
||||||
xTaskWokenByRx =
|
xQueueSendFromISR( xComPortIF[ 0].xRXChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
xQueueSendFromISR( xComPortIF[ 0].xRXChars, &cChar, xTaskWokenByRx );
|
|
||||||
}
|
}
|
||||||
/* Exit the ISR. If a task was woken by either a character being
|
/* Exit the ISR. If a task was woken by either a character being
|
||||||
* or transmitted then a context switch will occur.
|
* or transmitted then a context switch will occur.
|
||||||
*/
|
*/
|
||||||
portEXIT_SWITCHING_ISR( ( xTaskWokenByTx || xTaskWokenByRx ) );
|
portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken );
|
||||||
}
|
}
|
||||||
|
|
|
@ -210,12 +210,15 @@ signed portBASE_TYPE xReturn;
|
||||||
void vRxISR( void ) __interrupt[ UART1RX_VECTOR ]
|
void vRxISR( void ) __interrupt[ UART1RX_VECTOR ]
|
||||||
{
|
{
|
||||||
signed portCHAR cChar;
|
signed portCHAR cChar;
|
||||||
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Get the character from the UART and post it on the queue of Rxed
|
/* Get the character from the UART and post it on the queue of Rxed
|
||||||
characters. */
|
characters. */
|
||||||
cChar = U1RXBUF;
|
cChar = U1RXBUF;
|
||||||
|
|
||||||
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
/*If the post causes a task to wake force a context switch
|
/*If the post causes a task to wake force a context switch
|
||||||
as the woken task may have a higher priority than the task we have
|
as the woken task may have a higher priority than the task we have
|
||||||
|
@ -258,12 +261,15 @@ signed portBASE_TYPE xReturn;
|
||||||
void ISRCom1Rx( void )
|
void ISRCom1Rx( void )
|
||||||
{
|
{
|
||||||
signed portCHAR cChar;
|
signed portCHAR cChar;
|
||||||
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Get the character from the UART and post it on the queue of Rxed
|
/* Get the character from the UART and post it on the queue of Rxed
|
||||||
characters. */
|
characters. */
|
||||||
cChar = U1RXBUF;
|
cChar = U1RXBUF;
|
||||||
|
|
||||||
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
/*If the post causes a task to wake force a context switch
|
/*If the post causes a task to wake force a context switch
|
||||||
as the woken task may have a higher priority than the task we have
|
as the woken task may have a higher priority than the task we have
|
||||||
|
|
|
@ -211,12 +211,15 @@ signed portBASE_TYPE xReturn;
|
||||||
interrupt (UART1RX_VECTOR) vRxISR( void )
|
interrupt (UART1RX_VECTOR) vRxISR( void )
|
||||||
{
|
{
|
||||||
signed portCHAR cChar;
|
signed portCHAR cChar;
|
||||||
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
/* Get the character from the UART and post it on the queue of Rxed
|
/* Get the character from the UART and post it on the queue of Rxed
|
||||||
characters. */
|
characters. */
|
||||||
cChar = U1RXBUF;
|
cChar = U1RXBUF;
|
||||||
|
|
||||||
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
|
xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
|
if( xHigherPriorityTaskWoken )
|
||||||
{
|
{
|
||||||
/*If the post causes a task to wake force a context switch
|
/*If the post causes a task to wake force a context switch
|
||||||
as the woken task may have a higher priority than the task we have
|
as the woken task may have a higher priority than the task we have
|
||||||
|
|
|
@ -515,7 +515,7 @@ static void prvSetupEMACInterrupt( void )
|
||||||
__arm void vEMACISR( void )
|
__arm void vEMACISR( void )
|
||||||
{
|
{
|
||||||
volatile unsigned portLONG ulIntStatus, ulRxStatus;
|
volatile unsigned portLONG ulIntStatus, ulRxStatus;
|
||||||
portBASE_TYPE xSwitchRequired = pdFALSE;
|
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||||
|
|
||||||
ulIntStatus = AT91C_BASE_EMAC->EMAC_ISR;
|
ulIntStatus = AT91C_BASE_EMAC->EMAC_ISR;
|
||||||
ulRxStatus = AT91C_BASE_EMAC->EMAC_RSR;
|
ulRxStatus = AT91C_BASE_EMAC->EMAC_RSR;
|
||||||
|
@ -524,13 +524,13 @@ portBASE_TYPE xSwitchRequired = pdFALSE;
|
||||||
{
|
{
|
||||||
/* A frame has been received, signal the uIP task so it can process
|
/* A frame has been received, signal the uIP task so it can process
|
||||||
the Rx descriptors. */
|
the Rx descriptors. */
|
||||||
xSwitchRequired = xSemaphoreGiveFromISR( xSemaphore, pdFALSE );
|
xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
|
||||||
AT91C_BASE_EMAC->EMAC_RSR = AT91C_EMAC_REC;
|
AT91C_BASE_EMAC->EMAC_RSR = AT91C_EMAC_REC;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If a task was woken by either a character being received or a character
|
/* If a task was woken by either a character being received or a character
|
||||||
being transmitted then we may need to switch to another task. */
|
being transmitted then we may need to switch to another task. */
|
||||||
portEND_SWITCHING_ISR( xSwitchRequired );
|
portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
|
||||||
|
|
||||||
/* Clear the interrupt. */
|
/* Clear the interrupt. */
|
||||||
AT91C_BASE_AIC->AIC_EOICR = 0;
|
AT91C_BASE_AIC->AIC_EOICR = 0;
|
||||||
|
|
Loading…
Reference in a new issue