mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-19 21:11:57 -04:00
Merge remote-tracking branch 'freertos/main' into update-pxcurrentTCB
This commit is contained in:
commit
f4dad5e7c1
14
.github/third_party_tools.md
vendored
Normal file
14
.github/third_party_tools.md
vendored
Normal file
|
@ -0,0 +1,14 @@
|
||||||
|
Note that these tools are provided by different vendors and not by the FreeRTOS
|
||||||
|
team.
|
||||||
|
|
||||||
|
## Tracing Tools
|
||||||
|
| Tool | Website | Getting Started |
|
||||||
|
|------|---------|-----------------|
|
||||||
|
| Tracelyzer | [Link](https://percepio.com/tracealyzer/freertostrace/) | [Link](https://percepio.com/getstarted/latest/html/freertos.html) |
|
||||||
|
| SystemView | [Link](https://www.segger.com/products/development-tools/systemview/) | [Link](https://wiki.segger.com/FreeRTOS_with_SystemView) |
|
||||||
|
|
||||||
|
## Static Code Analysis Tools
|
||||||
|
| Tool | Website | Getting Started |
|
||||||
|
|------|---------|-----------------|
|
||||||
|
| Code Sonar | [Link](https://codesecure.com/our-products/codesonar/) | [Link](https://github.com/CodeSecure-SE/FreeRTOS-Kernel/blob/main/examples/codesonar/README.md) |
|
||||||
|
| Coverity | [Link](https://www.synopsys.com/software-integrity/security-testing/static-analysis-sast.html) | [Link](../examples/coverity/README.md) |
|
10
README.md
10
README.md
|
@ -24,6 +24,12 @@ and [API Reference](https://www.FreeRTOS.org/a00106.html).
|
||||||
Also for contributing and creating a Pull Request please refer to
|
Also for contributing and creating a Pull Request please refer to
|
||||||
[the instructions here](.github/CONTRIBUTING.md#contributing-via-pull-request).
|
[the instructions here](.github/CONTRIBUTING.md#contributing-via-pull-request).
|
||||||
|
|
||||||
|
**FreeRTOS-Kernel V11.1.0
|
||||||
|
[source code](https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/V11.1.0) is part
|
||||||
|
of the
|
||||||
|
[FreeRTOS 202406.00 LTS](https://github.com/FreeRTOS/FreeRTOS-LTS/tree/202406-LTS)
|
||||||
|
release.**
|
||||||
|
|
||||||
### Getting help
|
### Getting help
|
||||||
|
|
||||||
If you have any questions or need assistance troubleshooting your FreeRTOS project,
|
If you have any questions or need assistance troubleshooting your FreeRTOS project,
|
||||||
|
@ -180,3 +186,7 @@ then sort the list, which can be done by running the bash command:
|
||||||
Note that only the FreeRTOS-Kernel Source Files, [include](include),
|
Note that only the FreeRTOS-Kernel Source Files, [include](include),
|
||||||
[portable/MemMang](portable/MemMang), and [portable/Common](portable/Common)
|
[portable/MemMang](portable/MemMang), and [portable/Common](portable/Common)
|
||||||
files are checked for proper spelling, and formatting at this time.
|
files are checked for proper spelling, and formatting at this time.
|
||||||
|
|
||||||
|
## Third Party Tools
|
||||||
|
Visit [this link](.github/third_party_tools.md) for detailed information about
|
||||||
|
third-party tools with FreeRTOS support.
|
||||||
|
|
|
@ -640,7 +640,7 @@
|
||||||
#define configUSE_APPLICATION_TASK_TAG 0
|
#define configUSE_APPLICATION_TASK_TAG 0
|
||||||
|
|
||||||
/* USE_POSIX_ERRNO enables the task global FreeRTOS_errno variable which will
|
/* USE_POSIX_ERRNO enables the task global FreeRTOS_errno variable which will
|
||||||
* containthe most recent error for that task. */
|
* contain the most recent error for that task. */
|
||||||
#define configUSE_POSIX_ERRNO 0
|
#define configUSE_POSIX_ERRNO 0
|
||||||
|
|
||||||
/* Set the following INCLUDE_* constants to 1 to incldue the named API function,
|
/* Set the following INCLUDE_* constants to 1 to incldue the named API function,
|
||||||
|
|
|
@ -621,6 +621,13 @@
|
||||||
#define traceTASK_SWITCHED_IN()
|
#define traceTASK_SWITCHED_IN()
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifndef traceSTARTING_SCHEDULER
|
||||||
|
|
||||||
|
/* Called after all idle tasks and timer task (if enabled) have been created
|
||||||
|
* successfully, just before the scheduler is started. */
|
||||||
|
#define traceSTARTING_SCHEDULER( xIdleTaskHandles )
|
||||||
|
#endif
|
||||||
|
|
||||||
#ifndef traceINCREASE_TICK_COUNT
|
#ifndef traceINCREASE_TICK_COUNT
|
||||||
|
|
||||||
/* Called before stepping the tick count after waking from tickless idle
|
/* Called before stepping the tick count after waking from tickless idle
|
||||||
|
|
|
@ -71,11 +71,11 @@ typedef struct QueueDefinition * QueueSetMemberHandle_t;
|
||||||
|
|
||||||
/* For internal use only. These definitions *must* match those in queue.c. */
|
/* For internal use only. These definitions *must* match those in queue.c. */
|
||||||
#define queueQUEUE_TYPE_BASE ( ( uint8_t ) 0U )
|
#define queueQUEUE_TYPE_BASE ( ( uint8_t ) 0U )
|
||||||
#define queueQUEUE_TYPE_SET ( ( uint8_t ) 0U )
|
|
||||||
#define queueQUEUE_TYPE_MUTEX ( ( uint8_t ) 1U )
|
#define queueQUEUE_TYPE_MUTEX ( ( uint8_t ) 1U )
|
||||||
#define queueQUEUE_TYPE_COUNTING_SEMAPHORE ( ( uint8_t ) 2U )
|
#define queueQUEUE_TYPE_COUNTING_SEMAPHORE ( ( uint8_t ) 2U )
|
||||||
#define queueQUEUE_TYPE_BINARY_SEMAPHORE ( ( uint8_t ) 3U )
|
#define queueQUEUE_TYPE_BINARY_SEMAPHORE ( ( uint8_t ) 3U )
|
||||||
#define queueQUEUE_TYPE_RECURSIVE_MUTEX ( ( uint8_t ) 4U )
|
#define queueQUEUE_TYPE_RECURSIVE_MUTEX ( ( uint8_t ) 4U )
|
||||||
|
#define queueQUEUE_TYPE_SET ( ( uint8_t ) 5U )
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* queue. h
|
* queue. h
|
||||||
|
|
|
@ -65,6 +65,9 @@
|
||||||
#define tskMPU_REGION_EXECUTE_NEVER ( 1U << 2U )
|
#define tskMPU_REGION_EXECUTE_NEVER ( 1U << 2U )
|
||||||
#define tskMPU_REGION_NORMAL_MEMORY ( 1U << 3U )
|
#define tskMPU_REGION_NORMAL_MEMORY ( 1U << 3U )
|
||||||
#define tskMPU_REGION_DEVICE_MEMORY ( 1U << 4U )
|
#define tskMPU_REGION_DEVICE_MEMORY ( 1U << 4U )
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
#define tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ( 1U << 5U )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* MPU region permissions stored in MPU settings to
|
/* MPU region permissions stored in MPU settings to
|
||||||
* authorize access requests. */
|
* authorize access requests. */
|
||||||
|
@ -161,7 +164,7 @@ typedef struct xTASK_STATUS
|
||||||
{
|
{
|
||||||
TaskHandle_t xHandle; /* The handle of the task to which the rest of the information in the structure relates. */
|
TaskHandle_t xHandle; /* The handle of the task to which the rest of the information in the structure relates. */
|
||||||
const char * pcTaskName; /* A pointer to the task's name. This value will be invalid if the task was deleted since the structure was populated! */
|
const char * pcTaskName; /* A pointer to the task's name. This value will be invalid if the task was deleted since the structure was populated! */
|
||||||
UBaseType_t xTaskNumber; /* A number unique to the task. */
|
UBaseType_t xTaskNumber; /* A number unique to the task. Note that this is not the task number that may be modified using vTaskSetTaskNumber() and uxTaskGetTaskNumber(), but a separate TCB-specific and unique identifier automatically assigned on task generation. */
|
||||||
eTaskState eCurrentState; /* The state in which the task existed when the structure was populated. */
|
eTaskState eCurrentState; /* The state in which the task existed when the structure was populated. */
|
||||||
UBaseType_t uxCurrentPriority; /* The priority at which the task was running (may be inherited) when the structure was populated. */
|
UBaseType_t uxCurrentPriority; /* The priority at which the task was running (may be inherited) when the structure was populated. */
|
||||||
UBaseType_t uxBasePriority; /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex. Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */
|
UBaseType_t uxBasePriority; /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex. Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M23"
|
#define portARCH_NAME "Cortex-M23"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M23"
|
#define portARCH_NAME "Cortex-M23"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M33"
|
#define portARCH_NAME "Cortex-M33"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M33"
|
#define portARCH_NAME "Cortex-M33"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M35P"
|
#define portARCH_NAME "Cortex-M35P"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -55,6 +55,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M55"
|
#define portARCH_NAME "Cortex-M55"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 1
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -55,6 +55,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M85"
|
#define portARCH_NAME "Cortex-M85"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 1
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M23"
|
#define portARCH_NAME "Cortex-M23"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M23"
|
#define portARCH_NAME "Cortex-M23"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M33"
|
#define portARCH_NAME "Cortex-M33"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M33"
|
#define portARCH_NAME "Cortex-M33"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M35P"
|
#define portARCH_NAME "Cortex-M35P"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -55,6 +55,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M55"
|
#define portARCH_NAME "Cortex-M55"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 1
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -55,6 +55,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M85"
|
#define portARCH_NAME "Cortex-M85"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 1
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -234,7 +234,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
|
||||||
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If the block being inserted plugged a gab, so was merged with the block
|
/* If the block being inserted plugged a gap, so was merged with the block
|
||||||
* before and the block after, then it's pxNextFreeBlock pointer will have
|
* before and the block after, then it's pxNextFreeBlock pointer will have
|
||||||
* already been set, and should not be set here as that would make it point
|
* already been set, and should not be set here as that would make it point
|
||||||
* to itself. */
|
* to itself. */
|
||||||
|
@ -256,6 +256,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
/* If this is the first call to malloc then the heap will require
|
/* If this is the first call to malloc then the heap will require
|
||||||
* initialisation to setup the list of free blocks. */
|
* initialisation to setup the list of free blocks. */
|
||||||
|
@ -374,6 +375,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned by
|
/* The block is being returned - it is allocated and owned by
|
||||||
* the application and has no "next" block. */
|
* the application and has no "next" block. */
|
||||||
secureheapALLOCATE_BLOCK( pxBlock );
|
secureheapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -394,7 +397,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
|
|
||||||
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M23"
|
#define portARCH_NAME "Cortex-M23"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -234,7 +234,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
|
||||||
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If the block being inserted plugged a gab, so was merged with the block
|
/* If the block being inserted plugged a gap, so was merged with the block
|
||||||
* before and the block after, then it's pxNextFreeBlock pointer will have
|
* before and the block after, then it's pxNextFreeBlock pointer will have
|
||||||
* already been set, and should not be set here as that would make it point
|
* already been set, and should not be set here as that would make it point
|
||||||
* to itself. */
|
* to itself. */
|
||||||
|
@ -256,6 +256,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
/* If this is the first call to malloc then the heap will require
|
/* If this is the first call to malloc then the heap will require
|
||||||
* initialisation to setup the list of free blocks. */
|
* initialisation to setup the list of free blocks. */
|
||||||
|
@ -374,6 +375,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned by
|
/* The block is being returned - it is allocated and owned by
|
||||||
* the application and has no "next" block. */
|
* the application and has no "next" block. */
|
||||||
secureheapALLOCATE_BLOCK( pxBlock );
|
secureheapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -394,7 +397,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
|
|
||||||
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M23"
|
#define portARCH_NAME "Cortex-M23"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M33"
|
#define portARCH_NAME "Cortex-M33"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -234,7 +234,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
|
||||||
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If the block being inserted plugged a gab, so was merged with the block
|
/* If the block being inserted plugged a gap, so was merged with the block
|
||||||
* before and the block after, then it's pxNextFreeBlock pointer will have
|
* before and the block after, then it's pxNextFreeBlock pointer will have
|
||||||
* already been set, and should not be set here as that would make it point
|
* already been set, and should not be set here as that would make it point
|
||||||
* to itself. */
|
* to itself. */
|
||||||
|
@ -256,6 +256,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
/* If this is the first call to malloc then the heap will require
|
/* If this is the first call to malloc then the heap will require
|
||||||
* initialisation to setup the list of free blocks. */
|
* initialisation to setup the list of free blocks. */
|
||||||
|
@ -374,6 +375,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned by
|
/* The block is being returned - it is allocated and owned by
|
||||||
* the application and has no "next" block. */
|
* the application and has no "next" block. */
|
||||||
secureheapALLOCATE_BLOCK( pxBlock );
|
secureheapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -394,7 +397,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
|
|
||||||
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M33"
|
#define portARCH_NAME "Cortex-M33"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M35P"
|
#define portARCH_NAME "Cortex-M35P"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -234,7 +234,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
|
||||||
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If the block being inserted plugged a gab, so was merged with the block
|
/* If the block being inserted plugged a gap, so was merged with the block
|
||||||
* before and the block after, then it's pxNextFreeBlock pointer will have
|
* before and the block after, then it's pxNextFreeBlock pointer will have
|
||||||
* already been set, and should not be set here as that would make it point
|
* already been set, and should not be set here as that would make it point
|
||||||
* to itself. */
|
* to itself. */
|
||||||
|
@ -256,6 +256,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
/* If this is the first call to malloc then the heap will require
|
/* If this is the first call to malloc then the heap will require
|
||||||
* initialisation to setup the list of free blocks. */
|
* initialisation to setup the list of free blocks. */
|
||||||
|
@ -374,6 +375,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned by
|
/* The block is being returned - it is allocated and owned by
|
||||||
* the application and has no "next" block. */
|
* the application and has no "next" block. */
|
||||||
secureheapALLOCATE_BLOCK( pxBlock );
|
secureheapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -394,7 +397,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
|
|
||||||
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M35P"
|
#define portARCH_NAME "Cortex-M35P"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -34,7 +34,7 @@
|
||||||
#include "FreeRTOS.h"
|
#include "FreeRTOS.h"
|
||||||
#include "task.h"
|
#include "task.h"
|
||||||
|
|
||||||
#ifndef __VFP_FP__
|
#ifndef __ARM_FP
|
||||||
#error This port can only be used when the project options are configured to enable hardware floating point support.
|
#error This port can only be used when the project options are configured to enable hardware floating point support.
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -40,7 +40,7 @@
|
||||||
#include "task.h"
|
#include "task.h"
|
||||||
#include "mpu_syscall_numbers.h"
|
#include "mpu_syscall_numbers.h"
|
||||||
|
|
||||||
#ifndef __VFP_FP__
|
#ifndef __ARM_FP
|
||||||
#error This port can only be used when the project options are configured to enable hardware floating point support.
|
#error This port can only be used when the project options are configured to enable hardware floating point support.
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -55,6 +55,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M55"
|
#define portARCH_NAME "Cortex-M55"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 1
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -234,7 +234,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
|
||||||
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If the block being inserted plugged a gab, so was merged with the block
|
/* If the block being inserted plugged a gap, so was merged with the block
|
||||||
* before and the block after, then it's pxNextFreeBlock pointer will have
|
* before and the block after, then it's pxNextFreeBlock pointer will have
|
||||||
* already been set, and should not be set here as that would make it point
|
* already been set, and should not be set here as that would make it point
|
||||||
* to itself. */
|
* to itself. */
|
||||||
|
@ -256,6 +256,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
/* If this is the first call to malloc then the heap will require
|
/* If this is the first call to malloc then the heap will require
|
||||||
* initialisation to setup the list of free blocks. */
|
* initialisation to setup the list of free blocks. */
|
||||||
|
@ -374,6 +375,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned by
|
/* The block is being returned - it is allocated and owned by
|
||||||
* the application and has no "next" block. */
|
* the application and has no "next" block. */
|
||||||
secureheapALLOCATE_BLOCK( pxBlock );
|
secureheapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -394,7 +397,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
|
|
||||||
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -55,6 +55,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M55"
|
#define portARCH_NAME "Cortex-M55"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 1
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -34,7 +34,7 @@
|
||||||
#include "FreeRTOS.h"
|
#include "FreeRTOS.h"
|
||||||
#include "task.h"
|
#include "task.h"
|
||||||
|
|
||||||
#ifndef __VFP_FP__
|
#ifndef __ARM_FP
|
||||||
#error This port can only be used when the project options are configured to enable hardware floating point support.
|
#error This port can only be used when the project options are configured to enable hardware floating point support.
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -55,6 +55,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M85"
|
#define portARCH_NAME "Cortex-M85"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 1
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -234,7 +234,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
|
||||||
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If the block being inserted plugged a gab, so was merged with the block
|
/* If the block being inserted plugged a gap, so was merged with the block
|
||||||
* before and the block after, then it's pxNextFreeBlock pointer will have
|
* before and the block after, then it's pxNextFreeBlock pointer will have
|
||||||
* already been set, and should not be set here as that would make it point
|
* already been set, and should not be set here as that would make it point
|
||||||
* to itself. */
|
* to itself. */
|
||||||
|
@ -256,6 +256,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
/* If this is the first call to malloc then the heap will require
|
/* If this is the first call to malloc then the heap will require
|
||||||
* initialisation to setup the list of free blocks. */
|
* initialisation to setup the list of free blocks. */
|
||||||
|
@ -374,6 +375,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned by
|
/* The block is being returned - it is allocated and owned by
|
||||||
* the application and has no "next" block. */
|
* the application and has no "next" block. */
|
||||||
secureheapALLOCATE_BLOCK( pxBlock );
|
secureheapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -394,7 +397,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
|
|
||||||
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -55,6 +55,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M85"
|
#define portARCH_NAME "Cortex-M85"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 1
|
||||||
#define portDONT_DISCARD __attribute__( ( used ) )
|
#define portDONT_DISCARD __attribute__( ( used ) )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M23"
|
#define portARCH_NAME "Cortex-M23"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -234,7 +234,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
|
||||||
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If the block being inserted plugged a gab, so was merged with the block
|
/* If the block being inserted plugged a gap, so was merged with the block
|
||||||
* before and the block after, then it's pxNextFreeBlock pointer will have
|
* before and the block after, then it's pxNextFreeBlock pointer will have
|
||||||
* already been set, and should not be set here as that would make it point
|
* already been set, and should not be set here as that would make it point
|
||||||
* to itself. */
|
* to itself. */
|
||||||
|
@ -256,6 +256,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
/* If this is the first call to malloc then the heap will require
|
/* If this is the first call to malloc then the heap will require
|
||||||
* initialisation to setup the list of free blocks. */
|
* initialisation to setup the list of free blocks. */
|
||||||
|
@ -374,6 +375,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned by
|
/* The block is being returned - it is allocated and owned by
|
||||||
* the application and has no "next" block. */
|
* the application and has no "next" block. */
|
||||||
secureheapALLOCATE_BLOCK( pxBlock );
|
secureheapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -394,7 +397,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
|
|
||||||
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M23"
|
#define portARCH_NAME "Cortex-M23"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
#define portHAS_ARMV8M_MAIN_EXTENSION 0
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M33"
|
#define portARCH_NAME "Cortex-M33"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -234,7 +234,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
|
||||||
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If the block being inserted plugged a gab, so was merged with the block
|
/* If the block being inserted plugged a gap, so was merged with the block
|
||||||
* before and the block after, then it's pxNextFreeBlock pointer will have
|
* before and the block after, then it's pxNextFreeBlock pointer will have
|
||||||
* already been set, and should not be set here as that would make it point
|
* already been set, and should not be set here as that would make it point
|
||||||
* to itself. */
|
* to itself. */
|
||||||
|
@ -256,6 +256,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
/* If this is the first call to malloc then the heap will require
|
/* If this is the first call to malloc then the heap will require
|
||||||
* initialisation to setup the list of free blocks. */
|
* initialisation to setup the list of free blocks. */
|
||||||
|
@ -374,6 +375,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned by
|
/* The block is being returned - it is allocated and owned by
|
||||||
* the application and has no "next" block. */
|
* the application and has no "next" block. */
|
||||||
secureheapALLOCATE_BLOCK( pxBlock );
|
secureheapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -394,7 +397,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
|
|
||||||
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M33"
|
#define portARCH_NAME "Cortex-M33"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M35P"
|
#define portARCH_NAME "Cortex-M35P"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -234,7 +234,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
|
||||||
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If the block being inserted plugged a gab, so was merged with the block
|
/* If the block being inserted plugged a gap, so was merged with the block
|
||||||
* before and the block after, then it's pxNextFreeBlock pointer will have
|
* before and the block after, then it's pxNextFreeBlock pointer will have
|
||||||
* already been set, and should not be set here as that would make it point
|
* already been set, and should not be set here as that would make it point
|
||||||
* to itself. */
|
* to itself. */
|
||||||
|
@ -256,6 +256,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
/* If this is the first call to malloc then the heap will require
|
/* If this is the first call to malloc then the heap will require
|
||||||
* initialisation to setup the list of free blocks. */
|
* initialisation to setup the list of free blocks. */
|
||||||
|
@ -374,6 +375,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned by
|
/* The block is being returned - it is allocated and owned by
|
||||||
* the application and has no "next" block. */
|
* the application and has no "next" block. */
|
||||||
secureheapALLOCATE_BLOCK( pxBlock );
|
secureheapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -394,7 +397,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
|
|
||||||
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -50,6 +50,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M35P"
|
#define portARCH_NAME "Cortex-M35P"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 0
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -55,6 +55,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M55"
|
#define portARCH_NAME "Cortex-M55"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 1
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -234,7 +234,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
|
||||||
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If the block being inserted plugged a gab, so was merged with the block
|
/* If the block being inserted plugged a gap, so was merged with the block
|
||||||
* before and the block after, then it's pxNextFreeBlock pointer will have
|
* before and the block after, then it's pxNextFreeBlock pointer will have
|
||||||
* already been set, and should not be set here as that would make it point
|
* already been set, and should not be set here as that would make it point
|
||||||
* to itself. */
|
* to itself. */
|
||||||
|
@ -256,6 +256,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
/* If this is the first call to malloc then the heap will require
|
/* If this is the first call to malloc then the heap will require
|
||||||
* initialisation to setup the list of free blocks. */
|
* initialisation to setup the list of free blocks. */
|
||||||
|
@ -374,6 +375,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned by
|
/* The block is being returned - it is allocated and owned by
|
||||||
* the application and has no "next" block. */
|
* the application and has no "next" block. */
|
||||||
secureheapALLOCATE_BLOCK( pxBlock );
|
secureheapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -394,7 +397,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
|
|
||||||
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -55,6 +55,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M55"
|
#define portARCH_NAME "Cortex-M55"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 1
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -55,6 +55,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M85"
|
#define portARCH_NAME "Cortex-M85"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 1
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -234,7 +234,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
|
||||||
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If the block being inserted plugged a gab, so was merged with the block
|
/* If the block being inserted plugged a gap, so was merged with the block
|
||||||
* before and the block after, then it's pxNextFreeBlock pointer will have
|
* before and the block after, then it's pxNextFreeBlock pointer will have
|
||||||
* already been set, and should not be set here as that would make it point
|
* already been set, and should not be set here as that would make it point
|
||||||
* to itself. */
|
* to itself. */
|
||||||
|
@ -256,6 +256,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
/* If this is the first call to malloc then the heap will require
|
/* If this is the first call to malloc then the heap will require
|
||||||
* initialisation to setup the list of free blocks. */
|
* initialisation to setup the list of free blocks. */
|
||||||
|
@ -374,6 +375,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned by
|
/* The block is being returned - it is allocated and owned by
|
||||||
* the application and has no "next" block. */
|
* the application and has no "next" block. */
|
||||||
secureheapALLOCATE_BLOCK( pxBlock );
|
secureheapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -394,7 +397,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
|
|
||||||
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
#if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -225,6 +225,12 @@ typedef void ( * portISR_t )( void );
|
||||||
|
|
||||||
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
#define portMPU_RLAR_REGION_ENABLE ( 1UL )
|
||||||
|
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
/* Enable Privileged eXecute Never MPU attribute for the selected memory
|
||||||
|
* region. */
|
||||||
|
#define portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER ( 1UL << 4UL )
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Enable privileged access to unmapped region. */
|
/* Enable privileged access to unmapped region. */
|
||||||
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
#define portMPU_PRIV_BACKGROUND_ENABLE_BIT ( 1UL << 2UL )
|
||||||
|
|
||||||
|
@ -1880,6 +1886,16 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR = ( ulRegionEndAddress ) |
|
||||||
( portMPU_RLAR_REGION_ENABLE );
|
( portMPU_RLAR_REGION_ENABLE );
|
||||||
|
|
||||||
|
/* PXN. */
|
||||||
|
#if ( portARMV8M_MINOR_VERSION >= 1 )
|
||||||
|
{
|
||||||
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ) != 0 )
|
||||||
|
{
|
||||||
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= ( portMPU_RLAR_PRIVILEGED_EXECUTE_NEVER );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif /* portARMV8M_MINOR_VERSION >= 1 */
|
||||||
|
|
||||||
/* Normal memory/ Device memory. */
|
/* Normal memory/ Device memory. */
|
||||||
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
if( ( xRegions[ lIndex ].ulParameters & tskMPU_REGION_DEVICE_MEMORY ) != 0 )
|
||||||
{
|
{
|
||||||
|
|
|
@ -55,6 +55,7 @@
|
||||||
*/
|
*/
|
||||||
#define portARCH_NAME "Cortex-M85"
|
#define portARCH_NAME "Cortex-M85"
|
||||||
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
#define portHAS_ARMV8M_MAIN_EXTENSION 1
|
||||||
|
#define portARMV8M_MINOR_VERSION 1
|
||||||
#define portDONT_DISCARD __root
|
#define portDONT_DISCARD __root
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -40,6 +40,10 @@
|
||||||
#include <mmsystem.h>
|
#include <mmsystem.h>
|
||||||
#include <winbase.h>
|
#include <winbase.h>
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
/******************************************************************************
|
/******************************************************************************
|
||||||
* Defines
|
* Defines
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
|
@ -215,4 +219,8 @@ void vPortGenerateSimulatedInterruptFromWindowsThread( uint32_t ulInterruptNumbe
|
||||||
void vPortSetInterruptHandler( uint32_t ulInterruptNumber,
|
void vPortSetInterruptHandler( uint32_t ulInterruptNumber,
|
||||||
uint32_t ( * pvHandler )( void ) );
|
uint32_t ( * pvHandler )( void ) );
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
#endif /* ifndef PORTMACRO_H */
|
#endif /* ifndef PORTMACRO_H */
|
||||||
|
|
|
@ -53,11 +53,19 @@
|
||||||
/* A few bytes might be lost to byte aligning the heap start address. */
|
/* A few bytes might be lost to byte aligning the heap start address. */
|
||||||
#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
|
#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
|
||||||
|
|
||||||
|
/* Max value that fits in a size_t type. */
|
||||||
|
#define heapSIZE_MAX ( ~( ( size_t ) 0 ) )
|
||||||
|
|
||||||
|
/* Check if adding a and b will result in overflow. */
|
||||||
|
#define heapADD_WILL_OVERFLOW( a, b ) ( ( a ) > ( heapSIZE_MAX - ( b ) ) )
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/* Allocate the memory for the heap. */
|
/* Allocate the memory for the heap. */
|
||||||
#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
|
#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
|
||||||
|
|
||||||
/* The application writer has already defined the array used for the RTOS
|
/* The application writer has already defined the array used for the RTOS
|
||||||
* heap - probably so it can be placed in a special segment or address. */
|
* heap - probably so it can be placed in a special segment or address. */
|
||||||
extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
|
extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
|
||||||
#else
|
#else
|
||||||
static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
|
static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
|
||||||
|
@ -76,12 +84,16 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
/* Ensure that blocks are always aligned. */
|
/* Ensure that blocks are always aligned. */
|
||||||
#if ( portBYTE_ALIGNMENT != 1 )
|
#if ( portBYTE_ALIGNMENT != 1 )
|
||||||
{
|
{
|
||||||
if( xWantedSize & portBYTE_ALIGNMENT_MASK )
|
size_t xAdditionalRequiredSize;
|
||||||
|
|
||||||
|
if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
|
||||||
{
|
{
|
||||||
/* Byte alignment required. Check for overflow. */
|
/* Byte alignment required. */
|
||||||
if( ( xWantedSize + ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ) ) > xWantedSize )
|
xAdditionalRequiredSize = portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK );
|
||||||
|
|
||||||
|
if( heapADD_WILL_OVERFLOW( xWantedSize, xAdditionalRequiredSize ) == 0 )
|
||||||
{
|
{
|
||||||
xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
|
xWantedSize += xAdditionalRequiredSize;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
|
@ -96,13 +108,14 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
if( pucAlignedHeap == NULL )
|
if( pucAlignedHeap == NULL )
|
||||||
{
|
{
|
||||||
/* Ensure the heap starts on a correctly aligned boundary. */
|
/* Ensure the heap starts on a correctly aligned boundary. */
|
||||||
pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT - 1 ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
|
pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) &( ucHeap[ portBYTE_ALIGNMENT - 1 ] ) ) &
|
||||||
|
( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Check there is enough room left for the allocation and. */
|
/* Check there is enough room left for the allocation. */
|
||||||
if( ( xWantedSize > 0 ) && /* valid size */
|
if( ( xWantedSize > 0 ) &&
|
||||||
( ( xNextFreeByte + xWantedSize ) < configADJUSTED_HEAP_SIZE ) &&
|
( heapADD_WILL_OVERFLOW( xNextFreeByte, xWantedSize ) == 0 ) &&
|
||||||
( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) ) /* Check for overflow. */
|
( ( xNextFreeByte + xWantedSize ) < configADJUSTED_HEAP_SIZE ) )
|
||||||
{
|
{
|
||||||
/* Return the next free byte then increment the index past this
|
/* Return the next free byte then increment the index past this
|
||||||
* block. */
|
* block. */
|
||||||
|
|
|
@ -87,7 +87,7 @@
|
||||||
#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
|
#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
|
||||||
|
|
||||||
/* The application writer has already defined the array used for the RTOS
|
/* The application writer has already defined the array used for the RTOS
|
||||||
* heap - probably so it can be placed in a special segment or address. */
|
* heap - probably so it can be placed in a special segment or address. */
|
||||||
extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
|
extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
|
||||||
#else
|
#else
|
||||||
PRIVILEGED_DATA static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
|
PRIVILEGED_DATA static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
|
||||||
|
@ -160,6 +160,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
if( xWantedSize > 0 )
|
if( xWantedSize > 0 )
|
||||||
{
|
{
|
||||||
|
@ -261,6 +262,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
|
|
||||||
xFreeBytesRemaining -= pxBlock->xBlockSize;
|
xFreeBytesRemaining -= pxBlock->xBlockSize;
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned
|
/* The block is being returned - it is allocated and owned
|
||||||
* by the application and has no "next" block. */
|
* by the application and has no "next" block. */
|
||||||
heapALLOCATE_BLOCK( pxBlock );
|
heapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -269,7 +272,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
}
|
}
|
||||||
( void ) xTaskResumeAll();
|
( void ) xTaskResumeAll();
|
||||||
|
|
||||||
|
|
|
@ -89,7 +89,7 @@
|
||||||
#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
|
#if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
|
||||||
|
|
||||||
/* The application writer has already defined the array used for the RTOS
|
/* The application writer has already defined the array used for the RTOS
|
||||||
* heap - probably so it can be placed in a special segment or address. */
|
* heap - probably so it can be placed in a special segment or address. */
|
||||||
extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
|
extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
|
||||||
#else
|
#else
|
||||||
PRIVILEGED_DATA static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
|
PRIVILEGED_DATA static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
|
||||||
|
@ -177,6 +177,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
if( xWantedSize > 0 )
|
if( xWantedSize > 0 )
|
||||||
{
|
{
|
||||||
|
@ -302,6 +303,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned
|
/* The block is being returned - it is allocated and owned
|
||||||
* by the application and has no "next" block. */
|
* by the application and has no "next" block. */
|
||||||
heapALLOCATE_BLOCK( pxBlock );
|
heapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -323,7 +326,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
}
|
}
|
||||||
( void ) xTaskResumeAll();
|
( void ) xTaskResumeAll();
|
||||||
|
|
||||||
|
@ -542,7 +548,7 @@ static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert ) /* PRIVI
|
||||||
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If the block being inserted plugged a gab, so was merged with the block
|
/* If the block being inserted plugged a gap, so was merged with the block
|
||||||
* before and the block after, then it's pxNextFreeBlock pointer will have
|
* before and the block after, then it's pxNextFreeBlock pointer will have
|
||||||
* already been set, and should not be set here as that would make it point
|
* already been set, and should not be set here as that would make it point
|
||||||
* to itself. */
|
* to itself. */
|
||||||
|
|
|
@ -212,6 +212,7 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
BlockLink_t * pxNewBlockLink;
|
BlockLink_t * pxNewBlockLink;
|
||||||
void * pvReturn = NULL;
|
void * pvReturn = NULL;
|
||||||
size_t xAdditionalRequiredSize;
|
size_t xAdditionalRequiredSize;
|
||||||
|
size_t xAllocatedBlockSize = 0;
|
||||||
|
|
||||||
/* The heap must be initialised before the first call to
|
/* The heap must be initialised before the first call to
|
||||||
* pvPortMalloc(). */
|
* pvPortMalloc(). */
|
||||||
|
@ -330,6 +331,8 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
xAllocatedBlockSize = pxBlock->xBlockSize;
|
||||||
|
|
||||||
/* The block is being returned - it is allocated and owned
|
/* The block is being returned - it is allocated and owned
|
||||||
* by the application and has no "next" block. */
|
* by the application and has no "next" block. */
|
||||||
heapALLOCATE_BLOCK( pxBlock );
|
heapALLOCATE_BLOCK( pxBlock );
|
||||||
|
@ -351,7 +354,10 @@ void * pvPortMalloc( size_t xWantedSize )
|
||||||
mtCOVERAGE_TEST_MARKER();
|
mtCOVERAGE_TEST_MARKER();
|
||||||
}
|
}
|
||||||
|
|
||||||
traceMALLOC( pvReturn, xWantedSize );
|
traceMALLOC( pvReturn, xAllocatedBlockSize );
|
||||||
|
|
||||||
|
/* Prevent compiler warnings when trace macros are not used. */
|
||||||
|
( void ) xAllocatedBlockSize;
|
||||||
}
|
}
|
||||||
( void ) xTaskResumeAll();
|
( void ) xTaskResumeAll();
|
||||||
|
|
||||||
|
|
8
portable/ThirdParty/GCC/Posix/port.c
vendored
8
portable/ThirdParty/GCC/Posix/port.c
vendored
|
@ -49,12 +49,10 @@
|
||||||
* only or serialized with a FreeRTOS primitive such as a binary
|
* only or serialized with a FreeRTOS primitive such as a binary
|
||||||
* semaphore or mutex.
|
* semaphore or mutex.
|
||||||
*----------------------------------------------------------*/
|
*----------------------------------------------------------*/
|
||||||
#include "portmacro.h"
|
|
||||||
|
|
||||||
#ifdef __linux__
|
#ifdef __linux__
|
||||||
#define __USE_GNU
|
#define _GNU_SOURCE
|
||||||
#endif
|
#endif
|
||||||
|
#include "portmacro.h"
|
||||||
#include <errno.h>
|
#include <errno.h>
|
||||||
#include <pthread.h>
|
#include <pthread.h>
|
||||||
#include <limits.h>
|
#include <limits.h>
|
||||||
|
@ -182,7 +180,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||||
thread->xDying = pdFALSE;
|
thread->xDying = pdFALSE;
|
||||||
|
|
||||||
/* Ensure ulStackSize is at least PTHREAD_STACK_MIN */
|
/* Ensure ulStackSize is at least PTHREAD_STACK_MIN */
|
||||||
ulStackSize = (ulStackSize < PTHREAD_STACK_MIN) ? PTHREAD_STACK_MIN : ulStackSize;
|
ulStackSize = (ulStackSize < ( size_t ) ( PTHREAD_STACK_MIN ) ) ? ( size_t ) ( PTHREAD_STACK_MIN ) : ulStackSize;
|
||||||
|
|
||||||
pthread_attr_init( &xThreadAttributes );
|
pthread_attr_init( &xThreadAttributes );
|
||||||
iRet = pthread_attr_setstacksize( &xThreadAttributes, ulStackSize );
|
iRet = pthread_attr_setstacksize( &xThreadAttributes, ulStackSize );
|
||||||
|
|
|
@ -43,9 +43,13 @@ struct event * event_create( void )
|
||||||
{
|
{
|
||||||
struct event * ev = malloc( sizeof( struct event ) );
|
struct event * ev = malloc( sizeof( struct event ) );
|
||||||
|
|
||||||
|
if( ev != NULL )
|
||||||
|
{
|
||||||
ev->event_triggered = false;
|
ev->event_triggered = false;
|
||||||
pthread_mutex_init( &ev->mutex, NULL );
|
pthread_mutex_init( &ev->mutex, NULL );
|
||||||
pthread_cond_init( &ev->cond, NULL );
|
pthread_cond_init( &ev->cond, NULL );
|
||||||
|
}
|
||||||
|
|
||||||
return ev;
|
return ev;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
2
portable/ThirdParty/GCC/RP2040/README.md
vendored
2
portable/ThirdParty/GCC/RP2040/README.md
vendored
|
@ -26,7 +26,7 @@ This will locate the FreeRTOS kernel if it is a direct sub-module of your projec
|
||||||
version, you can include the FreeRTOS-Kernel support later in your CMake build (possibly in a subdirectory) and the
|
version, you can include the FreeRTOS-Kernel support later in your CMake build (possibly in a subdirectory) and the
|
||||||
FreeRTOS-Kernel support will only apply to those targets which explicitly include FreeRTOS support.
|
FreeRTOS-Kernel support will only apply to those targets which explicitly include FreeRTOS support.
|
||||||
|
|
||||||
As an alternative to the `import` statement above, you can just add this directory directly via thw following (with
|
As an alternative to the `import` statement above, you can just add this directory directly via the following (with
|
||||||
the same placement restrictions related to the Raspberry Pi Pico SDK version above):
|
the same placement restrictions related to the Raspberry Pi Pico SDK version above):
|
||||||
|
|
||||||
```cmake
|
```cmake
|
||||||
|
|
35
portable/ThirdParty/xClang/XCOREAI/port.c
vendored
35
portable/ThirdParty/xClang/XCOREAI/port.c
vendored
|
@ -12,6 +12,15 @@ static hwtimer_t xKernelTimer;
|
||||||
|
|
||||||
uint32_t ulPortYieldRequired[ portMAX_CORE_COUNT ] = { pdFALSE };
|
uint32_t ulPortYieldRequired[ portMAX_CORE_COUNT ] = { pdFALSE };
|
||||||
|
|
||||||
|
/* When this port was designed, it was assumed that pxCurrentTCBs would always
|
||||||
|
exist and that it would always be an array containing pointers to the current
|
||||||
|
TCBs for each core. In v11, this is not the case; if we are only running one
|
||||||
|
core, the symbol is pxCurrentTCB instead. Therefore, this port adds a layer
|
||||||
|
of indirection - we populate this pointer-to-pointer in the RTOS kernel entry
|
||||||
|
function below. This makes this port agnostic to whether it is running on SMP
|
||||||
|
or singlecore RTOS. */
|
||||||
|
void ** xcorePvtTCBContainer;
|
||||||
|
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
void vIntercoreInterruptISR( void )
|
void vIntercoreInterruptISR( void )
|
||||||
|
@ -140,6 +149,28 @@ DEFINE_RTOS_KERNEL_ENTRY( void, vPortStartSchedulerOnCore, void )
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/* Populate the TCBContainer depending on whether we're singlecore or SMP */
|
||||||
|
#if ( configNUMBER_OF_CORES == 1 )
|
||||||
|
{
|
||||||
|
asm volatile (
|
||||||
|
"ldaw %0, dp[pxCurrentTCB]\n\t"
|
||||||
|
: "=r"(xcorePvtTCBContainer)
|
||||||
|
: /* no inputs */
|
||||||
|
: /* no clobbers */
|
||||||
|
);
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
{
|
||||||
|
asm volatile (
|
||||||
|
"ldaw %0, dp[pxCurrentTCBs]\n\t"
|
||||||
|
: "=r"(xcorePvtTCBContainer)
|
||||||
|
: /* no inputs */
|
||||||
|
: /* no clobbers */
|
||||||
|
);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
debug_printf( "FreeRTOS Core %d initialized\n", xCoreID );
|
debug_printf( "FreeRTOS Core %d initialized\n", xCoreID );
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -147,8 +178,8 @@ DEFINE_RTOS_KERNEL_ENTRY( void, vPortStartSchedulerOnCore, void )
|
||||||
* to run and jump into it.
|
* to run and jump into it.
|
||||||
*/
|
*/
|
||||||
asm volatile (
|
asm volatile (
|
||||||
"mov r6, %0\n\t" /* R6 must be the FreeRTOS core ID*/
|
"mov r6, %0\n\t" /* R6 must be the FreeRTOS core ID. In singlecore this is always 0. */
|
||||||
"ldaw r5, dp[pxCurrentTCBs]\n\t" /* R5 must be the TCB list which is indexed by R6 */
|
"ldw r5, dp[xcorePvtTCBContainer]\n\t" /* R5 must be the TCB list which is indexed by R6 */
|
||||||
"bu _freertos_restore_ctx\n\t"
|
"bu _freertos_restore_ctx\n\t"
|
||||||
: /* no outputs */
|
: /* no outputs */
|
||||||
: "r" ( xCoreID )
|
: "r" ( xCoreID )
|
||||||
|
|
9
portable/ThirdParty/xClang/XCOREAI/portasm.S
vendored
9
portable/ThirdParty/xClang/XCOREAI/portasm.S
vendored
|
@ -14,11 +14,8 @@ rest of the ISR callback functions. */
|
||||||
.issue_mode dual
|
.issue_mode dual
|
||||||
.cc_top kexcept.function, kexcept
|
.cc_top kexcept.function, kexcept
|
||||||
kexcept:
|
kexcept:
|
||||||
ldc r11, 0x0008
|
bu _DoException /* This symbol is generated by the toolchain and */
|
||||||
shl r11, r11, 16
|
/* provides graceful exception handling */
|
||||||
ldc r9, 0x0080
|
|
||||||
or r11, r11, r9
|
|
||||||
bau r11 //_TrapHandler is at 0x00080080. TODO: Is it always? Why can't I access the symbol _TrapHandler?
|
|
||||||
|
|
||||||
_yield:
|
_yield:
|
||||||
{set sp, r4 /* Restore the task's SP to save the rest of its context. */
|
{set sp, r4 /* Restore the task's SP to save the rest of its context. */
|
||||||
|
@ -123,7 +120,7 @@ _yield_continue:
|
||||||
ldaw r11, sp[37]}
|
ldaw r11, sp[37]}
|
||||||
vstc r11[0]
|
vstc r11[0]
|
||||||
#endif
|
#endif
|
||||||
ldaw r5, dp[pxCurrentTCBs] /* Get the current TCB array into r5. */
|
ldw r5, dp[xcorePvtTCBContainer]
|
||||||
ldw r1, r5[r0] /* Get this core's current TCB pointer into r1. */
|
ldw r1, r5[r0] /* Get this core's current TCB pointer into r1. */
|
||||||
stw r4, r1[0x0] /* Save the current task's SP to the first */
|
stw r4, r1[0x0] /* Save the current task's SP to the first */
|
||||||
/* word (top of stack) in the current TCB. */
|
/* word (top of stack) in the current TCB. */
|
||||||
|
|
21
tasks.c
21
tasks.c
|
@ -886,10 +886,11 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
|
||||||
|
|
||||||
portENABLE_INTERRUPTS();
|
portENABLE_INTERRUPTS();
|
||||||
|
|
||||||
/* Enabling interrupts should cause this core to immediately
|
/* Enabling interrupts should cause this core to immediately service
|
||||||
* service the pending interrupt and yield. If the run state is still
|
* the pending interrupt and yield. After servicing the pending interrupt,
|
||||||
* yielding here then that is a problem. */
|
* the task needs to re-evaluate its run state within this loop, as
|
||||||
configASSERT( pxThisTCB->xTaskRunState != taskTASK_SCHEDULED_TO_YIELD );
|
* other cores may have requested this task to yield, potentially altering
|
||||||
|
* its run state. */
|
||||||
|
|
||||||
portDISABLE_INTERRUPTS();
|
portDISABLE_INTERRUPTS();
|
||||||
portGET_TASK_LOCK();
|
portGET_TASK_LOCK();
|
||||||
|
@ -3780,6 +3781,8 @@ void vTaskStartScheduler( void )
|
||||||
|
|
||||||
traceTASK_SWITCHED_IN();
|
traceTASK_SWITCHED_IN();
|
||||||
|
|
||||||
|
traceSTARTING_SCHEDULER( xIdleTaskHandles );
|
||||||
|
|
||||||
/* Setting up the timer tick is hardware specific and thus in the
|
/* Setting up the timer tick is hardware specific and thus in the
|
||||||
* portable interface. */
|
* portable interface. */
|
||||||
|
|
||||||
|
@ -3943,10 +3946,10 @@ void vTaskSuspendAll( void )
|
||||||
static TickType_t prvGetExpectedIdleTime( void )
|
static TickType_t prvGetExpectedIdleTime( void )
|
||||||
{
|
{
|
||||||
TickType_t xReturn;
|
TickType_t xReturn;
|
||||||
UBaseType_t uxHigherPriorityReadyTasks = pdFALSE;
|
BaseType_t uxHigherPriorityReadyTasks = pdFALSE;
|
||||||
TCB_t * const pxConstCurrentTCB = prvGetCurrentTaskTCB();
|
TCB_t * const pxConstCurrentTCB = prvGetCurrentTaskTCB();
|
||||||
|
|
||||||
/* uxHigherPriorityReadyTasks takes care of the case where
|
/* xHigherPriorityReadyTasks takes care of the case where
|
||||||
* configUSE_PREEMPTION is 0, so there may be tasks above the idle priority
|
* configUSE_PREEMPTION is 0, so there may be tasks above the idle priority
|
||||||
* task that are in the Ready state, even though the idle task is
|
* task that are in the Ready state, even though the idle task is
|
||||||
* running. */
|
* running. */
|
||||||
|
@ -3954,7 +3957,7 @@ void vTaskSuspendAll( void )
|
||||||
{
|
{
|
||||||
if( uxTopReadyPriority > tskIDLE_PRIORITY )
|
if( uxTopReadyPriority > tskIDLE_PRIORITY )
|
||||||
{
|
{
|
||||||
uxHigherPriorityReadyTasks = pdTRUE;
|
xHigherPriorityReadyTasks = pdTRUE;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
|
@ -3968,7 +3971,7 @@ void vTaskSuspendAll( void )
|
||||||
* care of the case where the co-operative scheduler is in use. */
|
* care of the case where the co-operative scheduler is in use. */
|
||||||
if( uxTopReadyPriority > uxLeastSignificantBit )
|
if( uxTopReadyPriority > uxLeastSignificantBit )
|
||||||
{
|
{
|
||||||
uxHigherPriorityReadyTasks = pdTRUE;
|
xHigherPriorityReadyTasks = pdTRUE;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#endif /* if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 ) */
|
#endif /* if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 ) */
|
||||||
|
@ -3984,7 +3987,7 @@ void vTaskSuspendAll( void )
|
||||||
* processed. */
|
* processed. */
|
||||||
xReturn = 0;
|
xReturn = 0;
|
||||||
}
|
}
|
||||||
else if( uxHigherPriorityReadyTasks != pdFALSE )
|
else if( xHigherPriorityReadyTasks != pdFALSE )
|
||||||
{
|
{
|
||||||
/* There are tasks in the Ready state that have a priority above the
|
/* There are tasks in the Ready state that have a priority above the
|
||||||
* idle priority. This path can only be reached if
|
* idle priority. This path can only be reached if
|
||||||
|
|
Loading…
Reference in a new issue