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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-24 23:42:10 -04:00
Modify Cortus save and restore macros to save and restore the entire context, so as not to rely on anything the compiler is doing.
This commit is contained in:
Richard Barry
parent
1ae4ae2348
commit
f4d8802850
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@ -76,39 +76,28 @@ static void prvSetupTimerInterrupt( void );
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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/* For the time being, mimic the stack when using the
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__attribute__((interrupt)) plus the extra caller saved registers. */
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This leaves a buffer of two works unused. */
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pxTopOfStack -= 18;
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/* Make space on the stack for the context - this leaves a couple of spaces
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empty. */
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pxTopOfStack -= 20;
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/* RTT */
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pxTopOfStack[ 16 ] = ( portSTACK_TYPE )pxCode;
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/* PSR */
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/* Fill the registers with known values to assist debugging. */
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pxTopOfStack[ 16 ] = portKERNEL_INTERRUPT_PRIORITY_LEVEL;
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pxTopOfStack[ 15 ] = portINITIAL_PSR;
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/* R14 and R15 aka FuncSP and LR, respectively */
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pxTopOfStack[ 14 ] = 0x00000000;
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pxTopOfStack[ 13 ] = ( portSTACK_TYPE )( pxTopOfStack + 17 );
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/* R7 to R2 */
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pxTopOfStack[ 12 ] = 0x07070707;
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pxTopOfStack[ 11 ] = 0x06060606;
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pxTopOfStack[ 10 ] = 0x05050505;
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pxTopOfStack[ 9 ] = 0x04040404;
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pxTopOfStack[ 8 ] = 0x03030303;
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pxTopOfStack[ 7 ] = ( portSTACK_TYPE )pvParameters;
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/* Set the Interrupt Priority on Task entry. */
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pxTopOfStack[ 6 ] = portKERNEL_INTERRUPT_PRIORITY_LEVEL;
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/* R13 to R8. */
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pxTopOfStack[ 5 ] = 0x0D0D0D0D;
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pxTopOfStack[ 4 ] = 0x0C0C0C0C;
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pxTopOfStack[ 3 ] = 0x0B0B0B0B;
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pxTopOfStack[ 2 ] = 0x0A0A0A0A;
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pxTopOfStack[ 1 ] = 0x09090909;
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pxTopOfStack[ 0 ] = 0x08080808;
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pxTopOfStack[ 14 ] = ( unsigned long ) pxCode;
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pxTopOfStack[ 13 ] = 0x00000000UL; /* R15. */
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pxTopOfStack[ 12 ] = 0x00000000UL; /* R14. */
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pxTopOfStack[ 11 ] = 0x0d0d0d0dUL;
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pxTopOfStack[ 10 ] = 0x0c0c0c0cUL;
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pxTopOfStack[ 9 ] = 0x0b0b0b0bUL;
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pxTopOfStack[ 8 ] = 0x0a0a0a0aUL;
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pxTopOfStack[ 7 ] = 0x09090909UL;
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pxTopOfStack[ 6 ] = 0x08080808UL;
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pxTopOfStack[ 5 ] = 0x07070707UL;
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pxTopOfStack[ 4 ] = 0x06060606UL;
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pxTopOfStack[ 3 ] = 0x05050505UL;
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pxTopOfStack[ 2 ] = 0x04040404UL;
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pxTopOfStack[ 1 ] = 0x03030303UL;
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pxTopOfStack[ 0 ] = ( unsigned long ) pvParameters;
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return pxTopOfStack;
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}
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@ -129,18 +118,6 @@ portBASE_TYPE xPortStartScheduler( void )
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/* Restore callee saved registers. */
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portRESTORE_CONTEXT();
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/* Mimic an ISR epilogue to start the task executing. */
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asm __volatile__( \
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"ldd r6, [r1]+0x20 \n" \
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"mov psr, r6 \n" \
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"mov rtt, r7 \n" \
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"ldd r14, [r1]+0x18 \n" \
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"ldq r4, [r1]+0x8 \n" \
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"ldd r2, [r1] \n" \
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"add r1, #0x28 \n" \
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"rti \n" \
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); \
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/* Should not get here. */
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return 0;
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}
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@ -159,24 +136,19 @@ static void prvSetupTimerInterrupt( void )
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}
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/*-----------------------------------------------------------*/
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void interrupt_handler( portIRQ_TRAP_YIELD )
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/* Trap 31 handler. */
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void interrupt31_handler( void ) __attribute__((naked));
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void interrupt31_handler( void )
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{
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/* Save remaining registers. */
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portSAVE_CONTEXT();
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vTaskSwitchContext();
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/* Restore the first lot of registers, the remains will be restored when
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this function exits. */
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__asm volatile ( "call vTaskSwitchContext" );
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portRESTORE_CONTEXT();
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}
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/*-----------------------------------------------------------*/
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/* Timer tick interrupt handler */
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void interrupt_handler( IRQ_COUNTER1 )
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static void prvProcessTick( void ) __attribute__((noinline));
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static void prvProcessTick( void )
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{
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portSAVE_CONTEXT();
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vTaskIncrementTick();
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#if configUSE_PREEMPTION == 1
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@ -185,7 +157,15 @@ void interrupt_handler( IRQ_COUNTER1 )
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/* Clear the Tick Interrupt. */
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counter1->expired = 0;
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}
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/*-----------------------------------------------------------*/
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/* Timer 1 interrupt handler, used for tick interrupt. */
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void interrupt7_handler( void ) __attribute__((naked));
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void interrupt7_handler( void )
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{
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portSAVE_CONTEXT();
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prvProcessTick();
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portRESTORE_CONTEXT();
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}
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/*-----------------------------------------------------------*/
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@ -92,7 +92,7 @@ extern "C" {
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 4
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#define portNOP() __asm__ volatile ( "mov r0,r0; nop" )
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#define portNOP() __asm__ volatile ( "mov r0, r0" )
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#define portCRITICAL_NESTING_IN_TCB 1
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#define portIRQ_TRAP_YIELD 31
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#define portKERNEL_INTERRUPT_PRIORITY_LEVEL 0
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@ -120,22 +120,28 @@ extern void vTaskExitCritical( void );
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/*---------------------------------------------------------------------------*/
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#define portYIELD_FROM_ISR() vTaskSwitchContext()
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#define portYIELD_FROM_ISR( xHigherPriorityTaskWoken ) if( xHigherPriorityTaskWoken != pdFALSE ) vTaskSwitchContext()
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/*---------------------------------------------------------------------------*/
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#define portSAVE_CONTEXT() \
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asm __volatile__( \
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"sub r1, #0x1c \n" /* Make space on the stack. */ \
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"stq r8, [r1] \n" /* Store the remaining context registers. */ \
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"std r12, [r1]+0x10 \n" \
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asm __volatile__ \
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( \
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"sub r1, #68 \n" /* Make space on the stack for the context. */ \
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"std r2, [r1] + 0 \n" \
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"stq r4, [r1] + 8 \n" \
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"stq r8, [r1] + 24 \n" \
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"stq r12, [r1] + 40 \n" \
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"mov r6, rtt \n" \
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"mov r7, psr \n" \
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"std r6, [r1] + 56 \n" \
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"movhi r2, #16384 \n" /* Set the pointer to the IC. */ \
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"ldub r3, [r2]+2 \n" /* Load the current interrupt mask. */ \
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"st r3, [r1]+0x18 \n" /* Store the interrupt mask on the stack. */ \
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"ldub r3, [r2] + 2 \n" /* Load the current interrupt mask. */ \
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"st r3, [r1]+ 64 \n" /* Store the interrupt mask on the stack. */ \
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"ld r2, [r0]+short(pxCurrentTCB) \n" /* Load the pointer to the TCB. */ \
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"st r1, [r2] \n" /* Save the stack pointer into the TCB. */ \
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"mov r14, r1 \n" /* Compiler expects r14 to be set to the function stack. */ \
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:::"r2","r3","r4","r5","r15" ); /* Clobber list includes all of the caller saved registers so that they are saved as part of the Interrupt handler pre-amble. */
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);
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/*---------------------------------------------------------------------------*/
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#define portRESTORE_CONTEXT() \
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@ -143,12 +149,17 @@ extern void vTaskExitCritical( void );
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"ld r2, [r0]+short(pxCurrentTCB) \n" /* Load the TCB to find the stack pointer and context. */ \
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"ld r1, [r2] \n" \
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"movhi r2, #16384 \n" /* Set the pointer to the IC. */ \
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"ld r3, [r1]+0x18 \n" /* Load the previous interrupt mask. */ \
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"stb r3, [r2]+2 \n" /* Set the current interrupt mask to be the previous. */ \
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"ldd r12, [r1]+0x10 \n" /* Restore the callee saved registers. Caller saved registers are restored by the function exit. */ \
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"ldq r8, [r1] \n" \
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"add r1, #0x1c \n" \
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"mov r14, r1 \n" \
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"ld r3, [r1] + 64 \n" /* Load the previous interrupt mask. */ \
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"stb r3, [r2] + 2 \n" /* Set the current interrupt mask to be the previous. */ \
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"ldd r6, [r1] + 56 \n" /* Restore context. */ \
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"mov rtt, r6 \n" \
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"mov psr, r7 \n" \
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"ldd r2, [r1] + 0 \n" \
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"ldq r4, [r1] + 8 \n" \
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"ldq r8, [r1] + 24 \n" \
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"ldq r12, [r1] + 40 \n" \
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"add r1, #68 \n" \
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"rti \n" \
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);
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/*---------------------------------------------------------------------------*/
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