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Ready the PPC440 projects for release.

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This commit is contained in:
Richard Barry 2009-07-05 08:41:27 +00:00
parent 3634ebb497
commit f42b1510fa
41 changed files with 16992 additions and 833 deletions
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6
Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h
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@ -52,6 +52,8 @@
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#include <xparameters.h>
/*-----------------------------------------------------------
* Application specific definitions.
*
@ -68,12 +70,12 @@
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 250 )
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 200000000 ) /* Clock setup from start.asm in the demo application. */
#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) XPAR_CPU_PPC440_CORE_CLOCK_FREQ_HZ ) /* Clock setup from start.asm in the demo application. */
#define configTICK_RATE_HZ ( (portTickType) 1000 )
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 6 )
#define configTOTAL_HEAP_SIZE ( (size_t) (80 * 1024) )
#define configMAX_TASK_NAME_LEN ( 20 )
#define configUSE_16_BIT_TICKS 1
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configUSE_TRACE_FACILITY 0

BIN
Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/__xps/ise/system.ise
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Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/__xps/ise/system_xdb/tmp/ise.lock
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2
Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/__xps/ise/system_xdb/tmp/ise/__REGISTRY__/HierarchicalDesign/HDProject/regkeys
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@ -2,7 +2,7 @@ CommandLine-Map
s
CommandLine-Ngdbuild
ngdbuild -ise ../__xps/ise/system.ise -p xc5vfx70tff1136-1 -nt timestamp -bm system.bmm C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/implementation/system.ngc -uc system.ucf system.ngd
s
CommandLine-Par

2
Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/__xps/ise/system_xdb/tmp/ise/__REGISTRY__/_ProjRepoInternal_/regkeys
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@ -2,7 +2,7 @@ ISE_VERSION_CREATED_WITH
11.1
s
ISE_VERSION_LAST_SAVED_WITH
11.1
11.2
s
LastRepoDir
E:\my_projects\Wittenstein\release\svn\main2\FreeRTOS\Demo\PPC440_FPU_Xilinx_Virtex5_GCC\__xps\ise\

2
Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/__xps/ise/system_xdb/tmp/ise/version
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@ -7,4 +7,4 @@ OBJSTORE_VERSION
ISE_VERSION_CREATED_WITH
11.1
ISE_VERSION_LAST_SAVED_WITH
11.1
11.2

2
Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/__xps/system.gui
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@ -11,7 +11,7 @@
<VARIABLE COL_INDEX="5" COL_WIDTH="327" IS_VISIBLE="TRUE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
<VARIABLE COL_INDEX="6" IS_VISIBLE="FALSE" VIEWDISP="Type" VIEWTYPE="HEADER"/>
</HEADERS>
<SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="144,735,295" VERSION="0"/>
<SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="137,696,280" VERSION="0"/>
<STATUS>
<SELECTIONS/>
</STATUS>

4355
Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/system.log
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1
Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/system.make
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@ -245,6 +245,7 @@ $(SYSTEM_HW_HANDOFF_BMM): implementation/$(SYSTEM)_bd.bmm
################## BEHAVIORAL SIMULATION ##################
$(BEHAVIORAL_SIM_SCRIPT): $(MHSFILE) __xps/simgen.opt \
$(WRAPPER_NGC_FILES) \
$(BRAMINIT_ELF_FILES)
@echo "*********************************************"
@echo "Creating behavioral simulation models..."

4
Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/system_incl.make
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@ -57,9 +57,9 @@ TIMING_SIM_SCRIPT = simulation/timing/$(SYSTEM)_setup.do
DEFAULT_SIM_SCRIPT = $(BEHAVIORAL_SIM_SCRIPT)
MIX_LANG_SIM_OPT = -mixed yes
MIX_LANG_SIM_OPT = -mixed no
SIMGEN_OPTIONS = -p $(DEVICE) -lang $(LANGUAGE) $(SEARCHPATHOPT) $(BRAMINIT_ELF_FILE_ARGS) $(MIX_LANG_SIM_OPT) -msg __xps/ise/xmsgprops.lst -s mti -X C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/
SIMGEN_OPTIONS = -p $(DEVICE) -lang $(LANGUAGE) $(SEARCHPATHOPT) $(BRAMINIT_ELF_FILE_ARGS) $(MIX_LANG_SIM_OPT) -msg __xps/ise/xmsgprops.lst -sd implementation/ -s mti -X C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/
LIBRARIES = \