From f38a54b42a104565e7d14a6e24423ba511a5a53d Mon Sep 17 00:00:00 2001
From: Jonathan Cubides <jonathan.cubides@sifive.com>
Date: Thu, 23 Jan 2025 14:48:05 +0100
Subject: [PATCH] port: riscv: Split the number of registers and the size of
 the context

---
 portable/GCC/RISC-V/portContext.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/portable/GCC/RISC-V/portContext.h b/portable/GCC/RISC-V/portContext.h
index 6baae753d..0264f12d4 100644
--- a/portable/GCC/RISC-V/portContext.h
+++ b/portable/GCC/RISC-V/portContext.h
@@ -49,15 +49,17 @@
  * specific version of freertos_risc_v_chip_specific_extensions.h.  See the
  * notes at the top of portASM.S file. */
 #ifdef __riscv_32e
-    #define portCONTEXT_SIZE               ( 15 * portWORD_SIZE )
+    #define portIREG_COUNT                 15
     #define portCRITICAL_NESTING_OFFSET    13
     #define portMSTATUS_OFFSET             14
 #else
-    #define portCONTEXT_SIZE               ( 31 * portWORD_SIZE )
+    #define portIREG_COUNT                 31
     #define portCRITICAL_NESTING_OFFSET    29
     #define portMSTATUS_OFFSET             30
 #endif
+#define portICONTEXT_SIZE ( portIREG_COUNT * portWORD_SIZE )
 
+#define portCONTEXT_SIZE               ( portICONTEXT_SIZE )
 /*-----------------------------------------------------------*/
 
 .extern pxCurrentTCB