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Add MB91460 port and demo files.
This commit is contained in:
Richard Barry
parent
e6e5add7d8
commit
eed758709c
30 changed files with 31710 additions and 0 deletions
81
Demo/MB91460_Softune/SRC/FreeRTOSConfig.h
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81
Demo/MB91460_Softune/SRC/FreeRTOSConfig.h
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/*
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FreeRTOS.org V4.4.0 - Copyright (C) 2003-2007 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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FreeRTOS.org is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS.org is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS.org; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS.org, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
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with commercial development and support options.
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***************************************************************************
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*/
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#ifndef FREERTOS_CONFIG_H
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#define FREERTOS_CONFIG_H
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/*-----------------------------------------------------------
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* Application specific definitions.
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*
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* These definitions should be adjusted for your particular hardware and
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* application requirements.
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*
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* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
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* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
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*----------------------------------------------------------*/
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#define configUSE_PREEMPTION 1
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#define configUSE_IDLE_HOOK 1
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#define configUSE_TICK_HOOK 1
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#define configTICK_RATE_HZ ( ( portTickType ) 100 )
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#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 64000000 ) /* Clock setup from start91460.asm in the demo application. */
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#define configPER_CLOCK_HZ ( ( unsigned portLONG ) 16000000 ) /* Clock setup from start91460.asm in the demo application. */
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#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 6 )
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#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 70 )
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#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 32768 - 4192 ) )
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#define configMAX_TASK_NAME_LEN ( 20 )
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#define configUSE_TRACE_FACILITY 1
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#define configUSE_16_BIT_TICKS 0
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#define configIDLE_SHOULD_YIELD 1
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#define configUSE_MUTEXES 1
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/* Co-routine definitions. */
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#define configUSE_CO_ROUTINES 1
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#define configMAX_CO_ROUTINE_PRIORITIES ( 4 )
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/* Set the following definitions to 1 to include the API function, or zero
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to exclude the API function. */
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#define INCLUDE_vTaskPrioritySet 1
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#define INCLUDE_uxTaskPriorityGet 1
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#define INCLUDE_vTaskDelete 1
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#define INCLUDE_vTaskCleanUpResources 0
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#define INCLUDE_vTaskSuspend 1
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#define INCLUDE_vTaskDelayUntil 1
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#define INCLUDE_vTaskDelay 1
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#define INCLUDE_vResumeFromISR 1
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#endif /* FREERTOS_CONFIG_H */
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372
Demo/MB91460_Softune/SRC/MAIN.c
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372
Demo/MB91460_Softune/SRC/MAIN.c
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/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
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/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
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/* ELIGIBILITY FOR ANY PURPOSES. */
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/* (C) Fujitsu Microelectronics Europe GmbH */
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/*------------------------------------------------------------------------
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MAIN.C
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- description
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- See README.TXT for project description and disclaimer.
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-------------------------------------------------------------------------*/
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/*************************@INCLUDE_START************************/
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#include "mb91467d.h"
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#include "vectors.h"
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#include "FreeRTOS.h"
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#include "task.h"
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#include "watchdog.h"
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/* Demo task priorities. */
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#define WTC_TASK_PRIORITY ( tskIDLE_PRIORITY + 5 )
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#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )
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#define TASK_UTILITY_PRIORITY ( tskIDLE_PRIORITY + 3 )
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#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 3 )
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#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
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#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
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#define mainQUEUE_BLOCK_PRIORITY ( tskIDLE_PRIORITY + 2 )
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#define mainDEATH_PRIORITY ( tskIDLE_PRIORITY + 1 )
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#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
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#define mainGENERIC_QUEUE_PRIORITY ( tskIDLE_PRIORITY )
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/* Baud rate used by the COM test tasks. */
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#define mainCOM_TEST_BAUD_RATE ( ( unsigned portLONG ) 19200 )
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/* The frequency at which the 'Check' tasks executes. See the comments at the
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top of the page. When the system is operating error free the 'Check' task
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toggles an LED every three seconds. If an error is discovered in any task the
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rate is increased to 500 milliseconds. [in this case the '*' characters on the
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LCD represent LED's]*/
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#define mainNO_ERROR_CHECK_DELAY ( ( portTickType ) 3000 / portTICK_RATE_MS )
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#define mainERROR_CHECK_DELAY ( ( portTickType ) 500 / portTICK_RATE_MS )
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/*---------------------------------------------------------------------------*/
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#define ledNUMBER_OF_LEDS 8
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#define mainCOM_TEST_LED 0x05
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#define mainCHECK_TEST_LED 0x07
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/*---------------------------------------------------------------------------*/
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/*
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* The function that implements the Check task. See the comments at the head
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* of the page for implementation details.
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*/
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static void vErrorChecks( void *pvParameters );
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/*
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* Called by the Check task. Returns pdPASS if all the other tasks are found
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* to be operating without error - otherwise returns pdFAIL.
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*/
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static portSHORT prvCheckOtherTasksAreStillRunning( void );
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/*---------------------------------------------------------------------------*/
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static unsigned portSHORT sState[ledNUMBER_OF_LEDS] = {pdFALSE};
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static unsigned portSHORT sState1[ledNUMBER_OF_LEDS] = {pdFALSE};
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/*---------------------------------------------------------------------------
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* The below callback function is called from Tick ISR if configUSE_TICK_HOOK
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* is configured as 1. This function needs to be uncommented if the crhook.c
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* is not used, since the crhook.c has also defined vApplicationTickHook().
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*---------------------------------------------------------------------------*/
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/*void vApplicationTickHook ( void )
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{
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#if WATCHDOG == WTC_IN_TICK
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Kick_Watchdog();
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#endif
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}*/
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/*---------------------------------------------------------------------------
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* The below callback function is called from Delayed ISR if configUSE_IDLE_HOOK
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* is configured as 1.
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*---------------------------------------------------------------------------*/
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void vApplicationIdleHook ( void )
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{
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#if WATCHDOG == WTC_IN_IDLE
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Kick_Watchdog();
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#endif
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vCoRoutineSchedule();
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}
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/*---------------------------------------------------------------------------
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* Initialize Port 00
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*---------------------------------------------------------------------------*/
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static void prvInitPort( void )
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{
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DDR16=0xFF;
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DDR25=0xFF;
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}
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/*---------------------------------------------------------------------------
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* Setup the hardware
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*---------------------------------------------------------------------------*/
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static void prvSetupHardware( void )
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{
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prvInitPort();
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#if WATCHDOG != WTC_NONE
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InitWatchdog();
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#endif
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}
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/*********************@FUNCTION_HEADER_START*********************
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*@FUNCTION NAME: main() *
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* *
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*@DESCRIPTION: The main function controls the program flow *
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* *
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*@PARAMETER: none *
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* *
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*@RETURN: none *
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* *
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***********************@FUNCTION_HEADER_END*********************/
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void main(void)
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{
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__set_il(31); /* allow all levels */
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InitIrqLevels(); /* init interrupts */
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prvSetupHardware();
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#if WATCHDOG == WTC_IN_TASK
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vStartWatchdogTask( WTC_TASK_PRIORITY );
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#endif
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/* Start the standard demo application tasks. */
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vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
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vStartIntegerMathTasks( tskIDLE_PRIORITY );
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vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED - 1 );
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vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
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vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
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vStartBlockingQueueTasks ( mainQUEUE_BLOCK_PRIORITY );
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vStartDynamicPriorityTasks();
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vStartMathTasks( tskIDLE_PRIORITY );
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vStartFlashCoRoutines(ledNUMBER_OF_LEDS);
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vStartHookCoRoutines();
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/* Start the 'Check' task which is defined in this file. */
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xTaskCreate( vErrorChecks, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
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vStartGenericQueueTasks( mainGENERIC_QUEUE_PRIORITY );
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vStartQueuePeekTasks();
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vTraceListTasks( TASK_UTILITY_PRIORITY );
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vCreateBlockTimeTasks();
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vCreateSuicidalTasks( mainDEATH_PRIORITY );
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vTaskStartScheduler( );
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/* Should not reach here */
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while (1)
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{
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__asm(" NOP "); //
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}
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}
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/*-----------------------------------------------------------*/
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void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
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{
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if (uxLED < ledNUMBER_OF_LEDS)
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{
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vTaskSuspendAll();
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/* Toggle the state of the single genuine on board LED. */
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if( sState[uxLED])
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{
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PDR25 |= (1 << uxLED);
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}
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else
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{
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PDR25 &= ~(1 << uxLED);
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}
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sState[uxLED] = !(sState[uxLED]);
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xTaskResumeAll();
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}
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else
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{
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uxLED -= ledNUMBER_OF_LEDS;
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vTaskSuspendAll();
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/* Toggle the state of the single genuine on board LED. */
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if( sState1[uxLED])
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{
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PDR16 |= (1 << uxLED);
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}
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else
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{
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PDR16 &= ~(1 << uxLED);
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}
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sState1[uxLED] = !(sState1[uxLED]);
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xTaskResumeAll();
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}
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}
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/*-----------------------------------------------------------*/
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void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
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{
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/* Set or clear the output [in this case show or hide the '*' character. */
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if( uxLED < ledNUMBER_OF_LEDS )
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{
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vTaskSuspendAll();
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{
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if( xValue )
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{
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PDR25 |= (1 << uxLED);
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sState[uxLED] = 1;
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}
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else
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{
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PDR25 &= ~(1 << uxLED);
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sState[uxLED] = 0;
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}
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}
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xTaskResumeAll();
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}
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else
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{
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uxLED -= ledNUMBER_OF_LEDS;
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vTaskSuspendAll();
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{
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if( xValue )
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{
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PDR16 |= (1 << uxLED);
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sState1[uxLED] = 1;
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}
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else
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{
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PDR16 &= ~(1 << uxLED);
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sState1[uxLED] = 0;
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}
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}
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xTaskResumeAll();
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}
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}
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/*-----------------------------------------------------------*/
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static void vErrorChecks( void *pvParameters )
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{
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static volatile unsigned portLONG ulDummyVariable = 3UL;
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portTickType xDelayPeriod = mainNO_ERROR_CHECK_DELAY;
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/* Cycle for ever, delaying then checking all the other tasks are still
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operating without error. */
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for( ;; )
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{
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/* Wait until it is time to check again. The time we wait here depends
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on whether an error has been detected or not. When an error is
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detected the time is shortened resulting in a faster LED flash rate. */
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vTaskDelay( xDelayPeriod );
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/* Perform a bit of 32bit maths to ensure the registers used by the
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integer tasks get some exercise outside of the integer tasks
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themselves. The result here is not important we are just deliberately
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changing registers used by other tasks to ensure that their context
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switch is operating as required. - see the demo application
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documentation for more info. */
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ulDummyVariable *= 3UL;
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/* See if the other tasks are all ok. */
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if( prvCheckOtherTasksAreStillRunning() != pdPASS )
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{
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/* An error occurred in one of the tasks so shorten the delay
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period - which has the effect of increasing the frequency of the
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LED toggle. */
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xDelayPeriod = mainERROR_CHECK_DELAY;
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}
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/* Flash! */
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vParTestToggleLED(mainCHECK_TEST_LED);
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}
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}
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/*-----------------------------------------------------------*/
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static portSHORT prvCheckOtherTasksAreStillRunning( void )
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{
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static portSHORT sNoErrorFound = pdTRUE;
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/* The demo tasks maintain a count that increments every cycle of the task
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provided that the task has never encountered an error. This function
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checks the counts maintained by the tasks to ensure they are still being
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incremented. A count remaining at the same value between calls therefore
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indicates that an error has been detected. Only tasks that do not flash
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an LED are checked. */
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if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
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{
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sNoErrorFound = pdFALSE;
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}
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if( xArePollingQueuesStillRunning() != pdTRUE )
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{
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sNoErrorFound = pdFALSE;
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}
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if( xAreComTestTasksStillRunning() != pdTRUE )
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{
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sNoErrorFound = pdFALSE;
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}
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if( xAreSemaphoreTasksStillRunning() != pdTRUE )
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{
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sNoErrorFound = pdFALSE;
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}
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if( xAreBlockingQueuesStillRunning() != pdTRUE )
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{
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sNoErrorFound = pdFALSE;
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}
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if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
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{
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sNoErrorFound = pdFALSE;
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}
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if( xAreMathsTaskStillRunning() != pdTRUE )
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{
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sNoErrorFound = pdFALSE;
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}
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if( xAreFlashCoRoutinesStillRunning() != pdTRUE )
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{
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sNoErrorFound = pdFALSE;
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}
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if( xAreHookCoRoutinesStillRunning() != pdTRUE )
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{
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sNoErrorFound = pdFALSE;
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}
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if( xIsCreateTaskStillRunning() != pdTRUE )
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{
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sNoErrorFound = pdFALSE;
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}
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if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
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{
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sNoErrorFound = pdFALSE;
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}
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if ( xAreGenericQueueTasksStillRunning() != pdTRUE )
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{
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sNoErrorFound = pdFALSE;
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}
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if ( xAreQueuePeekTasksStillRunning() != pdTRUE )
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{
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sNoErrorFound = pdFALSE;
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}
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return sNoErrorFound;
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}
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/********************@FUNCTION_DECLARATION_END******************/
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2533
Demo/MB91460_Softune/SRC/Start91460.asm
Normal file
2533
Demo/MB91460_Softune/SRC/Start91460.asm
Normal file
File diff suppressed because it is too large
Load diff
14
Demo/MB91460_Softune/SRC/mb91467d.asm
Normal file
14
Demo/MB91460_Softune/SRC/mb91467d.asm
Normal file
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@ -0,0 +1,14 @@
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/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
|
||||
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
|
||||
/* ELIGIBILITY FOR ANY PURPOSES. */
|
||||
/* (C) Fujitsu Microelectronics Europe GmbH */
|
||||
/*---------------------------------------------------------------------------
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mb91467d.asm
|
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|
||||
|
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1.00 UMa Initial Version
|
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-----------------------------------------------------------------------------*/
|
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#define __IO_DEFINE
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#include "mb91467d.h"
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24806
Demo/MB91460_Softune/SRC/mb91467d.h
Normal file
24806
Demo/MB91460_Softune/SRC/mb91467d.h
Normal file
File diff suppressed because it is too large
Load diff
207
Demo/MB91460_Softune/SRC/serial/serial.c
Normal file
207
Demo/MB91460_Softune/SRC/serial/serial.c
Normal file
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@ -0,0 +1,207 @@
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/*
|
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FreeRTOS.org V4.7.0 - Copyright (C) 2003-2007 Richard Barry.
|
||||
|
||||
This file is part of the FreeRTOS.org distribution.
|
||||
|
||||
FreeRTOS.org is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
FreeRTOS.org is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with FreeRTOS.org; if not, write to the Free Software
|
||||
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes FreeRTOS.org, without being obliged to provide
|
||||
the source code for any proprietary components. See the licensing section
|
||||
of http://www.FreeRTOS.org for full details of how and when the exception
|
||||
can be applied.
|
||||
|
||||
***************************************************************************
|
||||
See http://www.FreeRTOS.org for documentation, latest information, license
|
||||
and contact details. Please ensure to read the configuration and relevant
|
||||
port sections of the online documentation.
|
||||
|
||||
Also see http://www.SafeRTOS.com a version that has been certified for use
|
||||
in safety critical systems, plus commercial licensing, development and
|
||||
support options.
|
||||
***************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
|
||||
*
|
||||
* This file only supports UART 2
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
#include <stdlib.h>
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "queue.h"
|
||||
#include "task.h"
|
||||
|
||||
/* Demo application includes. */
|
||||
#include "serial.h"
|
||||
|
||||
/* The queue used to hold received characters. */
|
||||
static xQueueHandle xRxedChars;
|
||||
|
||||
/* The queue used to hold characters waiting transmission. */
|
||||
static xQueueHandle xCharsForTx;
|
||||
|
||||
static volatile portSHORT sTHREEmpty;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
|
||||
{
|
||||
//unsigned portLONG ulBaudRateCount;
|
||||
|
||||
portENTER_CRITICAL();
|
||||
{
|
||||
/* Create the queues used by the com test task. */
|
||||
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
|
||||
xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
|
||||
|
||||
/* Initialize UART asynchronous mode */
|
||||
BGR02 = configPER_CLOCK_HZ / ulWantedBaud;
|
||||
|
||||
SCR02 = 0x17; /* 8N1 */
|
||||
SMR02 = 0x0d; /* enable SOT3, Reset, normal mode */
|
||||
SSR02 = 0x02; /* LSB first, enable receive interrupts */
|
||||
|
||||
PFR20_D0 = 1; // enable UART
|
||||
PFR20_D1 = 1; // enable UART
|
||||
|
||||
EPFR20_D1 = 0; // enable UART
|
||||
}
|
||||
portEXIT_CRITICAL();
|
||||
|
||||
/* Unlike other ports, this serial code does not allow for more than one
|
||||
com port. We therefore don't return a pointer to a port structure and can
|
||||
instead just return NULL. */
|
||||
return NULL;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
|
||||
{
|
||||
/* Get the next character from the buffer. Return false if no characters
|
||||
are available, or arrive before xBlockTime expires. */
|
||||
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
|
||||
{
|
||||
return pdTRUE;
|
||||
}
|
||||
else
|
||||
{
|
||||
return pdFALSE;
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
|
||||
{
|
||||
signed portBASE_TYPE xReturn;
|
||||
|
||||
/* Transmit a character. */
|
||||
portENTER_CRITICAL();
|
||||
{
|
||||
if( sTHREEmpty == pdTRUE )
|
||||
{
|
||||
/* If sTHREEmpty is true then the UART Tx ISR has indicated that
|
||||
there are no characters queued to be transmitted - so we can
|
||||
write the character directly to the shift Tx register. */
|
||||
sTHREEmpty = pdFALSE;
|
||||
TDR02 = cOutChar;
|
||||
xReturn = pdPASS;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* sTHREEmpty is false, so there are still characters waiting to be
|
||||
transmitted. We have to queue this character so it gets
|
||||
transmitted in turn. */
|
||||
|
||||
/* Return false if after the block time there is no room on the Tx
|
||||
queue. It is ok to block inside a critical section as each task
|
||||
maintains it's own critical section status. */
|
||||
if (xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) == pdTRUE)
|
||||
{
|
||||
xReturn = pdPASS;
|
||||
}
|
||||
else
|
||||
{
|
||||
xReturn = pdFAIL;
|
||||
}
|
||||
}
|
||||
|
||||
if (pdPASS == xReturn)
|
||||
{
|
||||
/* Turn on the Tx interrupt so the ISR will remove the character from the
|
||||
queue and send it. This does not need to be in a critical section as
|
||||
if the interrupt has already removed the character the next interrupt
|
||||
will simply turn off the Tx interrupt again. */
|
||||
SSR02_TIE = 1;
|
||||
}
|
||||
|
||||
}
|
||||
portEXIT_CRITICAL();
|
||||
|
||||
return pdPASS;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* UART RX interrupt service routine.
|
||||
*/
|
||||
__interrupt void UART2_RxISR (void)
|
||||
{
|
||||
signed portCHAR cChar;
|
||||
|
||||
/* Get the character from the UART and post it on the queue of Rxed
|
||||
characters. */
|
||||
cChar = RDR02;
|
||||
|
||||
if( xQueueSendFromISR( xRxedChars, &cChar, pdFALSE ) )
|
||||
{
|
||||
/*If the post causes a task to wake force a context switch
|
||||
as the woken task may have a higher priority than the task we have
|
||||
interrupted. */
|
||||
portYIELDFromISR();
|
||||
}
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* UART Tx interrupt service routine.
|
||||
*/
|
||||
__interrupt void UART2_TxISR (void)
|
||||
{
|
||||
signed portCHAR cChar;
|
||||
signed portBASE_TYPE xTaskWoken;
|
||||
|
||||
/* The previous character has been transmitted. See if there are any
|
||||
further characters waiting transmission. */
|
||||
if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWoken ) == pdTRUE )
|
||||
{
|
||||
/* There was another character queued - transmit it now. */
|
||||
TDR02 = cChar;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* There were no other characters to transmit. */
|
||||
sTHREEmpty = pdTRUE;
|
||||
|
||||
/* Disable transmit interrupts */
|
||||
SSR02_TIE = 0;
|
||||
}
|
||||
}
|
||||
|
||||
189
Demo/MB91460_Softune/SRC/utility/taskutility.c
Normal file
189
Demo/MB91460_Softune/SRC/utility/taskutility.c
Normal file
|
|
@ -0,0 +1,189 @@
|
|||
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
|
||||
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
|
||||
/* ELIGIBILITY FOR ANY PURPOSES. */
|
||||
/* (C) Fujitsu Microelectronics Europe GmbH */
|
||||
/*------------------------------------------------------------------------
|
||||
taskutility.C
|
||||
-
|
||||
-------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*************************@INCLUDE_START************************/
|
||||
#include "mb91467d.h"
|
||||
#include "vectors.h"
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
|
||||
static void vUART5Task( void *pvParameters );
|
||||
|
||||
/**************************@INCLUDE_END*************************/
|
||||
/*********************@GLOBAL_VARIABLES_START*******************/
|
||||
const char ASCII[] = "0123456789ABCDEF";
|
||||
|
||||
xTaskHandle UART_TaskHandle;
|
||||
|
||||
void InitUart5(void)
|
||||
{
|
||||
//Initialize UART asynchronous mode
|
||||
BGR05 = 1666; // 9600 Baud @ 16MHz
|
||||
|
||||
SCR05 = 0x17; // 7N2
|
||||
SMR05 = 0x0d; // enable SOT3, Reset, normal mode
|
||||
SSR05 = 0x00; // LSB first
|
||||
|
||||
PFR19_D4 = 1; // enable UART
|
||||
PFR19_D5 = 1; // enable UART
|
||||
|
||||
//EPFR19 = 0x00; // enable UART
|
||||
|
||||
SSR05_RIE = 1;
|
||||
}
|
||||
|
||||
void Putch5(char ch) /* sends a char */
|
||||
{
|
||||
while (SSR05_TDRE == 0); /* wait for transmit buffer empty */
|
||||
TDR05 = ch; /* put ch into buffer */
|
||||
}
|
||||
|
||||
char Getch5(void) /* waits for and returns incomming char */
|
||||
{
|
||||
volatile unsigned ch;
|
||||
|
||||
while(SSR05_RDRF == 0); /* wait for data received */
|
||||
if (SSR05_ORE) /* overrun error */
|
||||
{
|
||||
ch = RDR05; /* reset error flags */
|
||||
return (char)(-1);
|
||||
}
|
||||
else
|
||||
return (RDR05); /* return char */
|
||||
}
|
||||
|
||||
void Puts5(const char *Name5) /* Puts a String to UART */
|
||||
{
|
||||
volatile portSHORT i,len;
|
||||
len = strlen(Name5);
|
||||
|
||||
for (i=0; i<strlen(Name5); i++) /* go through string */
|
||||
{
|
||||
if (Name5[i] == 10)
|
||||
Putch5(13);
|
||||
Putch5(Name5[i]); /* send it out */
|
||||
}
|
||||
}
|
||||
|
||||
void Puthex5(unsigned long n, unsigned char digits)
|
||||
{
|
||||
unsigned portCHAR digit=0,div=0,i;
|
||||
|
||||
div=(4*(digits-1)); /* init shift divisor */
|
||||
for (i=0;i<digits;i++)
|
||||
{
|
||||
digit = ((n >> div)&0xF); /* get hex-digit value */
|
||||
Putch5(digit + ((digit < 0xA) ? '0' : 'A' - 0xA));
|
||||
div-=4; /* next digit shift */
|
||||
}
|
||||
}
|
||||
|
||||
void Putdec5(unsigned long x, int digits)
|
||||
{
|
||||
portSHORT i;
|
||||
portCHAR buf[10],sign=1;
|
||||
|
||||
if (digits < 0) { /* should be print of zero? */
|
||||
digits *= (-1);
|
||||
sign =1;
|
||||
}
|
||||
buf[digits]='\0'; /* end sign of string */
|
||||
|
||||
for (i=digits; i>0; i--) {
|
||||
buf[i-1] = ASCII[x % 10];
|
||||
x = x/10;
|
||||
}
|
||||
|
||||
if ( sign )
|
||||
{
|
||||
for (i=0; buf[i]=='0'; i++) { /* no print of zero */
|
||||
if ( i<digits-1)
|
||||
buf[i] = ' ';
|
||||
}
|
||||
}
|
||||
|
||||
Puts5(buf); /* send string */
|
||||
}
|
||||
|
||||
void vTraceListTasks( unsigned portBASE_TYPE uxPriority )
|
||||
{
|
||||
portENTER_CRITICAL();
|
||||
InitUart5();
|
||||
portENTER_CRITICAL();
|
||||
xTaskCreate( vUART5Task , ( signed portCHAR * ) "UART4", ( unsigned portSHORT ) 2048, ( void * ) NULL, uxPriority, &UART_TaskHandle );
|
||||
}
|
||||
|
||||
static void vUART5Task( void *pvParameters )
|
||||
{
|
||||
portCHAR tasklist_buff[512], trace_buff[512];
|
||||
unsigned portLONG trace_len, j;
|
||||
|
||||
unsigned portCHAR ch;
|
||||
|
||||
Puts5("\n -------------MB91467D FreeRTOS DEMO Task List and Trace Utility----------- \n");
|
||||
|
||||
for(;;)
|
||||
{
|
||||
Puts5("\n\rPress any of the following keys for the corresponding functionality: ");
|
||||
|
||||
Puts5("\n\r1: To call vTaskList() and display current task status ");
|
||||
|
||||
Puts5("\n\r2: To call vTaskStartTrace() and to display trace results once the trace ends");
|
||||
|
||||
SSR05_RIE=1;
|
||||
|
||||
vTaskSuspend(NULL);
|
||||
|
||||
ch=Getch5();
|
||||
|
||||
switch ( ch )
|
||||
{
|
||||
case '1':
|
||||
vTaskList( ( signed char * ) tasklist_buff );
|
||||
Puts5("\n\rThe current task list is as follows....");
|
||||
Puts5("\n\r----------------------------------------------");
|
||||
Puts5("\n\rName State Priority Stack Number");
|
||||
Puts5("\n\r----------------------------------------------");
|
||||
Puts5(tasklist_buff);
|
||||
Puts5("\r----------------------------------------------");
|
||||
break;
|
||||
|
||||
case '2':
|
||||
vTaskStartTrace(( signed char * ) trace_buff, 512);
|
||||
Puts5("\n\rThe trace started!!");
|
||||
vTaskDelay( ( portTickType ) 450);
|
||||
trace_len = ulTaskEndTrace();
|
||||
Puts5("\n\rThe trace ended!!");
|
||||
Puts5("\n\rThe trace is as follows....");
|
||||
Puts5("\n\r--------------------------------------------------------");
|
||||
Puts5("\n\r Tick | Task Number | Tick | Task Number |");
|
||||
Puts5("\n\r--------------------------------------------------------\n\r");
|
||||
for( j = 0 ; j < trace_len ; j++ )
|
||||
{
|
||||
Puthex5(trace_buff[j],2);
|
||||
if(j%4==3) Puts5(" | ");
|
||||
if(j%16==15) Puts5("\n");
|
||||
}
|
||||
Puts5("\r--------------------------------------------------------");
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
Puts5("\n");
|
||||
}
|
||||
}
|
||||
|
||||
__interrupt void UART5_RxISR ( void )
|
||||
{
|
||||
SSR05_RIE=0;
|
||||
vTaskResume( UART_TaskHandle );
|
||||
}
|
||||
352
Demo/MB91460_Softune/SRC/vectors.c
Normal file
352
Demo/MB91460_Softune/SRC/vectors.c
Normal file
|
|
@ -0,0 +1,352 @@
|
|||
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
|
||||
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
|
||||
/* ELIGIBILITY FOR ANY PURPOSES. */
|
||||
/* (C) Fujitsu Microelectronics Europe GmbH */
|
||||
/*------------------------------------------------------------------------
|
||||
VECTORS.C
|
||||
- Interrupt level (priority) setting
|
||||
- Interrupt vector definition
|
||||
|
||||
31.04.05 1.00 UMa Initial Version
|
||||
08.11.05 1.01 MSt SWB Mondeb switch for ICR00 Register added
|
||||
27.02.06 1.02 UMa added comment in DefaultIRQHandler
|
||||
17.03.06 1.03 UMa comment out ICR01
|
||||
28.07.06 1.04 UMa changed comment
|
||||
06.10.06 1.05 UMa changed DefaultIRQHandler
|
||||
-------------------------------------------------------------------------*/
|
||||
|
||||
#include "mb91467d.h"
|
||||
#include "watchdog.h"
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
InitIrqLevels()
|
||||
|
||||
This function pre-sets all interrupt control registers. It can be used
|
||||
to set all interrupt priorities in static applications. If this file
|
||||
contains assignments to dedicated resources, verify that the
|
||||
appropriate controller is used. Not all devices of the MB91460 Series
|
||||
offer all recources.
|
||||
|
||||
NOTE: value 31 disables the interrupt and value 16 sets highest priority.
|
||||
-------------------------------------------------------------------------*/
|
||||
void InitIrqLevels(void)
|
||||
{
|
||||
/* ICRxx */
|
||||
/* Softune Workbench Monitor Debugger is using ext int0 for abort function */
|
||||
/* ICR00 = 31; *//* External Interrupt 0 */
|
||||
/* External Interrupt 1 */
|
||||
ICR01 = 31; /* External Interrupt 2 */
|
||||
/* External Interrupt 3 */
|
||||
ICR02 = 31; /* External Interrupt 4 */
|
||||
/* External Interrupt 5 */
|
||||
ICR03 = 31; /* External Interrupt 6 */
|
||||
/* External Interrupt 7 */
|
||||
ICR04 = 31; /* External Interrupt 8 */
|
||||
/* External Interrupt 9 */
|
||||
ICR05 = 31; /* External Interrupt 10 */
|
||||
/* External Interrupt 11 */
|
||||
ICR06 = 31; /* External Interrupt 12 */
|
||||
/* External Interrupt 13 */
|
||||
ICR07 = 31; /* External Interrupt 14 */
|
||||
/* External Interrupt 15 */
|
||||
ICR08 = 23; /* Reload Timer 0 */
|
||||
/* Reload Timer 1 */
|
||||
ICR09 = 31; /* Reload Timer 2 */
|
||||
/* Reload Timer 3 */
|
||||
ICR10 = 31; /* Reload Timer 4 */
|
||||
/* Reload Timer 5 */
|
||||
ICR11 = 31; /* Reload Timer 6 */
|
||||
/* Reload Timer 7 */
|
||||
ICR12 = 31; /* Free Run Timer 0 */
|
||||
/* Free Run Timer 1 */
|
||||
ICR13 = 31; /* Free Run Timer 2 */
|
||||
/* Free Run Timer 3 */
|
||||
ICR14 = 31; /* Free Run Timer 4 */
|
||||
/* Free Run Timer 5 */
|
||||
ICR15 = 31; /* Free Run Timer 6 */
|
||||
/* Free Run Timer 7 */
|
||||
ICR16 = 31; /* CAN 0 */
|
||||
/* CAN 1 */
|
||||
ICR17 = 31; /* CAN 2 */
|
||||
/* CAN 3 */
|
||||
ICR18 = 31; /* CAN 4 */
|
||||
/* CAN 5 */
|
||||
ICR19 = 31; /* USART (LIN) 0 RX */
|
||||
/* USART (LIN) 0 TX */
|
||||
ICR20 = 31; /* USART (LIN) 1 RX */
|
||||
/* USART (LIN) 1 TX */
|
||||
ICR21 = 21; /* USART (LIN) 2 RX */
|
||||
/* USART (LIN) 2 TX */
|
||||
ICR22 = 31; /* USART (LIN) 3 RX */
|
||||
/* USART (LIN) 3 TX */
|
||||
ICR23 = 23; /* System Reserved */
|
||||
/* Delayed Interrupt */
|
||||
ICR24 = 31; /* System Reserved */
|
||||
/* System Reserved */
|
||||
ICR25 = 31; /* USART (LIN, FIFO) 4 RX */
|
||||
/* USART (LIN, FIFO) 4 TX */
|
||||
ICR26 = 21; /* USART (LIN, FIFO) 5 RX */
|
||||
/* USART (LIN, FIFO) 5 TX */
|
||||
ICR27 = 31; /* USART (LIN, FIFO) 6 RX */
|
||||
/* USART (LIN, FIFO) 6 TX */
|
||||
ICR28 = 31; /* USART (LIN, FIFO) 7 RX */
|
||||
/* USART (LIN, FIFO) 7 TX */
|
||||
ICR29 = 31; /* I2C 0 / I2C 2 */
|
||||
/* I2C 1 / I2C 3 */
|
||||
ICR30 = 31; /* USART (LIN, FIFO) 8 RX */
|
||||
/* USART (LIN, FIFO) 8 TX */
|
||||
ICR31 = 31; /* USART (LIN, FIFO) 9 RX */
|
||||
/* USART (LIN, FIFO) 9 TX */
|
||||
ICR32 = 31; /* USART (LIN, FIFO) 10 RX */
|
||||
/* USART (LIN, FIFO) 10 TX */
|
||||
ICR33 = 31; /* USART (LIN, FIFO) 11 RX */
|
||||
/* USART (LIN, FIFO) 11 TX */
|
||||
ICR34 = 31; /* USART (LIN, FIFO) 12 RX */
|
||||
/* USART (LIN, FIFO) 12 TX */
|
||||
ICR35 = 31; /* USART (LIN, FIFO) 13 RX */
|
||||
/* USART (LIN, FIFO) 13 TX */
|
||||
ICR36 = 31; /* USART (LIN, FIFO) 14 RX */
|
||||
/* USART (LIN, FIFO) 14 TX */
|
||||
ICR37 = 31; /* USART (LIN, FIFO) 15 RX */
|
||||
/* USART (LIN, FIFO) 15 TX */
|
||||
ICR38 = 31; /* Input Capture 0 */
|
||||
/* Input Capture 1 */
|
||||
ICR39 = 31; /* Input Capture 2 */
|
||||
/* Input Capture 3 */
|
||||
ICR40 = 31; /* Input Capture 4 */
|
||||
/* Input Capture 5 */
|
||||
ICR41 = 31; /* Input Capture 6 */
|
||||
/* Input Capture 7 */
|
||||
ICR42 = 31; /* Output Compare 0 */
|
||||
/* Output Compare 1 */
|
||||
ICR43 = 31; /* Output Compare 2 */
|
||||
/* Output Compare 3 */
|
||||
ICR44 = 31; /* Output Compare 4 */
|
||||
/* Output Compare 5 */
|
||||
ICR45 = 31; /* Output Compare 6 */
|
||||
/* Output Compare 7 */
|
||||
ICR46 = 31; /* Sound Generator */
|
||||
/* Phase Frequ. Modulator */
|
||||
ICR47 = 31; /* System Reserved */
|
||||
/* System Reserved */
|
||||
ICR48 = 31; /* Prog. Pulse Gen. 0 */
|
||||
/* Prog. Pulse Gen. 1 */
|
||||
ICR49 = 31; /* Prog. Pulse Gen. 2 */
|
||||
/* Prog. Pulse Gen. 3 */
|
||||
ICR50 = 31; /* Prog. Pulse Gen. 4 */
|
||||
/* Prog. Pulse Gen. 5 */
|
||||
ICR51 = 31; /* Prog. Pulse Gen. 6 */
|
||||
/* Prog. Pulse Gen. 7 */
|
||||
ICR52 = 31; /* Prog. Pulse Gen. 8 */
|
||||
/* Prog. Pulse Gen. 9 */
|
||||
ICR53 = 31; /* Prog. Pulse Gen. 10 */
|
||||
/* Prog. Pulse Gen. 11 */
|
||||
ICR54 = 31; /* Prog. Pulse Gen. 12 */
|
||||
/* Prog. Pulse Gen. 13 */
|
||||
ICR55 = 31; /* Prog. Pulse Gen. 14 */
|
||||
/* Prog. Pulse Gen. 15 */
|
||||
ICR56 = 31; /* Up/Down Counter 0 */
|
||||
/* Up/Down Counter 1 */
|
||||
ICR57 = 31; /* Up/Down Counter 2 */
|
||||
/* Up/Down Counter 3 */
|
||||
ICR58 = 31; /* Real Time Clock */
|
||||
/* Calibration Unit */
|
||||
ICR59 = 31; /* A/D Converter 0 */
|
||||
/* - */
|
||||
ICR60 = 31; /* Alarm Comperator 0 */
|
||||
/* Alarm Comperator 1 */
|
||||
ICR61 = 31; /* Low Volage Detector */
|
||||
/* SMC Zero Point 0-5 */
|
||||
ICR62 = 31; /* Timebase Overflow */
|
||||
/* PLL Clock Gear */
|
||||
ICR63 = 31; /* DMA Controller */
|
||||
/* Main/Sub OSC stability wait */
|
||||
}
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
Prototypes
|
||||
|
||||
Add your own prototypes here. Each vector definition needs is proto-
|
||||
type. Either do it here or include a header file containing them.
|
||||
-------------------------------------------------------------------------*/
|
||||
__interrupt void DefaultIRQHandler (void);
|
||||
extern __interrupt void ReloadTimer0_IRQHandler ( void );
|
||||
extern __interrupt void vPortYield ( void );
|
||||
extern __interrupt void vPortYieldDelayed (void);
|
||||
|
||||
extern __interrupt void UART2_RxISR(void);
|
||||
extern __interrupt void UART2_TxISR(void);
|
||||
extern __interrupt void UART5_RxISR(void);
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
Vector definiton
|
||||
|
||||
Use following statements to define vectors. All resource related
|
||||
vectors are predefined. Remaining software interrupts can be added here
|
||||
as well.
|
||||
------------------------------------------------------------------------*/
|
||||
#pragma intvect 0xBFF8 0 /* (fixed) reset vector */
|
||||
#pragma intvect 0x06000000 1 /* (fixed) Mode Byte */
|
||||
|
||||
#pragma intvect DefaultIRQHandler 15 /* Non Maskable Interrupt */
|
||||
#pragma intvect DefaultIRQHandler 16 /* External Interrupt 0 */
|
||||
#pragma intvect DefaultIRQHandler 17 /* External Interrupt 1 */
|
||||
|
||||
#pragma intvect DefaultIRQHandler 18 /* External Interrupt 2 */
|
||||
|
||||
#pragma intvect DefaultIRQHandler 19 /* External Interrupt 3 */
|
||||
#pragma intvect DefaultIRQHandler 20 /* External Interrupt 4 */
|
||||
#pragma intvect DefaultIRQHandler 21 /* External Interrupt 5 */
|
||||
#pragma intvect DefaultIRQHandler 22 /* External Interrupt 6 */
|
||||
#pragma intvect DefaultIRQHandler 23 /* External Interrupt 7 */
|
||||
#pragma intvect DefaultIRQHandler 24 /* External Interrupt 8 */
|
||||
#pragma intvect DefaultIRQHandler 25 /* External Interrupt 9 */
|
||||
#pragma intvect DefaultIRQHandler 26 /* External Interrupt 10 */
|
||||
#pragma intvect DefaultIRQHandler 27 /* External Interrupt 11 */
|
||||
#pragma intvect DefaultIRQHandler 28 /* External Interrupt 12 */
|
||||
#pragma intvect DefaultIRQHandler 29 /* External Interrupt 13 */
|
||||
#pragma intvect DefaultIRQHandler 30 /* External Interrupt 14 */
|
||||
#pragma intvect DefaultIRQHandler 31 /* External Interrupt 15 */
|
||||
|
||||
#pragma intvect ReloadTimer0_IRQHandler 32 /* Reload Timer 0 */
|
||||
|
||||
#pragma intvect DefaultIRQHandler 33 /* Reload Timer 1 */
|
||||
#pragma intvect DefaultIRQHandler 34 /* Reload Timer 2 */
|
||||
#pragma intvect DefaultIRQHandler 35 /* Reload Timer 3 */
|
||||
#pragma intvect DefaultIRQHandler 36 /* Reload Timer 4 */
|
||||
#pragma intvect DefaultIRQHandler 37 /* Reload Timer 5 */
|
||||
#pragma intvect DefaultIRQHandler 38 /* Reload Timer 6 */
|
||||
#pragma intvect DefaultIRQHandler 39 /* Reload Timer 7 */
|
||||
#pragma intvect DefaultIRQHandler 40 /* Free Run Timer 0 */
|
||||
#pragma intvect DefaultIRQHandler 41 /* Free Run Timer 1 */
|
||||
#pragma intvect DefaultIRQHandler 42 /* Free Run Timer 2 */
|
||||
#pragma intvect DefaultIRQHandler 43 /* Free Run Timer 3 */
|
||||
#pragma intvect DefaultIRQHandler 44 /* Free Run Timer 4 */
|
||||
#pragma intvect DefaultIRQHandler 45 /* Free Run Timer 5 */
|
||||
#pragma intvect DefaultIRQHandler 46 /* Free Run Timer 6 */
|
||||
#pragma intvect DefaultIRQHandler 47 /* Free Run Timer 7 */
|
||||
#pragma intvect DefaultIRQHandler 48 /* CAN 0 */
|
||||
#pragma intvect DefaultIRQHandler 49 /* CAN 1 */
|
||||
#pragma intvect DefaultIRQHandler 50 /* CAN 2 */
|
||||
#pragma intvect DefaultIRQHandler 51 /* CAN 3 */
|
||||
#pragma intvect DefaultIRQHandler 52 /* CAN 4 */
|
||||
#pragma intvect DefaultIRQHandler 53 /* CAN 5 */
|
||||
#pragma intvect DefaultIRQHandler 54 /* USART (LIN) 0 RX */
|
||||
#pragma intvect DefaultIRQHandler 55 /* USART (LIN) 0 TX */
|
||||
#pragma intvect DefaultIRQHandler 56 /* USART (LIN) 1 RX */
|
||||
#pragma intvect DefaultIRQHandler 57 /* USART (LIN) 1 TX */
|
||||
|
||||
#pragma intvect UART2_RxISR 58 /* USART (LIN) 2 RX */
|
||||
#pragma intvect UART2_TxISR 59 /* USART (LIN) 2 TX */
|
||||
|
||||
#pragma intvect DefaultIRQHandler 60 /* USART (LIN) 3 RX */
|
||||
#pragma intvect DefaultIRQHandler 61 /* USART (LIN) 3 TX */
|
||||
#pragma intvect DefaultIRQHandler 62 /* System Reserved */
|
||||
|
||||
#pragma intvect vPortYieldDelayed 63 /* Delayed Interrupt */
|
||||
|
||||
#pragma intvect vPortYield 64 /* INT 64 */
|
||||
|
||||
#pragma intvect DefaultIRQHandler 65 /* System Reserved */
|
||||
#pragma intvect DefaultIRQHandler 66 /* USART (LIN, FIFO) 4 RX */
|
||||
#pragma intvect DefaultIRQHandler 67 /* USART (LIN, FIFO) 4 TX */
|
||||
|
||||
#pragma intvect UART5_RxISR 68 /* USART (LIN, FIFO) 5 RX */
|
||||
|
||||
#pragma intvect DefaultIRQHandler 69 /* USART (LIN, FIFO) 5 TX */
|
||||
#pragma intvect DefaultIRQHandler 70 /* USART (LIN, FIFO) 6 RX */
|
||||
#pragma intvect DefaultIRQHandler 71 /* USART (LIN, FIFO) 6 TX */
|
||||
#pragma intvect DefaultIRQHandler 72 /* USART (LIN, FIFO) 7 RX */
|
||||
#pragma intvect DefaultIRQHandler 73 /* USART (LIN, FIFO) 7 TX */
|
||||
#pragma intvect DefaultIRQHandler 74 /* I2C 0 / I2C 2 */
|
||||
#pragma intvect DefaultIRQHandler 75 /* I2C 1 / I2C 3 */
|
||||
#pragma intvect DefaultIRQHandler 76 /* USART (LIN, FIFO) 8 RX */
|
||||
#pragma intvect DefaultIRQHandler 77 /* USART (LIN, FIFO) 8 TX */
|
||||
#pragma intvect DefaultIRQHandler 78 /* USART (LIN, FIFO) 9 RX */
|
||||
#pragma intvect DefaultIRQHandler 79 /* USART (LIN, FIFO) 9 TX */
|
||||
#pragma intvect DefaultIRQHandler 80 /* USART (LIN, FIFO) 10 RX */
|
||||
#pragma intvect DefaultIRQHandler 81 /* USART (LIN, FIFO) 10 TX */
|
||||
#pragma intvect DefaultIRQHandler 82 /* USART (LIN, FIFO) 11 RX */
|
||||
#pragma intvect DefaultIRQHandler 83 /* USART (LIN, FIFO) 11 TX */
|
||||
#pragma intvect DefaultIRQHandler 84 /* USART (LIN, FIFO) 12 RX */
|
||||
#pragma intvect DefaultIRQHandler 85 /* USART (LIN, FIFO) 12 TX */
|
||||
#pragma intvect DefaultIRQHandler 86 /* USART (LIN, FIFO) 13 RX */
|
||||
#pragma intvect DefaultIRQHandler 87 /* USART (LIN, FIFO) 13 TX */
|
||||
#pragma intvect DefaultIRQHandler 88 /* USART (LIN, FIFO) 14 RX */
|
||||
#pragma intvect DefaultIRQHandler 89 /* USART (LIN, FIFO) 14 TX */
|
||||
#pragma intvect DefaultIRQHandler 90 /* USART (LIN, FIFO) 15 RX */
|
||||
#pragma intvect DefaultIRQHandler 91 /* USART (LIN, FIFO) 15 TX */
|
||||
#pragma intvect DefaultIRQHandler 92 /* Input Capture 0 */
|
||||
#pragma intvect DefaultIRQHandler 93 /* Input Capture 1 */
|
||||
#pragma intvect DefaultIRQHandler 94 /* Input Capture 2 */
|
||||
#pragma intvect DefaultIRQHandler 95 /* Input Capture 3 */
|
||||
#pragma intvect DefaultIRQHandler 96 /* Input Capture 4 */
|
||||
#pragma intvect DefaultIRQHandler 97 /* Input Capture 5 */
|
||||
#pragma intvect DefaultIRQHandler 98 /* Input Capture 6 */
|
||||
#pragma intvect DefaultIRQHandler 99 /* Input Capture 7 */
|
||||
#pragma intvect DefaultIRQHandler 100 /* Output Compare 0 */
|
||||
#pragma intvect DefaultIRQHandler 101 /* Output Compare 1 */
|
||||
#pragma intvect DefaultIRQHandler 102 /* Output Compare 2 */
|
||||
#pragma intvect DefaultIRQHandler 103 /* Output Compare 3 */
|
||||
#pragma intvect DefaultIRQHandler 104 /* Output Compare 4 */
|
||||
#pragma intvect DefaultIRQHandler 105 /* Output Compare 5 */
|
||||
#pragma intvect DefaultIRQHandler 106 /* Output Compare 6 */
|
||||
#pragma intvect DefaultIRQHandler 107 /* Output Compare 7 */
|
||||
#pragma intvect DefaultIRQHandler 108 /* Sound Generator */
|
||||
#pragma intvect DefaultIRQHandler 109 /* Phase Frequ. Modulator */
|
||||
#pragma intvect DefaultIRQHandler 110 /* System Reserved */
|
||||
#pragma intvect DefaultIRQHandler 111 /* System Reserved */
|
||||
#pragma intvect DefaultIRQHandler 112 /* Prog. Pulse Gen. 0 */
|
||||
#pragma intvect DefaultIRQHandler 113 /* Prog. Pulse Gen. 1 */
|
||||
#pragma intvect DefaultIRQHandler 114 /* Prog. Pulse Gen. 2 */
|
||||
#pragma intvect DefaultIRQHandler 115 /* Prog. Pulse Gen. 3 */
|
||||
#pragma intvect DefaultIRQHandler 116 /* Prog. Pulse Gen. 4 */
|
||||
#pragma intvect DefaultIRQHandler 117 /* Prog. Pulse Gen. 5 */
|
||||
#pragma intvect DefaultIRQHandler 118 /* Prog. Pulse Gen. 6 */
|
||||
#pragma intvect DefaultIRQHandler 119 /* Prog. Pulse Gen. 7 */
|
||||
#pragma intvect DefaultIRQHandler 120 /* Prog. Pulse Gen. 8 */
|
||||
#pragma intvect DefaultIRQHandler 121 /* Prog. Pulse Gen. 9 */
|
||||
#pragma intvect DefaultIRQHandler 122 /* Prog. Pulse Gen. 10 */
|
||||
#pragma intvect DefaultIRQHandler 123 /* Prog. Pulse Gen. 11 */
|
||||
#pragma intvect DefaultIRQHandler 124 /* Prog. Pulse Gen. 12 */
|
||||
#pragma intvect DefaultIRQHandler 125 /* Prog. Pulse Gen. 13 */
|
||||
#pragma intvect DefaultIRQHandler 126 /* Prog. Pulse Gen. 14 */
|
||||
#pragma intvect DefaultIRQHandler 127 /* Prog. Pulse Gen. 15 */
|
||||
#pragma intvect DefaultIRQHandler 128 /* Up/Down Counter 0 */
|
||||
#pragma intvect DefaultIRQHandler 129 /* Up/Down Counter 1 */
|
||||
#pragma intvect DefaultIRQHandler 130 /* Up/Down Counter 2 */
|
||||
#pragma intvect DefaultIRQHandler 131 /* Up/Down Counter 3 */
|
||||
#pragma intvect DefaultIRQHandler 132 /* Real Time Clock */
|
||||
#pragma intvect DefaultIRQHandler 133 /* Calibration Unit */
|
||||
#pragma intvect DefaultIRQHandler 134 /* A/D Converter 0 */
|
||||
#pragma intvect DefaultIRQHandler 135 /* - */
|
||||
#pragma intvect DefaultIRQHandler 136 /* Alarm Comperator 0 */
|
||||
#pragma intvect DefaultIRQHandler 137 /* Alarm Comperator 1 */
|
||||
#pragma intvect DefaultIRQHandler 138 /* Low Volage Detector */
|
||||
#pragma intvect DefaultIRQHandler 139 /* SMC Zero Point 0-5 */
|
||||
#pragma intvect DefaultIRQHandler 140 /* Timebase Overflow */
|
||||
#pragma intvect DefaultIRQHandler 141 /* PLL Clock Gear */
|
||||
#pragma intvect DefaultIRQHandler 142 /* DMA Controller */
|
||||
#pragma intvect DefaultIRQHandler 143 /* Main/Sub OSC stability wait */
|
||||
#pragma intvect 0xFFFFFFFF 144 /* Boot Sec. Vector (MB91V460A) */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
DefaultIRQHandler()
|
||||
|
||||
This function is a placeholder for all vector definitions. Either use
|
||||
your own placeholder or add necessary code here.
|
||||
-------------------------------------------------------------------------*/
|
||||
__interrupt
|
||||
void DefaultIRQHandler (void)
|
||||
{
|
||||
/* RB_SYNC; */ /* Synchronisation with R-Bus */
|
||||
/* May be required, if there is */
|
||||
/* no R-Bus access after the */
|
||||
/* reset of the interrupt flag */
|
||||
|
||||
__DI(); /* disable interrupts */
|
||||
while(1)
|
||||
Kick_Watchdog(); /* feed hardware watchdog */
|
||||
/* halt system */
|
||||
}
|
||||
13
Demo/MB91460_Softune/SRC/vectors.h
Normal file
13
Demo/MB91460_Softune/SRC/vectors.h
Normal file
|
|
@ -0,0 +1,13 @@
|
|||
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
|
||||
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
|
||||
/* ELIGIBILITY FOR ANY PURPOSES. */
|
||||
/* (C) Fujitsu Microelectronics Europe GmbH */
|
||||
/*----------------------------------------------------------------------------
|
||||
VECTORS.h
|
||||
|
||||
|
||||
06.10.06 1.00 UMa Initial Version
|
||||
-----------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
void InitIrqLevels(void);
|
||||
59
Demo/MB91460_Softune/SRC/watchdog/watchdog.c
Normal file
59
Demo/MB91460_Softune/SRC/watchdog/watchdog.c
Normal file
|
|
@ -0,0 +1,59 @@
|
|||
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
|
||||
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
|
||||
/* ELIGIBILITY FOR ANY PURPOSES. */
|
||||
/* (C) Fujitsu Microelectronics Europe GmbH */
|
||||
/*------------------------------------------------------------------------
|
||||
watchdog.c
|
||||
- This file contains the function deefinition for hardware watchdog.
|
||||
-------------------------------------------------------------------------*/
|
||||
|
||||
#include "mb91467d.h"
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "watchdog.h"
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* Setup Watchdog
|
||||
*---------------------------------------------------------------------------*/
|
||||
#if WATCHDOG != WTC_NONE
|
||||
void InitWatchdog(void)
|
||||
{
|
||||
HWWDE_ED = WTC_PER_2_16; /* Set the watchdog period as 655.36 ms */
|
||||
}
|
||||
#endif
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* The below task clears the watchdog and blocks itself for WTC_CLR_PER ticks.
|
||||
*---------------------------------------------------------------------------*/
|
||||
#if WATCHDOG == WTC_IN_TASK
|
||||
static void prvWatchdogTask ( void *pvParameters )
|
||||
{
|
||||
const portTickType xFrequency = WTC_CLR_PER;
|
||||
portTickType xLastWakeTime;
|
||||
|
||||
/* Get currrent tick count */
|
||||
xLastWakeTime = xTaskGetTickCount();
|
||||
|
||||
for( ; ; )
|
||||
{
|
||||
/* Get currrent tick count */
|
||||
xLastWakeTime = xTaskGetTickCount();
|
||||
|
||||
Kick_Watchdog();
|
||||
|
||||
/* Block the task for WTC_CLR_PER ticks (300 ms) at watchdog overflow
|
||||
period of WTC_PER_2_16 CLKRC cycles (655.36 ms) */
|
||||
vTaskDelayUntil( &xLastWakeTime, xFrequency );
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* The below function creates hardware watchdog task.
|
||||
*---------------------------------------------------------------------------*/
|
||||
#if WATCHDOG == WTC_IN_TASK
|
||||
void vStartWatchdogTask( unsigned portSHORT uxPriority )
|
||||
{
|
||||
xTaskCreate( prvWatchdogTask , ( signed portCHAR * ) "KickWTC", portMINIMAL_STACK_SIZE, ( void * ) NULL, uxPriority, ( xTaskHandle * ) NULL );
|
||||
}
|
||||
#endif
|
||||
46
Demo/MB91460_Softune/SRC/watchdog/watchdog.h
Normal file
46
Demo/MB91460_Softune/SRC/watchdog/watchdog.h
Normal file
|
|
@ -0,0 +1,46 @@
|
|||
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
|
||||
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
|
||||
/* ELIGIBILITY FOR ANY PURPOSES. */
|
||||
/* (C) Fujitsu Microelectronics Europe GmbH */
|
||||
/*------------------------------------------------------------------------
|
||||
watchdog.h
|
||||
- This file contains the defines and function declaration for hardware watchdog.
|
||||
-------------------------------------------------------------------------*/
|
||||
/*
|
||||
* Clear watchdog defines
|
||||
*/
|
||||
#define WTC_NONE 0 /* Don't initialize and clear watchdog */
|
||||
#define WTC_IN_TASK 1 /* Clear Watchdog in dedicated task */
|
||||
#define WTC_IN_TICK 2 /* Clear Watchdog in TICK Hook */
|
||||
#define WTC_IN_IDLE 3 /* Clear Watchdog in Idle Hook */
|
||||
|
||||
#define WATCHDOG WTC_IN_TASK /* Clear Watchdog in vWatchdogTask() */
|
||||
/*------------------------------------------------------------------------*/
|
||||
/*
|
||||
* Watchdog period defines
|
||||
*/
|
||||
#define WTC_PER_2_16 0 /* The watchdog period is 2^16 CLKRC cycles */
|
||||
#define WTC_PER_2_17 1 /* The watchdog period is 2^17 CLKRC cycles */
|
||||
#define WTC_PER_2_18 2 /* The watchdog period is 2^18 CLKRC cycles */
|
||||
#define WTC_PER_2_19 3 /* The watchdog period is 2^19 CLKRC cycles */
|
||||
/*------------------------------------------------------------------------*/
|
||||
/*
|
||||
* After every WTC_CLR_PER ticks the watchdog would be cleared in the prvWatchdogTask().
|
||||
* This period needs to be chosen in accordance with the current CLKRC (100KHz or 2MHz)
|
||||
* and the above setting WTC_PER_2_XX.
|
||||
*/
|
||||
#define WTC_CLR_PER 30 /* The watchdog clear period in RTOS ticks */
|
||||
/*------------------------------------------------------------------------*/
|
||||
/*
|
||||
* Kick_watchdog Macro to clear watchdog
|
||||
*/
|
||||
#define Kick_Watchdog() \
|
||||
{ HWWD = 0x10; \
|
||||
}
|
||||
/*------------------------------------------------------------------------*/
|
||||
/*
|
||||
* Watchdog function declarations
|
||||
*/
|
||||
void InitWatchdog (void);
|
||||
void vStartWatchdogTask(unsigned portSHORT);
|
||||
|
||||
Loading…
Add table
Add a link
Reference in a new issue