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comment: clarify FPU context offset calculation in RISC-V portContext.h

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wanghengZzz 2026-07-31 09:59:58 +08:00
parent f006492046
commit ee4636fa66
1 changed files with 4 additions and 3 deletions
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7
portable/GCC/RISC-V/portContext.h
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@ -94,9 +94,10 @@
/* /*
* Reserve space at the beginning of the FPU context block for: * Reserve space at the beginning of the FPU context block for:
* 1. The FCSR (Floating-Point Control and Status Register). * 1. The FCSR (one portWORD_SIZE slot).
* 2. Padding to ensure proper memory/stack alignment (8-byte alignment for * 2. Padding (one portWORD_SIZE slot) to align the FP registers:
* RV32D, and 16-byte stack alignment mandated by the RISC-V ABI for RV64). * - RV32: 8-byte boundary for double-precision registers.
* - RV64: 16-byte boundary mandated by the RISC-V ABI.
*/ */
#define portFPU_REG_OFFSET( regIndex ) ( ( 2 * portWORD_SIZE ) + ( regIndex * portFPU_REG_SIZE ) ) #define portFPU_REG_OFFSET( regIndex ) ( ( 2 * portWORD_SIZE ) + ( regIndex * portFPU_REG_SIZE ) )
#define portFPU_CONTEXT_SIZE ( portFPU_REG_SIZE * portFPU_REG_COUNT ) #define portFPU_CONTEXT_SIZE ( portFPU_REG_SIZE * portFPU_REG_COUNT )