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Baseline new RX projects before refining and tidying them up.

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Richard Barry 2015-09-25 08:26:55 +00:00
parent 87243e4a16
commit e5c8119b96
105 changed files with 631 additions and 126 deletions
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124
FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/.HardwareDebuglinker Normal file
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FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/.cproject Normal file
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771
FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/RTOSDemo.ewd Normal file
View file

@ -0,0 +1,771 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<project>
<fileVersion>2</fileVersion>
<configuration>
<name>Debug</name>
<toolchain>
<name>RX</name>
</toolchain>
<debug>1</debug>
<settings>
<name>C-SPY</name>
<archiveVersion>3</archiveVersion>
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<name>CInput</name>
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<option>
<name>CMacFile</name>
<state></state>
</option>
<option>
<name>DynDriver</name>
<state>RXEMUE20</state>
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<name>DDFOverride</name>
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<name>DDFFile</name>
<state>$TOOLKIT_DIR$\config\debugger\ior5f571ml.ddf</state>
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<name>ODebuggerDoubleSize</name>
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<name>OCImagesPath1</name>
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<name>OCImagesPath2</name>
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<name>OCImagesPath3</name>
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<name>ODebuggerCore</name>
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<name>ODebuggerIntSize</name>
<state>1</state>
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<name>OCImagesOffset1</name>
<state></state>
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<name>OCImagesOffset2</name>
<state></state>
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<name>OCImagesUse3</name>
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<option>
<name>ODebuggerPatch</name>
<state>0</state>
</option>
<option>
<name>ODebuggerFpu</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>RXEMUE20</name>
<archiveVersion>4</archiveVersion>
<data>
<version>4</version>
<wantNonLocal>1</wantNonLocal>
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<option>
<name>EmuMandatory</name>
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</option>
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<name>OCEmuUseUSBSerialNo</name>
<state>0</state>
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<option>
<name>OCEmuUSBSerialNo</name>
<state></state>
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<option>
<name>OCDownloadSuppressDownload</name>
<state>0</state>
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<option>
<name>OCDownloadVerifyAll</name>
<state>0</state>
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<name>OCDownloadAttach</name>
<state>0</state>
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<name>OCDebuggingMode</name>
<state>0</state>
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<option>
<name>OCExcecuteAfterFlash</name>
<state>0</state>
</option>
<option>
<name>OCDownloadOnlyChangedBlocks</name>
<state>0</state>
</option>
<option>
<name>E20LogFile</name>
<state>$PROJ_DIR$\cspycomm.log</state>
</option>
<option>
<name>E20DoLogfile</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>RXE2LITE</name>
<archiveVersion>1</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>E2LiteMandatory</name>
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</option>
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<name>E2LiteUseUSBSerialNo</name>
<state>0</state>
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<name>E2LiteUSBSerialNo</name>
<state></state>
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<name>E2LiteDownloadSuppressDownload</name>
<state>0</state>
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<name>E2LiteDownloadVerifyAll</name>
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<name>E2LiteDownloadAttach</name>
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<name>E2LiteDebuggingMode</name>
<state>0</state>
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<name>E2LiteDownloadExcecuteAfterFlash</name>
<state>0</state>
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<name>E2LiteDownloadOnlyChangedBlocks</name>
<state>0</state>
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<option>
<name>E2LiteLogFile</name>
<state>$PROJ_DIR$\cspycomm.log</state>
</option>
<option>
<name>E2LiteDoLogfile</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>RXJLINK</name>
<archiveVersion>4</archiveVersion>
<data>
<version>5</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>JlinkMandatory</name>
<state>1</state>
</option>
<option>
<name>OCJlinkDownloadSuppressDownload</name>
<state>0</state>
</option>
<option>
<name>OCJlinkDownloadVerifyAll</name>
<state>0</state>
</option>
<option>
<name>OCDownloadAttach</name>
<state>0</state>
</option>
<option>
<name>OCDebuggingMode</name>
<state>0</state>
</option>
<option>
<name>OCJlinkExcecuteAfterFlash</name>
<state>0</state>
</option>
<option>
<name>OCJlinkScanChainEnable</name>
<state>0</state>
</option>
<option>
<name>OCJlinkDevicePosition</name>
<state>0</state>
</option>
<option>
<name>OCJlinkOtherDeviceTypes</name>
<state>0</state>
</option>
<option>
<name>OCJlinkPreceedingIRBits</name>
<state>0</state>
</option>
<option>
<name>OCJlinkUseUSBSerialNo</name>
<state>0</state>
</option>
<option>
<name>OCJlinkUSBSerialNo</name>
<state></state>
</option>
<option>
<name>JLinkLogFile</name>
<state>$PROJ_DIR$\cspycomm.log</state>
</option>
<option>
<name>JLinkDoLogfile</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>SIMRX</name>
<archiveVersion>1</archiveVersion>
<data>
<version>1</version>
<wantNonLocal>1</wantNonLocal>
<debug>1</debug>
<option>
<name>SimMandatory</name>
<state>1</state>
</option>
<option>
<name>SimEnablePSP</name>
<state>0</state>
</option>
<option>
<name>SimPspOverrideConfig</name>
<state>0</state>
</option>
<option>
<name>SimPspConfigFile</name>
<state>$TOOLKIT_DIR$\CONFIG\iocf.psp.config</state>
</option>
</data>
</settings>
<debuggerPlugins>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB7_Plugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXRxPlugin.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file>
<loadFlag>1</loadFlag>
</plugin>
<plugin>
<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
</debuggerPlugins>
</configuration>
<configuration>
<name>Release</name>
<toolchain>
<name>RX</name>
</toolchain>
<debug>0</debug>
<settings>
<name>C-SPY</name>
<archiveVersion>3</archiveVersion>
<data>
<version>6</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>CMandatory</name>
<state>1</state>
</option>
<option>
<name>CInput</name>
<state>1</state>
</option>
<option>
<name>DebuggerProcessorVariant</name>
<state>0</state>
</option>
<option>
<name>CRunToEnable</name>
<state>1</state>
</option>
<option>
<name>CRunToName</name>
<state>main</state>
</option>
<option>
<name>CMacOverride</name>
<state>0</state>
</option>
<option>
<name>CMacFile</name>
<state></state>
</option>
<option>
<name>DynDriver</name>
<state>SIMRX</state>
</option>
<option>
<name>DDFOverride</name>
<state>0</state>
</option>
<option>
<name>DDFFile</name>
<state></state>
</option>
<option>
<name>DebuggerUseExtraOptions</name>
<state>0</state>
</option>
<option>
<name>DebuggerExtraOptions</name>
<state></state>
</option>
<option>
<name>ODebuggerByteOrder</name>
<state>0</state>
</option>
<option>
<name>ODebuggerDoubleSize</name>
<state>1</state>
</option>
<option>
<name>OCImagesSuppressCheck1</name>
<state>0</state>
</option>
<option>
<name>OCImagesPath1</name>
<state></state>
</option>
<option>
<name>OCImagesSuppressCheck2</name>
<state>0</state>
</option>
<option>
<name>OCImagesPath2</name>
<state></state>
</option>
<option>
<name>OCImagesSuppressCheck3</name>
<state>0</state>
</option>
<option>
<name>OCImagesPath3</name>
<state></state>
</option>
<option>
<name>ODebuggerCore</name>
<state>0</state>
</option>
<option>
<name>ODebuggerIntSize</name>
<state>1</state>
</option>
<option>
<name>OCImagesOffset1</name>
<state></state>
</option>
<option>
<name>OCImagesOffset2</name>
<state></state>
</option>
<option>
<name>OCImagesOffset3</name>
<state></state>
</option>
<option>
<name>OCImagesUse1</name>
<state>0</state>
</option>
<option>
<name>OCImagesUse2</name>
<state>0</state>
</option>
<option>
<name>OCImagesUse3</name>
<state>0</state>
</option>
<option>
<name>ODebuggerPatch</name>
<state>0</state>
</option>
<option>
<name>ODebuggerFpu</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>RXEMUE20</name>
<archiveVersion>4</archiveVersion>
<data>
<version>4</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>EmuMandatory</name>
<state>1</state>
</option>
<option>
<name>OCEmuUseUSBSerialNo</name>
<state>0</state>
</option>
<option>
<name>OCEmuUSBSerialNo</name>
<state></state>
</option>
<option>
<name>OCDownloadSuppressDownload</name>
<state>0</state>
</option>
<option>
<name>OCDownloadVerifyAll</name>
<state>0</state>
</option>
<option>
<name>OCDownloadAttach</name>
<state>0</state>
</option>
<option>
<name>OCDebuggingMode</name>
<state>0</state>
</option>
<option>
<name>OCExcecuteAfterFlash</name>
<state>0</state>
</option>
<option>
<name>OCDownloadOnlyChangedBlocks</name>
<state>0</state>
</option>
<option>
<name>E20LogFile</name>
<state>$PROJ_DIR$\cspycomm.log</state>
</option>
<option>
<name>E20DoLogfile</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>RXE2LITE</name>
<archiveVersion>1</archiveVersion>
<data>
<version>0</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>E2LiteMandatory</name>
<state>1</state>
</option>
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<name>E2LiteUseUSBSerialNo</name>
<state>0</state>
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<name>E2LiteUSBSerialNo</name>
<state></state>
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<name>E2LiteDownloadSuppressDownload</name>
<state>0</state>
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<option>
<name>E2LiteDownloadVerifyAll</name>
<state>0</state>
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<name>E2LiteDownloadAttach</name>
<state>0</state>
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<name>E2LiteDebuggingMode</name>
<state>0</state>
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<name>E2LiteDownloadExcecuteAfterFlash</name>
<state>0</state>
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<name>E2LiteDownloadOnlyChangedBlocks</name>
<state>0</state>
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<option>
<name>E2LiteLogFile</name>
<state>$PROJ_DIR$\cspycomm.log</state>
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<name>E2LiteDoLogfile</name>
<state>0</state>
</option>
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</settings>
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<name>RXJLINK</name>
<archiveVersion>4</archiveVersion>
<data>
<version>5</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>JlinkMandatory</name>
<state>1</state>
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<name>OCJlinkDownloadSuppressDownload</name>
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<name>OCJlinkDownloadVerifyAll</name>
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<name>OCJlinkExcecuteAfterFlash</name>
<state>0</state>
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<name>OCJlinkScanChainEnable</name>
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<name>OCJlinkDevicePosition</name>
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<name>OCJlinkOtherDeviceTypes</name>
<state>0</state>
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<name>OCJlinkPreceedingIRBits</name>
<state>0</state>
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<name>OCJlinkUseUSBSerialNo</name>
<state>0</state>
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<name>OCJlinkUSBSerialNo</name>
<state></state>
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<option>
<name>JLinkLogFile</name>
<state>$PROJ_DIR$\cspycomm.log</state>
</option>
<option>
<name>JLinkDoLogfile</name>
<state>0</state>
</option>
</data>
</settings>
<settings>
<name>SIMRX</name>
<archiveVersion>1</archiveVersion>
<data>
<version>1</version>
<wantNonLocal>1</wantNonLocal>
<debug>0</debug>
<option>
<name>SimMandatory</name>
<state>1</state>
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<option>
<name>SimEnablePSP</name>
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</option>
<option>
<name>SimPspOverrideConfig</name>
<state>0</state>
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<option>
<name>SimPspConfigFile</name>
<state>###Uninitialized###</state>
</option>
</data>
</settings>
<debuggerPlugins>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\Quadros\Quadros_EWB7_Plugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXRxPlugin.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
<loadFlag>0</loadFlag>
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<plugin>
<file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
<loadFlag>0</loadFlag>
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<plugin>
<file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
<loadFlag>1</loadFlag>
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<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
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<plugin>
<file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file>
<loadFlag>1</loadFlag>
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<plugin>
<file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
<loadFlag>0</loadFlag>
</plugin>
</debuggerPlugins>
</configuration>
</project>

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FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/RTOSDemo.ewp Normal file
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FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/RTOSDemo.eww Normal file
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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\RTOSDemo.ewp</path>
</project>
<batchBuild/>
</workspace>

0
FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/custom.bat Normal file
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FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/makefile.init Normal file
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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
PATH := $(PATH):C:\PROGRA~2\KPIT\GNURXV~1.01-\rx-elf\rx-elf\bin;C:\PROGRA~2\KPIT\GNURXV~1.01-\rx-elf\rx-elf\libexec\gcc\rx-elf\4.8-GNURX_v15.01

40
FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/settings/RTOSDemo.Debug.cspy.bat Normal file
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@ -0,0 +1,40 @@
@REM This batch file has been generated by the IAR Embedded Workbench
@REM C-SPY Debugger, as an aid to preparing a command line for running
@REM the cspybat command line utility using the appropriate settings.
@REM
@REM Note that this file is generated every time a new debug session
@REM is initialized, so you may want to move or rename the file before
@REM making changes.
@REM
@REM You can launch cspybat by typing the name of this batch file followed
@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
@REM
@REM Read about available command line parameters in the C-SPY Debugging
@REM Guide. Hints about additional command line parameters that may be
@REM useful in specific cases:
@REM --download_only Downloads a code image without starting a debug
@REM session afterwards.
@REM --silent Omits the sign-on message.
@REM --timeout Limits the maximum allowed execution time.
@REM
@echo off
if not "%1" == "" goto debugFile
@echo on
"C:\DevTools\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RX113-RSK_GCC_e2studio_IAR\settings\RTOSDemo.Debug.general.xcl" --backend -f "C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RX113-RSK_GCC_e2studio_IAR\settings\RTOSDemo.Debug.driver.xcl"
@echo off
goto end
:debugFile
@echo on
"C:\DevTools\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RX113-RSK_GCC_e2studio_IAR\settings\RTOSDemo.Debug.general.xcl" "--debug_file=%1" --backend -f "C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RX113-RSK_GCC_e2studio_IAR\settings\RTOSDemo.Debug.driver.xcl"
@echo off
:end

39
FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/settings/RTOSDemo.Debug.driver.xcl Normal file
View file

@ -0,0 +1,39 @@
-B
"-p"
"C:\DevTools\IAR Systems\Embedded Workbench 7.2\rx\config\debugger\ior5f51138.ddf"
"--endian"
"l"
"--double"
"64"
"--core"
"rxv1"
"--int"
"32"
"--no_fpu"
"-d"
"emue20"
"--drv_mode"
"debugging"
"--drv_communication"
"USB"

11
FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/settings/RTOSDemo.Debug.general.xcl Normal file
View file

@ -0,0 +1,11 @@
"C:\DevTools\IAR Systems\Embedded Workbench 7.2\rx\bin\rxproc.dll"
"C:\DevTools\IAR Systems\Embedded Workbench 7.2\rx\bin\rxe1e20.dll"
"C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RX113-RSK_GCC_e2studio_IAR\Debug\Exe\RTOSDemo.out"
--plugin "C:\DevTools\IAR Systems\Embedded Workbench 7.2\rx\bin\rxbat.dll"

244
FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/settings/RTOSDemo.dbgdt Normal file
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@ -0,0 +1,244 @@
<?xml version="1.0" encoding="iso-8859-1"?>
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<Register>
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</Desktop>
</Project>

250
FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/settings/RTOSDemo.dni Normal file
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@ -0,0 +1,250 @@
[DebugChecksum]
Checksum=-126027898
[CodeCoverage]
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[Stack]
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WarningThreshold=90
SpWarningsEnabled=1
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[CallStack]
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[Disassembly]
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[E1/E20]
BlockBits=15
B0=1,0
B1=1,1024
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StartEnabled=0
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77
FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/settings/RTOSDemo.wsdt Normal file
View file

@ -0,0 +1,77 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Workspace>
<ConfigDictionary>
<CurrentConfigs><Project>RTOSDemo/Debug</Project></CurrentConfigs></ConfigDictionary>
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<Static>
<Workspace>
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<Build>
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</Static>
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<Factory>Build</Factory>
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<Factory>Debug-Log</Factory>
<Session/>
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</Desktop>
</Workspace>

2
FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/settings/RTOSDemo.wspos Normal file
View file

@ -0,0 +1,2 @@
[MainWindow]
WindowPlacement=_ 519 0 1619 872 3

235
FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Blinky_Demo/main_blinky.c Normal file
View file

@ -0,0 +1,235 @@
/*
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/******************************************************************************
* NOTE 1: This project provides two demo applications. A simple blinky style
* project, and a more comprehensive test and demo application. The
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select
* between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY
* in main.c. This file implements the simply blinky style version.
*
* NOTE 2: This file only contains the source code that is specific to the
* basic demo. Generic functions, such FreeRTOS hook functions, and functions
* required to configure the hardware are defined in main.c.
******************************************************************************
*
* main_blinky() creates one queue, and two tasks. It then starts the
* scheduler.
*
* The Queue Send Task:
* The queue send task is implemented by the prvQueueSendTask() function in
* this file. prvQueueSendTask() sits in a loop that causes it to repeatedly
* block for 200 milliseconds, before sending the value 100 to the queue that
* was created within main_blinky(). Once the value is sent, the task loops
* back around to block for another 200 milliseconds...and so on.
*
* The Queue Receive Task:
* The queue receive task is implemented by the prvQueueReceiveTask() function
* in this file. prvQueueReceiveTask() sits in a loop where it repeatedly
* blocks on attempts to read data from the queue that was created within
* main_blinky(). When data is received, the task checks the value of the
* data, and if the value equals the expected 100, toggles an LED. The 'block
* time' parameter passed to the queue receive function specifies that the
* task should be held in the Blocked state indefinitely to wait for data to
* be available on the queue. The queue receive task will only leave the
* Blocked state when the queue send task writes to the queue. As the queue
* send task writes to the queue every 200 milliseconds, the queue receive
* task leaves the Blocked state every 200 milliseconds, and therefore toggles
* the LED every 200 milliseconds.
*/
/* Kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "semphr.h"
/* Renesas includes. */
#include <rskrx113def.h>
#include "r_cg_macrodriver.h"
#include "r_cg_userdefine.h"
/* Priorities at which the tasks are created. */
#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
/* The rate at which data is sent to the queue. The 200ms value is converted
to ticks using the portTICK_PERIOD_MS constant. */
#define mainQUEUE_SEND_FREQUENCY_MS ( 200 / portTICK_PERIOD_MS )
/* The number of items the queue can hold. This is 1 as the receive task
will remove items as they are added, meaning the send task should always find
the queue empty. */
#define mainQUEUE_LENGTH ( 1 )
/*-----------------------------------------------------------*/
/*
* Called by main when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1 in
* main.c.
*/
void main_blinky( void );
/*
* The tasks as described in the comments at the top of this file.
*/
static void prvQueueReceiveTask( void *pvParameters );
static void prvQueueSendTask( void *pvParameters );
/*-----------------------------------------------------------*/
/* The queue used by both tasks. */
static QueueHandle_t xQueue = NULL;
/*-----------------------------------------------------------*/
void main_blinky( void )
{
/* Create the queue. */
xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) );
if( xQueue != NULL )
{
/* Start the two tasks as described in the comments at the top of this
file. */
xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */
"Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */
configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */
NULL, /* The parameter passed to the task - not used in this case. */
mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */
NULL ); /* The task handle is not required, so NULL is passed. */
xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL );
/* Start the tasks and timer running. */
vTaskStartScheduler();
}
/* If all is well, the scheduler will now be running, and the following
line will never be reached. If the following line does execute, then
there was either insufficient FreeRTOS heap memory available for the idle
and/or timer tasks to be created, or vTaskStartScheduler() was called from
User mode. See the memory management section on the FreeRTOS web site for
more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The
mode from which main() is called is set in the C start up code and must be
a privileged mode (not user mode). */
for( ;; );
}
/*-----------------------------------------------------------*/
static void prvQueueSendTask( void *pvParameters )
{
TickType_t xNextWakeTime;
const unsigned long ulValueToSend = 100UL;
/* Remove compiler warning about unused parameter. */
( void ) pvParameters;
/* Initialise xNextWakeTime - this only needs to be done once. */
xNextWakeTime = xTaskGetTickCount();
for( ;; )
{
/* Place this task in the blocked state until it is time to run again. */
vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );
/* Send to the queue - causing the queue receive task to unblock and
toggle the LED. 0 is used as the block time so the sending operation
will not block - it shouldn't need to block as the queue should always
be empty at this point in the code. */
xQueueSend( xQueue, &ulValueToSend, 0U );
}
}
/*-----------------------------------------------------------*/
static void prvQueueReceiveTask( void *pvParameters )
{
unsigned long ulReceivedValue;
const unsigned long ulExpectedValue = 100UL;
/* Remove compiler warning about unused parameter. */
( void ) pvParameters;
for( ;; )
{
/* Wait until something arrives in the queue - this task will block
indefinitely provided INCLUDE_vTaskSuspend is set to 1 in
FreeRTOSConfig.h. */
xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
/* To get here something must have been received from the queue, but
is it the expected value? If it is, toggle the LED. */
if( ulReceivedValue == ulExpectedValue )
{
LED0 = !LED0;
ulReceivedValue = 0U;
}
}
}
/*-----------------------------------------------------------*/

167
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/*
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
#ifdef __ICCRX__
#include <iorx113.h>
#include <machine.h>
#endif
#ifdef __GNUC__
#include "iodefine.h"
#endif
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 1
#define configCPU_CLOCK_HZ ( 32000000 ) /* Set in mcu_info.h. */
#define configPERIPHERAL_CLOCK_HZ ( 32000000 ) /* Set in muc_info.h. */
#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 125 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 45 * 1024 ) )
#define configMAX_TASK_NAME_LEN ( 12 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_CO_ROUTINES 0
#define configUSE_MUTEXES 1
#define configGENERATE_RUN_TIME_STATS 0
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configUSE_RECURSIVE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 0
#define configUSE_MALLOC_FAILED_HOOK 0
#define configUSE_APPLICATION_TASK_TAG 0
#define configUSE_COUNTING_SEMAPHORES 1
#define configMAX_PRIORITIES ( 7 )
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Software timer definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
#define configTIMER_QUEUE_LENGTH 5
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE )
/* The interrupt priority used by the kernel itself for the tick interrupt and
the pended interrupt. This would normally be the lowest priority. */
#define configKERNEL_INTERRUPT_PRIORITY 1
/* The maximum interrupt priority from which FreeRTOS API calls can be made.
Interrupts that use a priority above this will not be effected by anything the
kernel is doing. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define INCLUDE_xTaskGetSchedulerState 1
#define INCLUDE_eTaskGetState 1
#define INCLUDE_xTimerPendFunctionCall 1
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
/* The configPRE_SLEEP_PROCESSING() and configPOST_SLEEP_PROCESSING() macros
allow the application writer to add additional code before and after the MCU is
placed into the low power state respectively. The implementations provided in
this demo can be extended to save even more power - for example the analog
input used by the low power demo could be switched off in the pre-sleep macro
and back on again in the post sleep macro. */
void vPreSleepProcessing( unsigned long xExpectedIdleTime );
void vPostSleepProcessing( unsigned long xExpectedIdleTime );
#define configPRE_SLEEP_PROCESSING( xExpectedIdleTime ) vPreSleepProcessing( xExpectedIdleTime );
#define configPOST_SLEEP_PROCESSING( xExpectedIdleTime ) vPostSleepProcessing( xExpectedIdleTime );
/* configTICK_VECTOR must be set to the interrupt vector used by the peripheral
that generates the tick interrupt. */
#define configTICK_VECTOR VECT_CMT0_CMI0
#endif /* FREERTOS_CONFIG_H */

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/*
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/*
* This file contains the non-portable and therefore RX62N specific parts of
* the IntQueue standard demo task - namely the configuration of the timers
* that generate the interrupts and the interrupt entry points.
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo includes. */
#include "IntQueueTimer.h"
#include "IntQueue.h"
#define tmrTIMER_0_1_FREQUENCY ( 2000UL )
#define tmrTIMER_2_3_FREQUENCY ( 2111UL )
void vInitialiseTimerForIntQueueTest( void )
{
/* Ensure interrupts do not start until full configuration is complete. */
portENTER_CRITICAL();
{
/* Give write access. */
SYSTEM.PRCR.WORD = 0xa502;
/* Cascade two 8bit timer channels to generate the interrupts.
8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are
utilised for this test. */
/* Enable the timers. */
SYSTEM.MSTPCRA.BIT.MSTPA5 = 0;
SYSTEM.MSTPCRA.BIT.MSTPA4 = 0;
/* Enable compare match A interrupt request. */
TMR0.TCR.BIT.CMIEA = 1;
TMR2.TCR.BIT.CMIEA = 1;
/* Clear the timer on compare match A. */
TMR0.TCR.BIT.CCLR = 1;
TMR2.TCR.BIT.CCLR = 1;
/* Set the compare match value. */
TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
/* 16 bit operation ( count from timer 1,2 ). */
TMR0.TCCR.BIT.CSS = 3;
TMR2.TCCR.BIT.CSS = 3;
/* Use PCLK as the input. */
TMR1.TCCR.BIT.CSS = 1;
TMR3.TCCR.BIT.CSS = 1;
/* Divide PCLK by 8. */
TMR1.TCCR.BIT.CKS = 2;
TMR3.TCCR.BIT.CKS = 2;
/* Enable TMR 0, 2 interrupts. */
TMR0.TCR.BIT.CMIEA = 1;
TMR2.TCR.BIT.CMIEA = 1;
/* Set interrupt priority and enable. */
IPR( TMR0, CMIA0 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1;
IR( TMR0, CMIA0 ) = 0U;
IEN( TMR0, CMIA0 ) = 1U;
/* Do the same for TMR2, but to vector 129. */
IPR( TMR2, CMIA2 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 2;
IR( TMR2, CMIA2 ) = 0U;
IEN( TMR2, CMIA2 ) = 1U;
}
portEXIT_CRITICAL();
}
/*-----------------------------------------------------------*/
#ifdef __GNUC__
void vIntQTimerISR0( void ) __attribute__ ((interrupt));
void vIntQTimerISR1( void ) __attribute__ ((interrupt));
void vIntQTimerISR0( void )
{
/* Enable interrupts to allow interrupt nesting. */
__asm volatile( "setpsw i" );
portYIELD_FROM_ISR( xFirstTimerHandler() );
}
/*-----------------------------------------------------------*/
void vIntQTimerISR1( void )
{
/* Enable interrupts to allow interrupt nesting. */
__asm volatile( "setpsw i" );
portYIELD_FROM_ISR( xSecondTimerHandler() );
}
#endif /* __GNUC__ */
#ifdef __ICCRX__
#pragma vector = VECT_TMR0_CMIA0
__interrupt void vT0_1InterruptHandler( void )
{
__enable_interrupt();
portYIELD_FROM_ISR( xFirstTimerHandler() );
}
/*-----------------------------------------------------------*/
#pragma vector = VECT_TMR2_CMIA2
__interrupt void vT2_3InterruptHandler( void )
{
__enable_interrupt();
portYIELD_FROM_ISR( xSecondTimerHandler() );
}
#endif /* __ICCRX__ */

78
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/*
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef INT_QUEUE_TIMER_H
#define INT_QUEUE_TIMER_H
void vInitialiseTimerForIntQueueTest( void );
portBASE_TYPE xTimer0Handler( void );
portBASE_TYPE xTimer1Handler( void );
#endif

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;/*
; FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
; All rights reserved
;
; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
;
; ***************************************************************************
; * *
; * FreeRTOS provides completely free yet professionally developed, *
; * robust, strictly quality controlled, supported, and cross *
; * platform software that has become a de facto standard. *
; * *
; * Help yourself get started quickly and support the FreeRTOS *
; * project by purchasing a FreeRTOS tutorial book, reference *
; * manual, or both from: http://www.FreeRTOS.org/Documentation *
; * *
; * Thank you! *
; * *
; ***************************************************************************
;
; This file is part of the FreeRTOS distribution.
;
; FreeRTOS is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License (version 2) as published by the
; Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
;
; >>! NOTE: The modification to the GPL is included to allow you to distribute
; >>! a combined work that includes FreeRTOS without being obliged to provide
; >>! the source code for proprietary components outside of the FreeRTOS
; >>! kernel.
;
; FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
; FOR A PARTICULAR PURPOSE. Full license text is available from the following
; link: http://www.freertos.org/a00114.html
;
; 1 tab == 4 spaces!
;
; ***************************************************************************
; * *
; * Having a problem? Start by reading the FAQ "My application does *
; * not run, what could be wrong?" *
; * *
; * http://www.FreeRTOS.org/FAQHelp.html *
; * *
; ***************************************************************************
;
; http://www.FreeRTOS.org - Documentation, books, training, latest versions,
; license and Real Time Engineers Ltd. contact details.;
;
; http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
; including FreeRTOS+Trace - an indispensable productivity tool, a DOS
; compatible FAT file system, and our tiny thread aware UDP/IP stack.
;
; http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
; Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
; licenses offer ticketed support, indemnification and middleware.
;
; http://www.SafeRTOS.com - High Integrity Systems also provide a safety
; engineered and independently SIL3 certified version for use in safety and
; mission critical applications that require provable dependability.
;
; 1 tab == 4 spaces!
;*/
.global _vRegTest1Implementation
.global _vRegTest2Implementation
.extern _ulRegTest1LoopCounter
.extern _ulRegTest2LoopCounter
.text
;/* This function is explained in the comments at the top of main.c. */
_vRegTest1Implementation:
; Put a known value in each register.
MOV.L #1, R1
MOV.L #2, R2
MOV.L #3, R3
MOV.L #4, R4
MOV.L #5, R5
MOV.L #6, R6
MOV.L #7, R7
MOV.L #8, R8
MOV.L #9, R9
MOV.L #10, R10
MOV.L #11, R11
MOV.L #12, R12
MOV.L #13, R13
MOV.L #14, R14
MOV.L #15, R15
; Loop, checking each itteration that each register still contains the
; expected value.
TestLoop1:
; Push the registers that are going to get clobbered.
PUSHM R14-R15
; Increment the loop counter to show this task is still getting CPU time.
MOV.L #_ulRegTest1LoopCounter, R14
MOV.L [ R14 ], R15
ADD #1, R15
MOV.L R15, [ R14 ]
; Yield to extend the text coverage. Set the bit in the ITU SWINTR register.
MOV.L #1, R14
MOV.L #0872E0H, R15
MOV.B R14, [R15]
NOP
NOP
; Restore the clobbered registers.
POPM R14-R15
; Now compare each register to ensure it still contains the value that was
; set before this loop was entered.
CMP #1, R1
BNE RegTest1Error
CMP #2, R2
BNE RegTest1Error
CMP #3, R3
BNE RegTest1Error
CMP #4, R4
BNE RegTest1Error
CMP #5, R5
BNE RegTest1Error
CMP #6, R6
BNE RegTest1Error
CMP #7, R7
BNE RegTest1Error
CMP #8, R8
BNE RegTest1Error
CMP #9, R9
BNE RegTest1Error
CMP #10, R10
BNE RegTest1Error
CMP #11, R11
BNE RegTest1Error
CMP #12, R12
BNE RegTest1Error
CMP #13, R13
BNE RegTest1Error
CMP #14, R14
BNE RegTest1Error
CMP #15, R15
BNE RegTest1Error
; All comparisons passed, start a new itteratio of this loop.
BRA TestLoop1
RegTest1Error:
; A compare failed, just loop here so the loop counter stops incrementing
; causing the check task to indicate the error.
BRA RegTest1Error
;/*-----------------------------------------------------------*/
;/* This function is explained in the comments at the top of main.c. */
_vRegTest2Implementation:
; Put a known value in each register.
MOV.L #10, R1
MOV.L #20, R2
MOV.L #30, R3
MOV.L #40, R4
MOV.L #50, R5
MOV.L #60, R6
MOV.L #70, R7
MOV.L #80, R8
MOV.L #90, R9
MOV.L #100, R10
MOV.L #110, R11
MOV.L #120, R12
MOV.L #130, R13
MOV.L #140, R14
MOV.L #150, R15
; Loop, checking on each itteration that each register still contains the
; expected value.
TestLoop2:
; Push the registers that are going to get clobbered.
PUSHM R14-R15
; Increment the loop counter to show this task is still getting CPU time.
MOV.L #_ulRegTest2LoopCounter, R14
MOV.L [ R14 ], R15
ADD #1, R15
MOV.L R15, [ R14 ]
; Restore the clobbered registers.
POPM R14-R15
CMP #10, R1
BNE RegTest2Error
CMP #20, R2
BNE RegTest2Error
CMP #30, R3
BNE RegTest2Error
CMP #40, R4
BNE RegTest2Error
CMP #50, R5
BNE RegTest2Error
CMP #60, R6
BNE RegTest2Error
CMP #70, R7
BNE RegTest2Error
CMP #80, R8
BNE RegTest2Error
CMP #90, R9
BNE RegTest2Error
CMP #100, R10
BNE RegTest2Error
CMP #110, R11
BNE RegTest2Error
CMP #120, R12
BNE RegTest2Error
CMP #130, R13
BNE RegTest2Error
CMP #140, R14
BNE RegTest2Error
CMP #150, R15
BNE RegTest2Error
; All comparisons passed, start a new itteratio of this loop.
BRA TestLoop2
RegTest2Error:
; A compare failed, just loop here so the loop counter stops incrementing
; - causing the check task to indicate the error.
BRA RegTest2Error
.END

269
FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/RegTest_IAR.s Normal file
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@ -0,0 +1,269 @@
/*
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
PUBLIC _vRegTest1Implementation
PUBLIC _vRegTest2Implementation
EXTERN _ulRegTest1CycleCount
EXTERN _ulRegTest2CycleCount
RSEG CODE:CODE(4)
_vRegTest1Implementation:
/* Set each register to a known value. */
MOV.L #0x33333333, R15
MVTACHI R15
MOV.L #0x44444444, R15
MVTACLO R15
MOV.L #1, R1
MOV.L #2, R2
MOV.L #3, R3
MOV.L #4, R4
MOV.L #5, R5
MOV.L #6, R6
MOV.L #7, R7
MOV.L #8, R8
MOV.L #9, R9
MOV.L #10, R10
MOV.L #11, R11
MOV.L #12, R12
MOV.L #13, R13
MOV.L #14, R14
MOV.L #15, R15
/* Loop, checking each iteration that each register still contains the
expected value. */
TestLoop1:
/* Push the registers that are going to get clobbered. */
PUSHM R14-R15
/* Increment the loop counter to show this task is still getting CPU
time. */
MOV.L #_ulRegTest1CycleCount, R14
MOV.L [ R14 ], R15
ADD #1, R15
MOV.L R15, [ R14 ]
/* Yield to extend the text coverage. Set the bit in the ITU SWINTR
register. */
MOV.L #1, R14
MOV.L #0872E0H, R15
MOV.B R14, [R15]
NOP
NOP
/* Check the accumulator value. */
MVFACHI R15
CMP #0x33333333, R15
BNE RegTest2Error
MVFACMI R15
CMP #0x33334444, R15
BNE RegTest2Error
/* Restore the clobbered registers. */
POPM R14-R15
/* Now compare each register to ensure it still contains the value that
was set before this loop was entered. */
CMP #1, R1
BNE RegTest1Error
CMP #2, R2
BNE RegTest1Error
CMP #3, R3
BNE RegTest1Error
CMP #4, R4
BNE RegTest1Error
CMP #5, R5
BNE RegTest1Error
CMP #6, R6
BNE RegTest1Error
CMP #7, R7
BNE RegTest1Error
CMP #8, R8
BNE RegTest1Error
CMP #9, R9
BNE RegTest1Error
CMP #10, R10
BNE RegTest1Error
CMP #11, R11
BNE RegTest1Error
CMP #12, R12
BNE RegTest1Error
CMP #13, R13
BNE RegTest1Error
CMP #14, R14
BNE RegTest1Error
CMP #15, R15
BNE RegTest1Error
/* All comparisons passed, start a new iteration of this loop. */
BRA TestLoop1
/* A compare failed, just loop here so the loop counter stops
incrementing causing the check timer to indicate the error. */
RegTest1Error:
BRA RegTest1Error
/*-----------------------------------------------------------*/
_vRegTest2Implementation:
/* Set each register to a known value. */
MOV.L #0x11111111, R15
MVTACHI R15
MOV.L #0x22222222, R15
MVTACLO R15
MOV.L #100, R1
MOV.L #200, R2
MOV.L #300, R3
MOV.L #400, R4
MOV.L #500, R5
MOV.L #600, R6
MOV.L #700, R7
MOV.L #800, R8
MOV.L #900, R9
MOV.L #1000, R10
MOV.L #1001, R11
MOV.L #1002, R12
MOV.L #1003, R13
MOV.L #1004, R14
MOV.L #1005, R15
/* Loop, checking each iteration that each register still contains the
expected value. */
TestLoop2:
/* Push the registers that are going to get clobbered. */
PUSHM R14-R15
/* Increment the loop counter to show this task is still getting CPU
time. */
MOV.L #_ulRegTest2CycleCount, R14
MOV.L [ R14 ], R15
ADD #1, R15
MOV.L R15, [ R14 ]
/* Check the accumulator value. */
MVFACHI R15
CMP #0x11111111, R15
BNE RegTest2Error
MVFACMI R15
CMP #0x11112222, R15
BNE RegTest2Error
/* Restore the clobbered registers. */
POPM R14-R15
/* Now compare each register to ensure it still contains the value that
was set before this loop was entered. */
CMP #100, R1
BNE RegTest2Error
CMP #200, R2
BNE RegTest2Error
CMP #300, R3
BNE RegTest2Error
CMP #400, R4
BNE RegTest2Error
CMP #500, R5
BNE RegTest2Error
CMP #600, R6
BNE RegTest2Error
CMP #700, R7
BNE RegTest2Error
CMP #800, R8
BNE RegTest2Error
CMP #900, R9
BNE RegTest2Error
CMP #1000, R10
BNE RegTest2Error
CMP #1001, R11
BNE RegTest2Error
CMP #1002, R12
BNE RegTest2Error
CMP #1003, R13
BNE RegTest2Error
CMP #1004, R14
BNE RegTest2Error
CMP #1005, R15
BNE RegTest2Error
/* All comparisons passed, start a new iteration of this loop. */
BRA TestLoop2
/* A compare failed, just loop here so the loop counter stops
incrementing causing the check timer to indicate the error. */
RegTest2Error:
BRA RegTest2Error
/*-----------------------------------------------------------*/
END

505
FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Full_Demo/main_full.c Normal file
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@ -0,0 +1,505 @@
/*
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/******************************************************************************
* NOTE 1: This project provides two demo applications. A simple blinky
* style project, and a more comprehensive test and demo application. The
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to
* select between the two. See the notes on using
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY in main.c. This file implements the
* comprehensive version.
*
* NOTE 2: This file only contains the source code that is specific to the
* full demo. Generic functions, such FreeRTOS hook functions, and functions
* required to configure the hardware, are defined in main.c.
*
******************************************************************************
*
* main_full() creates all the demo application tasks and software timers, then
* starts the scheduler. The web documentation provides more details of the
* standard demo application tasks, which provide no particular functionality,
* but do provide a good example of how to use the FreeRTOS API.
*
* In addition to the standard demo tasks, the following tasks and tests are
* defined and/or created within this file:
*
* "Reg test" tasks - These fill both the core and floating point registers with
* known values, then check that each register maintains its expected value for
* the lifetime of the task. Each task uses a different set of values. The reg
* test tasks execute with a very low priority, so get preempted very
* frequently. A register containing an unexpected value is indicative of an
* error in the context switching mechanism.
*
* "Check" task - The check task period is initially set to three seconds. The
* task checks that all the standard demo tasks, and the register check tasks,
* are not only still executing, but are executing without reporting any errors.
* If the check task discovers that a task has either stalled, or reported an
* error, then it changes its own execution period from the initial three
* seconds, to just 200ms. The check task also toggles an LED each time it is
* called. This provides a visual indication of the system status: If the LED
* toggles every three seconds, then no issues have been discovered. If the LED
* toggles every 200ms, then an issue has been discovered with at least one
* task.
*/
/* Standard includes. */
#include <stdio.h>
/* Kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "timers.h"
#include "semphr.h"
/* Standard demo application includes. */
#include "flop.h"
#include "semtest.h"
#include "dynamic.h"
#include "BlockQ.h"
#include "blocktim.h"
#include "countsem.h"
#include "GenQTest.h"
#include "recmutex.h"
#include "death.h"
#include "partest.h"
#include "comtest2.h"
#include "serial.h"
#include "TimerDemo.h"
#include "QueueOverwrite.h"
#include "IntQueue.h"
#include "EventGroupsDemo.h"
#include "TaskNotify.h"
#include "IntSemTest.h"
/* Renesas includes. */
#include <rskrx113def.h>
#include "r_cg_macrodriver.h"
#include "r_cg_userdefine.h"
/* Priorities for the demo application tasks. */
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )
#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )
#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )
#define mainUART_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3UL )
#define mainCOM_TEST_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY )
/* The priority used by the UART command console task. */
#define mainUART_COMMAND_CONSOLE_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )
/* A block time of zero simply means "don't block". */
#define mainDONT_BLOCK ( 0UL )
/* The period after which the check timer will expire, in ms, provided no errors
have been reported by any of the standard demo tasks. ms are converted to the
equivalent in ticks using the portTICK_PERIOD_MS constant. */
#define mainNO_ERROR_CHECK_TASK_PERIOD ( 3000UL / portTICK_PERIOD_MS )
/* The period at which the check timer will expire, in ms, if an error has been
reported in one of the standard demo tasks. ms are converted to the equivalent
in ticks using the portTICK_PERIOD_MS constant. */
#define mainERROR_CHECK_TASK_PERIOD ( 200UL / portTICK_PERIOD_MS )
/* Parameters that are passed into the register check tasks solely for the
purpose of ensuring parameters are passed into tasks correctly. */
#define mainREG_TEST_1_PARAMETER ( ( void * ) 0x12121212UL )
#define mainREG_TEST_2_PARAMETER ( ( void * ) 0x12345678UL )
/* The base period used by the timer test tasks. */
#define mainTIMER_TEST_PERIOD ( 50 )
/*-----------------------------------------------------------*/
/*
* Entry point for the comprehensive demo (as opposed to the simple blinky
* demo).
*/
void main_full( void );
/*
* The full demo includes some functionality called from the tick hook.
*/
void vFullDemoTickHook( void );
/*
* The check task, as described at the top of this file.
*/
static void prvCheckTask( void *pvParameters );
/*
* Register check tasks, and the tasks used to write over and check the contents
* of the registers, as described at the top of this file. The nature of these
* files necessitates that they are written in assembly, but the entry points
* are kept in the C file for the convenience of checking the task parameter.
*/
static void prvRegTest1Task( void *pvParameters );
static void prvRegTest2Task( void *pvParameters );
void vRegTest1Implementation( void );
void vRegTest2Implementation( void );
/*
* A high priority task that does nothing other than execute at a pseudo random
* time to ensure the other test tasks don't just execute in a repeating
* pattern.
*/
static void prvPseudoRandomiser( void *pvParameters );
/*-----------------------------------------------------------*/
/* The following two variables are used to communicate the status of the
register check tasks to the check task. If the variables keep incrementing,
then the register check tasks have not discovered any errors. If a variable
stops incrementing, then an error has been found. */
volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;
/* String for display in the web server. It is set to an error message if the
check task detects an error. */
const char *pcStatusMessage = "All tasks running without error";
/*-----------------------------------------------------------*/
void main_full( void )
{
/* Start all the other standard demo/test tasks. They have no particular
functionality, but do demonstrate how to use the FreeRTOS API and test the
kernel port. */
vStartInterruptQueueTasks();
vStartDynamicPriorityTasks();
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
vCreateBlockTimeTasks();
vStartCountingSemaphoreTasks();
vStartGenericQueueTasks( tskIDLE_PRIORITY );
vStartRecursiveMutexTasks();
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
//_RB_ vStartMathTasks( mainFLOP_TASK_PRIORITY );
vStartTimerDemoTask( mainTIMER_TEST_PERIOD );
vStartQueueOverwriteTask( mainQUEUE_OVERWRITE_PRIORITY );
vStartEventGroupTasks();
vStartTaskNotifyTask();
vStartInterruptSemaphoreTasks();
/* Create the register check tasks, as described at the top of this file */
xTaskCreate( prvRegTest1Task, "RegTst1", configMINIMAL_STACK_SIZE, mainREG_TEST_1_PARAMETER, tskIDLE_PRIORITY, NULL );
xTaskCreate( prvRegTest2Task, "RegTst2", configMINIMAL_STACK_SIZE, mainREG_TEST_2_PARAMETER, tskIDLE_PRIORITY, NULL );
/* Create the task that just adds a little random behaviour. */
xTaskCreate( prvPseudoRandomiser, "Rnd", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );
/* Create the task that performs the 'check' functionality, as described at
the top of this file. */
xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
/* The set of tasks created by the following function call have to be
created last as they keep account of the number of tasks they expect to see
running. */
vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );
/* Start the scheduler. */
vTaskStartScheduler();
/* If all is well, the scheduler will now be running, and the following
line will never be reached. If the following line does execute, then
there was either insufficient FreeRTOS heap memory available for the idle
and/or timer tasks to be created, or vTaskStartScheduler() was called from
User mode. See the memory management section on the FreeRTOS web site for
more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The
mode from which main() is called is set in the C start up code and must be
a privileged mode (not user mode). */
for( ;; );
}
/*-----------------------------------------------------------*/
static void prvCheckTask( void *pvParameters )
{
TickType_t xDelayPeriod = mainNO_ERROR_CHECK_TASK_PERIOD;
TickType_t xLastExecutionTime;
static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;
unsigned long ulErrorFound = pdFALSE;
/* Just to stop compiler warnings. */
( void ) pvParameters;
/* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()
works correctly. */
xLastExecutionTime = xTaskGetTickCount();
/* Cycle for ever, delaying then checking all the other tasks are still
operating without error. The onboard LED is toggled on each iteration.
If an error is detected then the delay period is decreased from
mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD. This has the
effect of increasing the rate at which the onboard LED toggles, and in so
doing gives visual feedback of the system status. */
for( ;; )
{
/* Delay until it is time to execute again. */
vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod );
/* Check all the demo tasks (other than the flash tasks) to ensure
that they are all still running, and that none have detected an error. */
if( xAreIntQueueTasksStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 0UL;
}
#ifdef _RB_
if( xAreMathsTaskStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 1UL;
}
#endif
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 2UL;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 3UL;
}
if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 4UL;
}
if ( xAreGenericQueueTasksStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 5UL;
}
if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 6UL;
}
if( xIsCreateTaskStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 7UL;
}
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 8UL;
}
if( xAreTimerDemoTasksStillRunning( ( TickType_t ) mainNO_ERROR_CHECK_TASK_PERIOD ) != pdPASS )
{
ulErrorFound |= 1UL << 9UL;
}
if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 10UL;
}
if( xIsQueueOverwriteTaskStillRunning() != pdPASS )
{
ulErrorFound |= 1UL << 11UL;
}
if( xAreEventGroupTasksStillRunning() != pdPASS )
{
ulErrorFound |= 1UL << 12UL;
}
if( xAreTaskNotificationTasksStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 13UL;
}
if( xAreInterruptSemaphoreTasksStillRunning() != pdTRUE )
{
ulErrorFound |= 1UL << 14UL;
}
/* Check that the register test 1 task is still running. */
if( ulLastRegTest1Value == ulRegTest1LoopCounter )
{
ulErrorFound |= 1UL << 15UL;
}
ulLastRegTest1Value = ulRegTest1LoopCounter;
/* Check that the register test 2 task is still running. */
if( ulLastRegTest2Value == ulRegTest2LoopCounter )
{
ulErrorFound |= 1UL << 16UL;
}
ulLastRegTest2Value = ulRegTest2LoopCounter;
/* Toggle the check LED to give an indication of the system status. If
the LED toggles every mainNO_ERROR_CHECK_TASK_PERIOD milliseconds then
everything is ok. A faster toggle indicates an error. */
LED0 = !LED0;
if( ulErrorFound != pdFALSE )
{
/* An error has been detected in one of the tasks - flash the LED
at a higher frequency to give visible feedback that something has
gone wrong (it might just be that the loop back connector required
by the comtest tasks has not been fitted). */
xDelayPeriod = mainERROR_CHECK_TASK_PERIOD;
pcStatusMessage = "Error found in at least one task.";
}
}
}
/*-----------------------------------------------------------*/
static void prvPseudoRandomiser( void *pvParameters )
{
const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL, ulMinDelay = ( 35 / portTICK_PERIOD_MS );
volatile uint32_t ulNextRand = ( uint32_t ) &pvParameters, ulValue;
/* This task does nothing other than ensure there is a little bit of
disruption in the scheduling pattern of the other tasks. Normally this is
done by generating interrupts at pseudo random times. */
for( ;; )
{
ulNextRand = ( ulMultiplier * ulNextRand ) + ulIncrement;
ulValue = ( ulNextRand >> 16UL ) & 0xffUL;
if( ulValue < ulMinDelay )
{
ulValue = ulMinDelay;
}
vTaskDelay( ulValue );
while( ulValue > 0 )
{
__asm volatile( "NOP" );
__asm volatile( "NOP" );
__asm volatile( "NOP" );
__asm volatile( "NOP" );
__asm volatile( "NOP" );
__asm volatile( "NOP" );
__asm volatile( "NOP" );
ulValue--;
}
}
}
/*-----------------------------------------------------------*/
void vFullDemoTickHook( void )
{
/* The full demo includes a software timer demo/test that requires
prodding periodically from the tick interrupt. */
vTimerPeriodicISRTests();
/* Call the periodic queue overwrite from ISR demo. */
vQueueOverwritePeriodicISRDemo();
/* Call the periodic event group from ISR demo. */
vPeriodicEventGroupsProcessing();
/* Use task notifications from an interrupt. */
xNotifyTaskFromISR();
/* Use mutexes from interrupts. */
vInterruptSemaphorePeriodicTest();
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
static void prvRegTest1Task( void *pvParameters )
{
if( pvParameters != mainREG_TEST_1_PARAMETER )
{
/* The parameter did not contain the expected value. */
for( ;; )
{
/* Stop the tick interrupt so its obvious something has gone wrong. */
taskDISABLE_INTERRUPTS();
}
}
/* This is an inline asm function that never returns. */
vRegTest1Implementation();
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
static void prvRegTest2Task( void *pvParameters )
{
if( pvParameters != mainREG_TEST_2_PARAMETER )
{
/* The parameter did not contain the expected value. */
for( ;; )
{
/* Stop the tick interrupt so its obvious something has gone wrong. */
taskDISABLE_INTERRUPTS();
}
}
/* This is an inline asm function that never returns. */
vRegTest2Implementation();
}
/*-----------------------------------------------------------*/

86
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/*
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef PRIORITY_DEFINITIONS_H
#define PRIORITY_DEFINITIONS_H
#ifndef __IASMRX__
#error This file is only intended to be included from the FreeRTOS IAR port layer assembly file.
#endif
/* The interrupt priority used by the kernel itself for the tick interrupt and
the pended interrupt. This would normally be the lowest priority. */
#define configKERNEL_INTERRUPT_PRIORITY 1
/* The maximum interrupt priority from which FreeRTOS API calls can be made.
Interrupts that use a priority above this will not be effected by anything the
kernel is doing. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
#endif /* PRIORITY_DEFINITIONS_H */

418
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/***************************************************************/
/* */
/* PROJECT NAME : RTOSDemo */
/* FILE : interrupt_handlers.c */
/* DESCRIPTION : Interrupt Handler */
/* CPU SERIES : RX100 */
/* CPU TYPE : RX113 */
/* */
/* This file is generated by e2 studio. */
/* */
/***************************************************************/
/************************************************************************/
/* File Version: V1.1A */
/* History : 1.00 (2013-11-18) [Hardware Manual Revision : 0.40] */
/* : 1.10 (2014-02-26) [Hardware Manual Revision : 0.50] */
/* : 1.1A (2015-04-20) [Hardware Manual Revision : 1.02] */
/* Date Generated: 25/05/2015 */
/************************************************************************/
#include "interrupt_handlers.h"
// INT_Exception(Supervisor Instruction)
void INT_Excep_SuperVisorInst(void){/* brk(){ } */}
// INT_Exception(Undefined Instruction)
void INT_Excep_UndefinedInst(void){/* brk(){ } */}
// NMI
void INT_NonMaskableInterrupt(void){/* brk(){ } */}
// Dummy
void INT_Dummy(void){/* brk(){ } */}
// BRK
void INT_Excep_BRK(void){/* wait();*/ }
// BSC BUSERR
void INT_Excep_BSC_BUSERR(void){ }
// FCU FRDYI
void INT_Excep_FCU_FRDYI(void){ }
// ICU SWINT
void INT_Excep_ICU_SWINT(void){ }
// CMT0 CMI0
void INT_Excep_CMT0_CMI0(void){ }
// CMT1 CMI1
void INT_Excep_CMT1_CMI1(void){ }
// CMT2 CMI2
void INT_Excep_CMT2_CMI2(void){ }
// CMT3 CMI3
void INT_Excep_CMT3_CMI3(void){ }
// CAC FERRF
void INT_Excep_CAC_FERRF(void){ }
// CAC MENDF
void INT_Excep_CAC_MENDF(void){ }
// CAC OVFF
void INT_Excep_CAC_OVFF(void){ }
// USB0 D0FIFO0
void INT_Excep_USB0_D0FIFO0(void){ }
// USB0 D1FIFO0
void INT_Excep_USB0_D1FIFO0(void){ }
// USB0 USBI0
void INT_Excep_USB0_USBI0(void){ }
// RSPI0 SPEI0
void INT_Excep_RSPI0_SPEI0(void){ }
// RSPI0 SPRI0
void INT_Excep_RSPI0_SPRI0(void){ }
// RSPI0 SPTI0
void INT_Excep_RSPI0_SPTI0(void){ }
// RSPI0 SPII0
void INT_Excep_RSPI0_SPII0(void){ }
// DOC DOPCF
void INT_Excep_DOC_DOPCF(void){ }
// CMPB CMPB0
void INT_Excep_CMPB_CMPB0(void){ }
// CMPB CMPB1
void INT_Excep_CMPB_CMPB1(void){ }
// CTSU CTSUWR
void INT_Excep_CTSU_CTSUWR(void){ }
// CTSU CTSURD
void INT_Excep_CTSU_CTSURD(void){ }
// CTSU CTSUFN
void INT_Excep_CTSU_CTSUFN(void){ }
// RTC CUP
void INT_Excep_RTC_CUP(void){ }
// ICU IRQ0
void INT_Excep_ICU_IRQ0(void){ }
// ICU IRQ1
void INT_Excep_ICU_IRQ1(void){ }
// ICU IRQ2
void INT_Excep_ICU_IRQ2(void){ }
// ICU IRQ3
void INT_Excep_ICU_IRQ3(void){ }
// ICU IRQ4
void INT_Excep_ICU_IRQ4(void){ }
// ICU IRQ5
void INT_Excep_ICU_IRQ5(void){ }
// ICU IRQ6
void INT_Excep_ICU_IRQ6(void){ }
// ICU IRQ7
void INT_Excep_ICU_IRQ7(void){ }
// ELC ELSR8I
void INT_Excep_ELC_ELSR8I(void){ }
// LVD LVD1
void INT_Excep_LVD_LVD1(void){ }
// LVD LVD2
void INT_Excep_LVD_LVD2(void){ }
// USB0 USBR0
void INT_Excep_USB0_USBR0(void){ }
// RTC ALM
void INT_Excep_RTC_ALM(void){ }
// RTC PRD
void INT_Excep_RTC_PRD(void){ }
// S12AD S12ADI0
void INT_Excep_S12AD_S12ADI0(void){ }
// S12AD GBADI
void INT_Excep_S12AD_GBADI(void){ }
// ELC ELSR18I
void INT_Excep_ELC_ELSR18I(void){ }
// SSI0 SSIF0
void INT_Excep_SSI0_SSIF0(void){ }
// SSI0 SSIRXI0
void INT_Excep_SSI0_SSIRXI0(void){ }
// SSI0 SSITXI0
void INT_Excep_SSI0_SSITXI0(void){ }
// MTU0 TGIA0
void INT_Excep_MTU0_TGIA0(void){ }
// MTU0 TGIB0
void INT_Excep_MTU0_TGIB0(void){ }
// MTU0 TGIC0
void INT_Excep_MTU0_TGIC0(void){ }
// MTU0 TGID0
void INT_Excep_MTU0_TGID0(void){ }
// MTU0 TCIV0
void INT_Excep_MTU0_TCIV0(void){ }
// MTU0 TGIE0
void INT_Excep_MTU0_TGIE0(void){ }
// MTU0 TGIF0
void INT_Excep_MTU0_TGIF0(void){ }
// MTU1 TGIA1
void INT_Excep_MTU1_TGIA1(void){ }
// MTU1 TGIB1
void INT_Excep_MTU1_TGIB1(void){ }
// MTU1 TCIV1
void INT_Excep_MTU1_TCIV1(void){ }
// MTU1 TCIU1
void INT_Excep_MTU1_TCIU1(void){ }
// MTU2 TGIA2
void INT_Excep_MTU2_TGIA2(void){ }
// MTU2 TGIB2
void INT_Excep_MTU2_TGIB2(void){ }
// MTU2 TCIV2
void INT_Excep_MTU2_TCIV2(void){ }
// MTU2 TCIU2
void INT_Excep_MTU2_TCIU2(void){ }
// MTU3 TGIA3
void INT_Excep_MTU3_TGIA3(void){ }
// MTU3 TGIB3
void INT_Excep_MTU3_TGIB3(void){ }
// MTU3 TGIC3
void INT_Excep_MTU3_TGIC3(void){ }
// MTU3 TGID3
void INT_Excep_MTU3_TGID3(void){ }
// MTU3 TCIV3
void INT_Excep_MTU3_TCIV3(void){ }
// MTU4 TGIA4
void INT_Excep_MTU4_TGIA4(void){ }
// MTU4 TGIB4
void INT_Excep_MTU4_TGIB4(void){ }
// MTU4 TGIC4
void INT_Excep_MTU4_TGIC4(void){ }
// MTU4 TGID4
void INT_Excep_MTU4_TGID4(void){ }
// MTU4 TCIV4
void INT_Excep_MTU4_TCIV4(void){ }
// MTU5 TGIU5
void INT_Excep_MTU5_TGIU5(void){ }
// MTU5 TGIV5
void INT_Excep_MTU5_TGIV5(void){ }
// MTU5 TGIW5
void INT_Excep_MTU5_TGIW5(void){ }
// POE OEI1
void INT_Excep_POE_OEI1(void){ }
// POE OEI2
void INT_Excep_POE_OEI2(void){ }
// TMR0 CMIA0
void INT_Excep_TMR0_CMIA0(void){ }
// TMR0 CMIB0
void INT_Excep_TMR0_CMIB0(void){ }
// TMR0 OVI0
void INT_Excep_TMR0_OVI0(void){ }
// TMR1 CMIA1
void INT_Excep_TMR1_CMIA1(void){ }
// TMR1 CMIB1
void INT_Excep_TMR1_CMIB1(void){ }
// TMR1 OVI1
void INT_Excep_TMR1_OVI1(void){ }
// TMR2 CMIA2
void INT_Excep_TMR2_CMIA2(void){ }
// TMR2 CMIB2
void INT_Excep_TMR2_CMIB2(void){ }
// TMR2 OVI2
void INT_Excep_TMR2_OVI2(void){ }
// TMR3 CMIA3
void INT_Excep_TMR3_CMIA3(void){ }
// TMR3 CMIB3
void INT_Excep_TMR3_CMIB3(void){ }
// TMR3 OVI3
void INT_Excep_TMR3_OVI3(void){ }
// SCI2 ERI2
void INT_Excep_SCI2_ERI2(void){ }
// SCI2 RXI2
void INT_Excep_SCI2_RXI2(void){ }
// SCI2 TXI2
void INT_Excep_SCI2_TXI2(void){ }
// SCI2 TEI2
void INT_Excep_SCI2_TEI2(void){ }
// SCI0 ERI0
void INT_Excep_SCI0_ERI0(void){ }
// SCI0 RXI0
void INT_Excep_SCI0_RXI0(void){ }
// SCI0 TXI0
void INT_Excep_SCI0_TXI0(void){ }
// SCI0 TEI0
void INT_Excep_SCI0_TEI0(void){ }
// SCI1 ERI1
void INT_Excep_SCI1_ERI1(void){ }
// SCI1 RXI1
void INT_Excep_SCI1_RXI1(void){ }
// SCI1 TXI1
void INT_Excep_SCI1_TXI1(void){ }
// SCI1 TEI1
void INT_Excep_SCI1_TEI1(void){ }
// SCI5 ERI5
void INT_Excep_SCI5_ERI5(void){ }
// SCI5 RXI5
void INT_Excep_SCI5_RXI5(void){ }
// SCI5 TXI5
void INT_Excep_SCI5_TXI5(void){ }
// SCI5 TEI5
void INT_Excep_SCI5_TEI5(void){ }
// SCI6 ERI6
void INT_Excep_SCI6_ERI6(void){ }
// SCI6 RXI6
void INT_Excep_SCI6_RXI6(void){ }
// SCI6 TXI6
void INT_Excep_SCI6_TXI6(void){ }
// SCI6 TEI6
void INT_Excep_SCI6_TEI6(void){ }
// SCI8 ERI8
void INT_Excep_SCI8_ERI8(void){ }
// SCI8 RXI8
void INT_Excep_SCI8_RXI8(void){ }
// SCI8 TXI8
void INT_Excep_SCI8_TXI8(void){ }
// SCI8 TEI8
void INT_Excep_SCI8_TEI8(void){ }
// SCI9 ERI9
void INT_Excep_SCI9_ERI9(void){ }
// SCI9 RXI9
void INT_Excep_SCI9_RXI9(void){ }
// SCI9 TXI9
void INT_Excep_SCI9_TXI9(void){ }
// SCI9 TEI9
void INT_Excep_SCI9_TEI9(void){ }
// SCI12 ERI12
void INT_Excep_SCI12_ERI12(void){ }
// SCI12 RXI12
void INT_Excep_SCI12_RXI12(void){ }
// SCI12 TXI12
void INT_Excep_SCI12_TXI12(void){ }
// SCI12 TEI12
void INT_Excep_SCI12_TEI12(void){ }
// SCI12 SCIX0
void INT_Excep_SCI12_SCIX0(void){ }
// SCI12 SCIX1
void INT_Excep_SCI12_SCIX1(void){ }
// SCI12 SCIX2
void INT_Excep_SCI12_SCIX2(void){ }
// SCI12 SCIX3
void INT_Excep_SCI12_SCIX3(void){ }
// RIIC0 EEI0
void INT_Excep_RIIC0_EEI0(void){ }
// RIIC0 RXI0
void INT_Excep_RIIC0_RXI0(void){ }
// RIIC0 TXI0
void INT_Excep_RIIC0_TXI0(void){ }
// RIIC0 TEI0
void INT_Excep_RIIC0_TEI0(void){ }

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FreeRTOS/Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/Renesas_Code/interrupt_handlers.h Normal file
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/***************************************************************/
/* */
/* PROJECT NAME : RTOSDemo */
/* FILE : interrupt_handlers.h */
/* DESCRIPTION : Interrupt Handler Declarations */
/* CPU SERIES : RX100 */
/* CPU TYPE : RX113 */
/* */
/* This file is generated by e2 studio. */
/* */
/***************************************************************/
/************************************************************************
*
* Device : RX/RX100/RX113
*
* File Name : vect.h
*
* Abstract : Definition of Vector.
*
* History : 1.00 (2013-11-18) [Hardware Manual Revision : 0.40]
* : 1.10 (2014-02-26) [Hardware Manual Revision : 0.50]
* : 1.1A (2015-04-20) [Hardware Manual Revision : 1.02]
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright (C) 2015 (2013 - 2014) Renesas Electronics Corporation.
*
********************************************************************+++*/
/************************************************************************/
/* File Version: V1.1A */
/* History : 1.00 (2013-11-18) [Hardware Manual Revision : 0.40] */
/* : 1.10 (2014-02-26) [Hardware Manual Revision : 0.50] */
/* : 1.1A (2015-04-20) [Hardware Manual Revision : 1.02] */
/* Date Generated: 25/05/2015 */
/************************************************************************/
#ifndef INTERRUPT_HANDLERS_H
#define INTERRUPT_HANDLERS_H
// INT_Exception(Supervisor Instruction)
void INT_Excep_SuperVisorInst(void) __attribute__ ((interrupt));
// INT_Exception(Undefined Instruction)
void INT_Excep_UndefinedInst(void) __attribute__ ((interrupt));
// NMI
void INT_NonMaskableInterrupt(void) __attribute__ ((interrupt));
// Dummy
void INT_Dummy(void) __attribute__ ((interrupt));
// BRK
void INT_Excep_BRK(void) __attribute__ ((interrupt));
// BSC BUSERR
void INT_Excep_BSC_BUSERR(void) __attribute__ ((interrupt));
// FCU FRDYI
void INT_Excep_FCU_FRDYI(void) __attribute__ ((interrupt));
// ICU SWINT
void INT_Excep_ICU_SWINT(void) __attribute__ ((interrupt));
// CMT0 CMI0
void INT_Excep_CMT0_CMI0(void) __attribute__ ((interrupt));
// CMT1 CMI1
void INT_Excep_CMT1_CMI1(void) __attribute__ ((interrupt));
// CMT2 CMI2
void INT_Excep_CMT2_CMI2(void) __attribute__ ((interrupt));
// CMT3 CMI3
void INT_Excep_CMT3_CMI3(void) __attribute__ ((interrupt));
// CAC FERRF
void INT_Excep_CAC_FERRF(void) __attribute__ ((interrupt));
// CAC MENDF
void INT_Excep_CAC_MENDF(void) __attribute__ ((interrupt));
// CAC OVFF
void INT_Excep_CAC_OVFF(void) __attribute__ ((interrupt));
// USB0 D0FIFO0
void INT_Excep_USB0_D0FIFO0(void) __attribute__ ((interrupt));
// USB0 D1FIFO0
void INT_Excep_USB0_D1FIFO0(void) __attribute__ ((interrupt));
// USB0 USBI0
void INT_Excep_USB0_USBI0(void) __attribute__ ((interrupt));
// RSPI0 SPEI0
void INT_Excep_RSPI0_SPEI0(void) __attribute__ ((interrupt));
// RSPI0 SPRI0
void INT_Excep_RSPI0_SPRI0(void) __attribute__ ((interrupt));
// RSPI0 SPTI0
void INT_Excep_RSPI0_SPTI0(void) __attribute__ ((interrupt));
// RSPI0 SPII0
void INT_Excep_RSPI0_SPII0(void) __attribute__ ((interrupt));
// DOC DOPCF
void INT_Excep_DOC_DOPCF(void) __attribute__ ((interrupt));
// CMPB CMPB0
void INT_Excep_CMPB_CMPB0(void) __attribute__ ((interrupt));
// CMPB CMPB1
void INT_Excep_CMPB_CMPB1(void) __attribute__ ((interrupt));
// CTSU CTSUWR
void INT_Excep_CTSU_CTSUWR(void) __attribute__ ((interrupt));
// CTSU CTSURD
void INT_Excep_CTSU_CTSURD(void) __attribute__ ((interrupt));
// CTSU CTSUFN
void INT_Excep_CTSU_CTSUFN(void) __attribute__ ((interrupt));
// RTC CUP
void INT_Excep_RTC_CUP(void) __attribute__ ((interrupt));
// ICU IRQ0
void INT_Excep_ICU_IRQ0(void) __attribute__ ((interrupt));
// ICU IRQ1
void INT_Excep_ICU_IRQ1(void) __attribute__ ((interrupt));
// ICU IRQ2
void INT_Excep_ICU_IRQ2(void) __attribute__ ((interrupt));
// ICU IRQ3
void INT_Excep_ICU_IRQ3(void) __attribute__ ((interrupt));
// ICU IRQ4
void INT_Excep_ICU_IRQ4(void) __attribute__ ((interrupt));
// ICU IRQ5
void INT_Excep_ICU_IRQ5(void) __attribute__ ((interrupt));
// ICU IRQ6
void INT_Excep_ICU_IRQ6(void) __attribute__ ((interrupt));
// ICU IRQ7
void INT_Excep_ICU_IRQ7(void) __attribute__ ((interrupt));
// ELC ELSR8I
void INT_Excep_ELC_ELSR8I(void) __attribute__ ((interrupt));
// LVD LVD1
void INT_Excep_LVD_LVD1(void) __attribute__ ((interrupt));
// LVD LVD2
void INT_Excep_LVD_LVD2(void) __attribute__ ((interrupt));
// USB0 USBR0
void INT_Excep_USB0_USBR0(void) __attribute__ ((interrupt));
// RTC ALM
void INT_Excep_RTC_ALM(void) __attribute__ ((interrupt));
// RTC PRD
void INT_Excep_RTC_PRD(void) __attribute__ ((interrupt));
// S12AD S12ADI0
void INT_Excep_S12AD_S12ADI0(void) __attribute__ ((interrupt));
// S12AD GBADI
void INT_Excep_S12AD_GBADI(void) __attribute__ ((interrupt));
// ELC ELSR18I
void INT_Excep_ELC_ELSR18I(void) __attribute__ ((interrupt));
// SSI0 SSIF0
void INT_Excep_SSI0_SSIF0(void) __attribute__ ((interrupt));
// SSI0 SSIRXI0
void INT_Excep_SSI0_SSIRXI0(void) __attribute__ ((interrupt));
// SSI0 SSITXI0
void INT_Excep_SSI0_SSITXI0(void) __attribute__ ((interrupt));
// MTU0 TGIA0
void INT_Excep_MTU0_TGIA0(void) __attribute__ ((interrupt));
// MTU0 TGIB0
void INT_Excep_MTU0_TGIB0(void) __attribute__ ((interrupt));
// MTU0 TGIC0
void INT_Excep_MTU0_TGIC0(void) __attribute__ ((interrupt));
// MTU0 TGID0
void INT_Excep_MTU0_TGID0(void) __attribute__ ((interrupt));
// MTU0 TCIV0
void INT_Excep_MTU0_TCIV0(void) __attribute__ ((interrupt));
// MTU0 TGIE0
void INT_Excep_MTU0_TGIE0(void) __attribute__ ((interrupt));
// MTU0 TGIF0
void INT_Excep_MTU0_TGIF0(void) __attribute__ ((interrupt));
// MTU1 TGIA1
void INT_Excep_MTU1_TGIA1(void) __attribute__ ((interrupt));
// MTU1 TGIB1
void INT_Excep_MTU1_TGIB1(void) __attribute__ ((interrupt));
// MTU1 TCIV1
void INT_Excep_MTU1_TCIV1(void) __attribute__ ((interrupt));
// MTU1 TCIU1
void INT_Excep_MTU1_TCIU1(void) __attribute__ ((interrupt));
// MTU2 TGIA2
void INT_Excep_MTU2_TGIA2(void) __attribute__ ((interrupt));
// MTU2 TGIB2
void INT_Excep_MTU2_TGIB2(void) __attribute__ ((interrupt));
// MTU2 TCIV2
void INT_Excep_MTU2_TCIV2(void) __attribute__ ((interrupt));
// MTU2 TCIU2
void INT_Excep_MTU2_TCIU2(void) __attribute__ ((interrupt));
// MTU3 TGIA3
void INT_Excep_MTU3_TGIA3(void) __attribute__ ((interrupt));
// MTU3 TGIB3
void INT_Excep_MTU3_TGIB3(void) __attribute__ ((interrupt));
// MTU3 TGIC3
void INT_Excep_MTU3_TGIC3(void) __attribute__ ((interrupt));
// MTU3 TGID3
void INT_Excep_MTU3_TGID3(void) __attribute__ ((interrupt));
// MTU3 TCIV3
void INT_Excep_MTU3_TCIV3(void) __attribute__ ((interrupt));
// MTU4 TGIA4
void INT_Excep_MTU4_TGIA4(void) __attribute__ ((interrupt));
// MTU4 TGIB4
void INT_Excep_MTU4_TGIB4(void) __attribute__ ((interrupt));
// MTU4 TGIC4
void INT_Excep_MTU4_TGIC4(void) __attribute__ ((interrupt));
// MTU4 TGID4
void INT_Excep_MTU4_TGID4(void) __attribute__ ((interrupt));
// MTU4 TCIV4
void INT_Excep_MTU4_TCIV4(void) __attribute__ ((interrupt));
// MTU5 TGIU5
void INT_Excep_MTU5_TGIU5(void) __attribute__ ((interrupt));
// MTU5 TGIV5
void INT_Excep_MTU5_TGIV5(void) __attribute__ ((interrupt));
// MTU5 TGIW5
void INT_Excep_MTU5_TGIW5(void) __attribute__ ((interrupt));
// POE OEI1
void INT_Excep_POE_OEI1(void) __attribute__ ((interrupt));
// POE OEI2
void INT_Excep_POE_OEI2(void) __attribute__ ((interrupt));
// TMR0 CMIA0
void INT_Excep_TMR0_CMIA0(void) __attribute__ ((interrupt));
// TMR0 CMIB0
void INT_Excep_TMR0_CMIB0(void) __attribute__ ((interrupt));
// TMR0 OVI0
void INT_Excep_TMR0_OVI0(void) __attribute__ ((interrupt));
// TMR1 CMIA1
void INT_Excep_TMR1_CMIA1(void) __attribute__ ((interrupt));
// TMR1 CMIB1
void INT_Excep_TMR1_CMIB1(void) __attribute__ ((interrupt));
// TMR1 OVI1
void INT_Excep_TMR1_OVI1(void) __attribute__ ((interrupt));
// TMR2 CMIA2
void INT_Excep_TMR2_CMIA2(void) __attribute__ ((interrupt));
// TMR2 CMIB2
void INT_Excep_TMR2_CMIB2(void) __attribute__ ((interrupt));
// TMR2 OVI2
void INT_Excep_TMR2_OVI2(void) __attribute__ ((interrupt));
// TMR3 CMIA3
void INT_Excep_TMR3_CMIA3(void) __attribute__ ((interrupt));
// TMR3 CMIB3
void INT_Excep_TMR3_CMIB3(void) __attribute__ ((interrupt));
// TMR3 OVI3
void INT_Excep_TMR3_OVI3(void) __attribute__ ((interrupt));
// SCI2 ERI2
void INT_Excep_SCI2_ERI2(void) __attribute__ ((interrupt));
// SCI2 RXI2
void INT_Excep_SCI2_RXI2(void) __attribute__ ((interrupt));
// SCI2 TXI2
void INT_Excep_SCI2_TXI2(void) __attribute__ ((interrupt));
// SCI2 TEI2
void INT_Excep_SCI2_TEI2(void) __attribute__ ((interrupt));
// SCI0 ERI0
void INT_Excep_SCI0_ERI0(void) __attribute__ ((interrupt));
// SCI0 RXI0
void INT_Excep_SCI0_RXI0(void) __attribute__ ((interrupt));
// SCI0 TXI0
void INT_Excep_SCI0_TXI0(void) __attribute__ ((interrupt));
// SCI0 TEI0
void INT_Excep_SCI0_TEI0(void) __attribute__ ((interrupt));
// SCI1 ERI1
void INT_Excep_SCI1_ERI1(void) __attribute__ ((interrupt));
// SCI1 RXI1
void INT_Excep_SCI1_RXI1(void) __attribute__ ((interrupt));
// SCI1 TXI1
void INT_Excep_SCI1_TXI1(void) __attribute__ ((interrupt));
// SCI1 TEI1
void INT_Excep_SCI1_TEI1(void) __attribute__ ((interrupt));
// SCI5 ERI5
void INT_Excep_SCI5_ERI5(void) __attribute__ ((interrupt));
// SCI5 RXI5
void INT_Excep_SCI5_RXI5(void) __attribute__ ((interrupt));
// SCI5 TXI5
void INT_Excep_SCI5_TXI5(void) __attribute__ ((interrupt));
// SCI5 TEI5
void INT_Excep_SCI5_TEI5(void) __attribute__ ((interrupt));
// SCI6 ERI6
void INT_Excep_SCI6_ERI6(void) __attribute__ ((interrupt));
// SCI6 RXI6
void INT_Excep_SCI6_RXI6(void) __attribute__ ((interrupt));
// SCI6 TXI6
void INT_Excep_SCI6_TXI6(void) __attribute__ ((interrupt));
// SCI6 TEI6
void INT_Excep_SCI6_TEI6(void) __attribute__ ((interrupt));
// SCI8 ERI8
void INT_Excep_SCI8_ERI8(void) __attribute__ ((interrupt));
// SCI8 RXI8
void INT_Excep_SCI8_RXI8(void) __attribute__ ((interrupt));
// SCI8 TXI8
void INT_Excep_SCI8_TXI8(void) __attribute__ ((interrupt));
// SCI8 TEI8
void INT_Excep_SCI8_TEI8(void) __attribute__ ((interrupt));
// SCI9 ERI9
void INT_Excep_SCI9_ERI9(void) __attribute__ ((interrupt));
// SCI9 RXI9
void INT_Excep_SCI9_RXI9(void) __attribute__ ((interrupt));
// SCI9 TXI9
void INT_Excep_SCI9_TXI9(void) __attribute__ ((interrupt));
// SCI9 TEI9
void INT_Excep_SCI9_TEI9(void) __attribute__ ((interrupt));
// SCI12 ERI12
void INT_Excep_SCI12_ERI12(void) __attribute__ ((interrupt));
// SCI12 RXI12
void INT_Excep_SCI12_RXI12(void) __attribute__ ((interrupt));
// SCI12 TXI12
void INT_Excep_SCI12_TXI12(void) __attribute__ ((interrupt));
// SCI12 TEI12
void INT_Excep_SCI12_TEI12(void) __attribute__ ((interrupt));
// SCI12 SCIX0
void INT_Excep_SCI12_SCIX0(void) __attribute__ ((interrupt));
// SCI12 SCIX1
void INT_Excep_SCI12_SCIX1(void) __attribute__ ((interrupt));
// SCI12 SCIX2
void INT_Excep_SCI12_SCIX2(void) __attribute__ ((interrupt));
// SCI12 SCIX3
void INT_Excep_SCI12_SCIX3(void) __attribute__ ((interrupt));
// RIIC0 EEI0
void INT_Excep_RIIC0_EEI0(void) __attribute__ ((interrupt));
// RIIC0 RXI0
void INT_Excep_RIIC0_RXI0(void) __attribute__ ((interrupt));
// RIIC0 TXI0
void INT_Excep_RIIC0_TXI0(void) __attribute__ ((interrupt));
// RIIC0 TEI0
void INT_Excep_RIIC0_TEI0(void) __attribute__ ((interrupt));
// ;<<VECTOR DATA START (POWER ON RESET)>>
// ;Power On Reset PC
extern void PowerON_Reset_PC(void) __attribute__ ((interrupt));
// ;<<VECTOR DATA END (POWER ON RESET)>>
#endif

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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*******************************************************************************/
/* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. */
/*******************************************************************************
* File Name : r_rsk_async.c
* Version : 1.00
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* H/W Platform : RSKRX113
* Description : Functions used to send data via the SCI in asynchronous mode
*******************************************************************************/
/*******************************************************************************
* History : 26.08.2014 Ver. 1.00 First Release
*******************************************************************************/
/*******************************************************************************
System Includes
*******************************************************************************/
/* Following header file provides string type definitions. */
#include <string.h>
/*******************************************************************************
User Includes (Project Level Includes)
*******************************************************************************/
/* Defines port registers */
#include "r_cg_macrodriver.h"
#include "r_cg_sci.h"
#include "r_rsk_async.h"
/*******************************************************************************
User Defines
*******************************************************************************/
/*******************************************************************************
* Global Variables
*******************************************************************************/
/* Declaration of the command string to clear the terminal screen */
static const char cmd_clr_scr[] =
{ 27, 91, 50, 74, 0, 27, 91, 72, 0 };
/*******************************************************************************
* Function Prototypes
*******************************************************************************/
/* text_write function prototype */
static void text_write (const char * const msg_string);
/*******************************************************************************
* Function Name: R_ASYNC_Init
* Description : This function initialises the SCI channel connected to the
* RS232 connector on the RSK. The channel is configured for
* transmission and reception, and instructions are sent to the
* terminal.
* Argument : none
* Return value : none
*******************************************************************************/
void R_ASYNC_Init (void)
{
/* Set up SCI1 receive buffer */
R_SCI1_Serial_Receive((uint8_t *) &g_rx_char, 1);
/* Enable SCI1 operations */
R_SCI1_Start();
/* Clear the text on terminal window */
text_write(cmd_clr_scr);
/* Display splash screen on terminal window */
text_write("Renesas RSKRX113 Async Serial \r\n");
/* Inform user on how to stop transmission */
text_write("Press 'z' to stop and any key to resume\r\n\n");
}
/*******************************************************************************
* End of function R_ASYNC_Init
*******************************************************************************/
/*******************************************************************************
* Function Name : text_write
* Description : Transmits null-terminated string.
* Argument : (char*) msg_string - null terminated string
* Return value : None
*******************************************************************************/
static void text_write (const char * const msg_string)
{
R_SCI1_AsyncTransmit((uint8_t *) msg_string, (uint16_t) strlen(msg_string));
}
/*******************************************************************************
* End of function text_write
*******************************************************************************/

50
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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*******************************************************************************/
/* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved. */
/*******************************************************************************
* File Name : r_rsk_async.h
* Version : 1.00
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* H/W Platform : RSKRX113
* Description : Functions used to send data via the SCI in asynchronous mode
******************************************************************************/
/*******************************************************************************
* History : 26.08.2014 Ver. 1.00 First Release
*******************************************************************************/
/*******************************************************************************
* Macro Definitions
*******************************************************************************/
/* Multiple inclusion prevention macro */
#ifndef R_RSK_ASYNC_H
#define R_RSK_ASYNC_H
/*******************************************************************************
* Global Function Prototypes
*******************************************************************************/
/* initialise asynchronous transmission*/
void R_ASYNC_Init (void);
/* End of multiple inclusion prevention macro */
#endif

206
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/***************************************************************/
/* */
/* PROJECT NAME : RTOSDemo */
/* FILE : reset_program.asm */
/* DESCRIPTION : Reset Program */
/* CPU SERIES : RX100 */
/* CPU TYPE : RX113 */
/* */
/* This file is generated by e2 studio. */
/* */
/***************************************************************/
/************************************************************************/
/* File Version: V1.01 */
/* Date Generated: 04/03/2015 */
/************************************************************************/
/*reset_program.asm*/
.list
.section .text
.global _PowerON_Reset /*global Start routine */
.extern _HardwareSetup /*external Sub-routine to initialise Hardware*/
.extern _data
.extern _mdata
.extern _ebss
.extern _bss
.extern _edata
.extern _main
.extern _ustack
.extern _istack
.extern _rvectors
.extern _exit
_PowerON_Reset :
/* initialise user stack pointer */
mvtc #_ustack,USP
/* initialise interrupt stack pointer */
mvtc #_istack,ISP
#ifdef __RXv2__
/* setup exception vector */
mvtc #_ExceptVectors, extb /* EXCEPTION VECTOR ADDRESS */
#endif
/* setup intb */
mvtc #_rvectors_start, intb /* INTERRUPT VECTOR ADDRESS definition */
/* setup FPSW */
mvtc #100h, fpsw
/* load data section from ROM to RAM */
mov #_mdata,r2 /* src ROM address of data section in R2 */
mov #_data,r1 /* dest start RAM address of data section in R1 */
mov #_edata,r3 /* end RAM address of data section in R3 */
sub r1,r3 /* size of data section in R3 (R3=R3-R1) */
#ifdef __RX_ALLOW_STRING_INSNS__
smovf /* block copy R3 bytes from R2 to R1 */
#else
cmp #0, r3
beq 2f
1: mov.b [r2+], r5
mov.b r5, [r1+]
sub #1, r3
bne 1b
2:
#endif
/* bss initialisation : zero out bss */
mov #00h,r2 /* load R2 reg with zero */
mov #_ebss, r3 /* store the end address of bss in R3 */
mov #_bss, r1 /* store the start address of bss in R1 */
sub r1,r3 /* size of bss section in R3 (R3=R3-R1) */
sstr.b
/* call the hardware initialiser */
mov #_HardwareSetup,r7
jsr r7
nop
/* setup PSW */
mvtc #10000h, psw /* Set Ubit & Ibit for PSW */
/* change PSW PM to user-mode */
MVFC PSW,R1
//DO NOT SWITCH TO USER MODE OR #00100000h,R1
PUSH.L R1
MVFC PC,R1
ADD #10,R1
PUSH.L R1
RTE
NOP
NOP
#ifdef CPPAPP
mov #__rx_init,r7
jsr r7
#endif
/* start user program */
mov #_main,r7
jsr r7
mov #_exit,r7
jsr r7
#ifdef CPPAPP
.global _rx_run_preinit_array
.type _rx_run_preinit_array,@function
_rx_run_preinit_array:
mov #__preinit_array_start,r1
mov #__preinit_array_end,r2
mov #_rx_run_inilist,r7
jsr r7
.global _rx_run_init_array
.type _rx_run_init_array,@function
_rx_run_init_array:
mov #__init_array_start,r1
mov #__init_array_end,r2
mov #4, r3
mov #_rx_run_inilist,r7
jsr r7
.global _rx_run_fini_array
.type _rx_run_fini_array,@function
_rx_run_fini_array:
mov #__fini_array_start,r2
mov #__fini_array_end,r1
mov #-4, r3
/* fall through */
_rx_run_inilist:
next_inilist:
cmp r1,r2
beq.b done_inilist
mov.l [r1],r4
cmp #-1, r4
beq.b skip_inilist
cmp #0, r4
beq.b skip_inilist
pushm r1-r3
jsr r4
popm r1-r3
skip_inilist:
add r3,r1
mov #next_inilist,r7
jsr r7
done_inilist:
rts
.section .init,"ax"
.balign 4
.global __rx_init
__rx_init:
.section .fini,"ax"
.balign 4
.global __rx_fini
__rx_fini:
mov #_rx_run_fini_array,r7
jsr r7
.section .sdata
.balign 4
.global __gp
.weak __gp
__gp:
.section .data
.global ___dso_handle
.weak ___dso_handle
___dso_handle:
.long 0
.section .init,"ax"
mov #_rx_run_preinit_array,r7
jsr r7
mov #_rx_run_init_array,r7
jsr r7
rts
.global __rx_init_end
__rx_init_end:
.section .fini,"ax"
rts
.global __rx_fini_end
__rx_fini_end:
#endif
/* call to exit*/
_exit:
bra _loop_here
_loop_here:
bra _loop_here
.text
.end

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/***************************************************************/
/* */
/* PROJECT NAME : RTOSDemo */
/* FILE : typedefine.h */
/* DESCRIPTION : Aliases of Integer Type */
/* CPU SERIES : RX100 */
/* CPU TYPE : RX113 */
/* */
/* This file is generated by e2 studio. */
/* */
/***************************************************************/
/************************************************************************/
/* File Version: V1.00 */
/* Date Generated: 08/07/2013 */
/************************************************************************/
typedef signed char _SBYTE;
typedef unsigned char _UBYTE;
typedef signed short _SWORD;
typedef unsigned short _UWORD;
typedef signed int _SINT;
typedef unsigned int _UINT;
typedef signed long _SDWORD;
typedef unsigned long _UDWORD;
typedef signed long long _SQWORD;
typedef unsigned long long _UQWORD;

620
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/***************************************************************/
/* */
/* PROJECT NAME : RTOSDemo */
/* FILE : vector_table.c */
/* DESCRIPTION : Vector Table */
/* CPU SERIES : RX100 */
/* CPU TYPE : RX113 */
/* */
/* This file is generated by e2 studio. */
/* */
/***************************************************************/
/************************************************************************/
/* File Version: V1.00 */
/* Date Generated: 20/08/2014 */
/************************************************************************/
#include "interrupt_handlers.h"
typedef void (*fp) (void);
extern void PowerON_Reset (void);
extern void stack (void);
extern void vPortSoftwareInterruptISR( void );
extern void vPortTickISR( void );
extern void vIntQTimerISR0( void );
extern void vIntQTimerISR1( void );
#define FVECT_SECT __attribute__ ((section (".fvectors")))
const void *HardwareVectors[] FVECT_SECT = {
//;0xffffff80 MDES Endian Select Register
#ifdef __RX_LITTLE_ENDIAN__
(fp)0xffffffff,
#endif
#ifdef __RX_BIG_ENDIAN__
(fp)0xfffffff8,
#endif
//;0xffffff84 Reserved
(fp)0,
//;0xffffff88 OFS1
(fp)0xFFFFFFFF,
//;0xffffff8C OFS0
(fp)0xFFFFFFFF,
//;0xffffff90 Reserved
(fp)0,
//;0xffffff94 Reserved
(fp)0,
//;0xffffff98 Reserved
(fp)0,
//;0xffffff9C Reserved
(fp)0,
//;0xffffffA0 Reserved
(fp)0,
//;0xffffffA4 Reserved
(fp)0,
//;0xffffffA8 Reserved
(fp)0,
//;0xffffffAC Reserved
(fp)0,
//;0xffffffB0 Reserved
(fp)0,
//;0xffffffB4 Reserved
(fp)0,
//;0xffffffB8 Reserved
(fp)0,
//;0xffffffBC Reserved
(fp)0,
//;0xffffffC0 Reserved
(fp)0,
//;0xffffffC4 Reserved
(fp)0,
//;0xffffffC8 Reserved
(fp)0,
//;0xffffffCC Reserved
(fp)0,
//;0xffffffd0 Exception(Supervisor Instruction)
INT_Excep_SuperVisorInst,
//;0xffffffd4 Reserved
(fp)0,
//;0xffffffd8 Reserved
(fp)0,
//;0xffffffdc Exception(Undefined Instruction)
INT_Excep_UndefinedInst,
//;0xffffffe0 Reserved
(fp)0,
//;0xffffffe4 Reserved
(fp)0,
//;0xffffffe8 Reserved
(fp)0,
//;0xffffffec Reserved
(fp)0,
//;0xfffffff0 Reserved
(fp)0,
//;0xfffffff4 Reserved
(fp)0,
//;0xfffffff8 NMI
INT_NonMaskableInterrupt,
//;0xfffffffc RESET
//;<<VECTOR DATA START (POWER ON RESET)>>
//;Power On Reset PC
PowerON_Reset
//;<<VECTOR DATA END (POWER ON RESET)>>
};
#define RVECT_SECT __attribute__ ((section (".rvectors")))
const fp RelocatableVectors[] RVECT_SECT = {
//;0x0000 BRK
(fp)INT_Excep_BRK,
//;0x0004 Reserved
(fp)0,
//;0x0008 Reserved
(fp)0,
//;0x000C Reserved
(fp)0,
//;0x0010 Reserved
(fp)0,
//;0x0014 Reserved
(fp)0,
//;0x0018 Reserved
(fp)0,
//;0x001C Reserved
(fp)0,
//;0x0020 Reserved
(fp)0,
//;0x0024 Reserved
(fp)0,
//;0x0028 Reserved
(fp)0,
//;0x002C Reserved
(fp)0,
//;0x0030 Reserved
(fp)0,
//;0x0034 Reserved
(fp)0,
//;0x0038 Reserved
(fp)0,
//;0x003C Reserved
(fp)0,
//;0x0040 BSC_BUSERR
(fp)INT_Excep_BSC_BUSERR,
//;0x0044 Reserved
(fp)0,
//;0x0048 Reserved
(fp)0,
//;0x004C Reserved
(fp)0,
//;0x0050 Reserved
(fp)0,
//;0x0054 FCUERR
(fp)0,
//;0x0058 Reserved
(fp)0,
//;0x005C FRDYI
(fp)INT_Excep_FCU_FRDYI,
//;0x0060 Reserved
(fp)0,
//;0x0064 Reserved
(fp)0,
//;0x0068 Reserved
(fp)0,
//;0x006C ICU_SWINT
(fp)vPortSoftwareInterruptISR,
//;0x0070 CMT0_CMI0
(fp)vPortTickISR,
//;0x0074 CMT1_CMI1
(fp)INT_Excep_CMT1_CMI1,
//;0x0078 CMT2_CMI2
(fp)INT_Excep_CMT2_CMI2,
//;0x007C CMT3_CMI3
(fp)INT_Excep_CMT3_CMI3,
//;0x0080 CAC_FERRF
(fp)INT_Excep_CAC_FERRF,
//;0x0084 CAC_MENDF
(fp)INT_Excep_CAC_MENDF,
//;0x0088 CAC_OVFF
(fp)INT_Excep_CAC_OVFF,
//;0x008C Reserved
(fp)0,
//;0x0090 USB0_D0FIFO0
(fp)INT_Excep_USB0_D0FIFO0,
//;0x0094 USB0_D1FIFO0
(fp)INT_Excep_USB0_D1FIFO0,
//;0x0098 USB0_USBI0
(fp)INT_Excep_USB0_USBI0,
//;0x009C Reserved
(fp)0,
//;0x00A0 Reserved
(fp)0,
//;0x00A4 Reserved
(fp)0,
//;0x00A8 Reserved
(fp)0,
//;0x00AC Reserved
(fp)0,
//;0x00B0 RSPI0_SPEI0
(fp)INT_Excep_RSPI0_SPEI0,
//;0x00B4 RSPI0_SPRI0
(fp)INT_Excep_RSPI0_SPRI0,
//;0x00B8 RSPI0_SPTI0
(fp)INT_Excep_RSPI0_SPTI0,
//;0x00BC RSPI0_SPII0
(fp)INT_Excep_RSPI0_SPII0,
//;0x00C0 Reserved
(fp)0,
//;0x00C4 Reserved
(fp)0,
//;0x00C8 Reserved
(fp)0,
//;0x00CC Reserved
(fp)0,
//;0x00D0 Reserved
(fp)0,
//;0x00D4 Reserved
(fp)0,
//;0x00D8 Reserved
(fp)0,
//;0x00DC Reserved
(fp)0,
//;0x00E0 Reserved
(fp)0,
//;0x00E4 DOC_DOPCF
(fp)INT_Excep_DOC_DOPCF,
//;0x00E8 CMPB_CMPB0
(fp)INT_Excep_CMPB_CMPB0,
//;0x00EC CMPB_CMPB1
(fp)INT_Excep_CMPB_CMPB1,
//;0x00F0 CTSU_CTSUWR
(fp)INT_Excep_CTSU_CTSUWR,
//;0x00F4 CTSU_CTSURD
(fp)INT_Excep_CTSU_CTSURD,
//;0x00F8 CTSU_CTSUFN
(fp)INT_Excep_CTSU_CTSUFN,
//;0x00FC Excep_RTC_CUP
(fp)INT_Excep_RTC_CUP,
//;0x0100 IRQ0
(fp)INT_Excep_ICU_IRQ0,
//;0x0104 IRQ1
(fp)INT_Excep_ICU_IRQ1,
//;0x0108 IRQ2
(fp)INT_Excep_ICU_IRQ2,
//;0x010C IRQ3
(fp)INT_Excep_ICU_IRQ3,
//;0x0110 IRQ4
(fp)INT_Excep_ICU_IRQ4,
//;0x0114 IRQ5
(fp)INT_Excep_ICU_IRQ5,
//;0x0118 IRQ6
(fp)INT_Excep_ICU_IRQ6,
//;0x011C IRQ7
(fp)INT_Excep_ICU_IRQ7,
//;0x0120 Reserved
(fp)0,
//;0x0124 Reserved
(fp)0,
//;0x0128 Reserved
(fp)0,
//;0x012C Reserved
(fp)0,
//;0x0130 Reserved
(fp)0,
//;0x0134 Reserved
(fp)0,
//;0x0138 Reserved
(fp)0,
//;0x013C Reserved
(fp)0,
//;0x0140 ELC ELSR8I
(fp)INT_Excep_ELC_ELSR8I,
//;0x0144 Reserved
(fp)0,
//;0x0148 Reserved
(fp)0,
//;0x014C Reserved
(fp)0,
//;0x0150 Reserved
(fp)0,
//;0x0154 Reserved
(fp)0,
//;0x0158 Reserved
(fp)0,
//;0x015C Reserved
(fp)0,
//;0x0160 LVD_LVD1
(fp)INT_Excep_LVD_LVD1,
//;0x0164 LVD_LVD2
(fp)INT_Excep_LVD_LVD2,
//;0x0168 USB0_USBR0
(fp)INT_Excep_USB0_USBR0,
//;0x016C Reserved
(fp)0,
//;0x0170 RTC_ALM
(fp)INT_Excep_RTC_ALM,
//;0x0174 RTC_PRD
(fp)INT_Excep_RTC_PRD,
//;0x0178 Reserved
(fp)0,
//;0x017C Reserved
(fp)0,
//;0x0180 Reserved
(fp)0,
//;0x0184 Reserved
(fp)0,
//;0x0188 Reserved
(fp)0,
//;0x018C Reserved
(fp)0,
//;0x0190 Reserved
(fp)0,
//;0x0194 Reserved
(fp)0,
//;0x0198 S12AD_S12ADI0
(fp)INT_Excep_S12AD_S12ADI0,
//;0x019C S12AD_GBADI
(fp)INT_Excep_S12AD_GBADI,
//104;0x01A0 Reserved
(fp)0,
//105;0x01A4 Reserved
(fp)0,
//;0x01A8 ELC_ELSR18I
(fp)INT_Excep_ELC_ELSR18I,
//;0x01AC Reserved
(fp)0,
//;0x01B0 SSI0_SSIF0
(fp)INT_Excep_SSI0_SSIF0,
//;0x01B4 SSI0_SSIRXI0
(fp)INT_Excep_SSI0_SSIRXI0,
//;0x01B8 SSI0_SSITXI0
(fp)INT_Excep_SSI0_SSITXI0,
//;0x01BC Reserved
(fp)0,
//;0x01C0 Reserved
(fp)0,
//;0x01C4 Reserved
(fp)0,
//;0x01C8 MTU0_TGIA0
(fp)INT_Excep_MTU0_TGIA0,
//;0x01CC MTU0_TGIB0
(fp)INT_Excep_MTU0_TGIB0,
//;0x01D0 MTU0_TGIC0
(fp)INT_Excep_MTU0_TGIC0,
//;0x01D4 MTU0_TGID0
(fp)INT_Excep_MTU0_TGID0,
//;0x01D8 MTU0_TCIV0
(fp)INT_Excep_MTU0_TCIV0,
//;0x01DC MTU0_TGIE0
(fp)INT_Excep_MTU0_TGIE0,
//;0x01E0 MTU0_TGIF0
(fp)INT_Excep_MTU0_TGIF0,
//;0x01E4 MTU1_TGIA1
(fp)INT_Excep_MTU1_TGIA1,
//;0x01E8 MTU1_TGIB1
(fp)INT_Excep_MTU1_TGIB1,
//;0x01EC MTU1_TCIV1
(fp)INT_Excep_MTU1_TCIV1,
//;0x01F0 MTU1_TCIU1
(fp)INT_Excep_MTU1_TCIU1,
//;0x01F4 MTU2_TGIA2
(fp)INT_Excep_MTU2_TGIA2,
//;0x01F8 MTU2_TGIB2
(fp)INT_Excep_MTU2_TGIB2,
//;0x01FC MTU2_TCIV2
(fp)INT_Excep_MTU2_TCIV2,
//;0x0200 MTU2_TCIU2
(fp)INT_Excep_MTU2_TCIU2,
//;0x0204 MTU3_TGIA3
(fp)INT_Excep_MTU3_TGIA3,
//;0x0208 MTU3_TGIB3
(fp)INT_Excep_MTU3_TGIB3,
//;0x020C MTU3_TGIC3
(fp)INT_Excep_MTU3_TGIC3,
//;0x0210 MTU3_TGID3
(fp)INT_Excep_MTU3_TGID3,
//;0x0214 MTU3_TCIV3
(fp)INT_Excep_MTU3_TCIV3,
//;0x0218 MTU4_TGIA4
(fp)INT_Excep_MTU4_TGIA4,
//;0x021C MTU4_TGIB4
(fp)INT_Excep_MTU4_TGIB4,
//;0x0220 MTU4_TGIC4
(fp)INT_Excep_MTU4_TGIC4,
//;0x0224 MTU4_TGID4
(fp)INT_Excep_MTU4_TGID4,
//;0x0228 MTU4_TCIV4
(fp)INT_Excep_MTU4_TCIV4,
//;0x022C MTU5_TGIU5
(fp)INT_Excep_MTU5_TGIU5,
//;0x0230 MTU5_TGIV5
(fp)INT_Excep_MTU5_TGIV5,
//;0x0234 MTU5_TGIW5
(fp)INT_Excep_MTU5_TGIW5,
//;0x0238 Reserved
(fp)0,
//;0x023C Reserved
(fp)0,
//;0x0240 Reserved
(fp)0,
//;0x0244 Reserved
(fp)0,
//;0x0248 Reserved
(fp)0,
//;0x024C Reserved
(fp)0,
//;0x0250 Reserved
(fp)0,
//;0x0254 Reserved
(fp)0,
//;0x0258 Reserved
(fp)0,
//;0x025C Reserved
(fp)0,
//;0x0260 Reserved
(fp)0,
//;0x0264 Reserved
(fp)0,
//;0x0268 Reserved
(fp)0,
//;0x026C Reserved
(fp)0,
//;0x0270 Reserved
(fp)0,
//;0x0274 Reserved
(fp)0,
//;0x0278 Reserved
(fp)0,
//;0x027C Reserved
(fp)0,
//;0x0280 Reserved
(fp)0,
//;0x0284 Reserved
(fp)0,
//;0x0288 Reserved
(fp)0,
//;0x028C Reserved
(fp)0,
//;0x0290 Reserved
(fp)0,
//;0x0294 Reserved
(fp)0,
//;0x0298 Reserved
(fp)0,
//;0x029C Reserved
(fp)0,
//;0x02A0 Reserved
(fp)0,
//;0x02A4 Reserved
(fp)0,
//;0x02A8 POE_OEI1
(fp)INT_Excep_POE_OEI1,
//;0x02AC POE_OEI2
(fp)INT_Excep_POE_OEI2,
//;0x02B0 Reserved
(fp)0,
//;0x02B4 Reserved
(fp)0,
//;0x02B8 TMR0_CMIA0
(fp)vIntQTimerISR0,
//;0x02BC TMR0_CMIB0
(fp)INT_Excep_TMR0_CMIB0,
//;0x02C0 TMR0_OVI0
(fp)INT_Excep_TMR0_OVI0,
//;0x02C4 TMR1_CMIA1
(fp)INT_Excep_TMR1_CMIA1,
//;0x02C8 TMR1_CMIB1
(fp)INT_Excep_TMR1_CMIB1,
//;0x02CC TMR1_OVI1
(fp)INT_Excep_TMR1_OVI1,
//;0x02D0 TMR2_CMIA2
(fp)vIntQTimerISR1,
//;0x02D4 TMR2_CMIB2
(fp)INT_Excep_TMR2_CMIB2,
//;0x02D8 TMR2_OVI2
(fp)INT_Excep_TMR2_OVI2,
//;0x02DC TMR3_CMIA3
(fp)INT_Excep_TMR3_CMIA3,
//;0x02E0 TMR3_CMIB3
(fp)INT_Excep_TMR3_CMIB3,
//;0x02E4 TMR3_OVI3
(fp)INT_Excep_TMR3_OVI3,
//;0x02E8 SCI2_ERI2
(fp)INT_Excep_SCI2_ERI2,
//;0x02EC SCI2_RXI2
(fp)INT_Excep_SCI2_RXI2,
//;0x02F0 SCI2_TXI2
(fp)INT_Excep_SCI2_TXI2,
//;0x02F4 SCI2_TEI2
(fp)INT_Excep_SCI2_TEI2,
//;0x02F8 Reserved
(fp)0,
//;0x02FC Reserved
(fp)0,
//;0x0300 Reserved
(fp)0,
//;0x0304 Reserved
(fp)0,
//;0x0308 Reserved
(fp)0,
//;0x030C Reserved
(fp)0,
//;0x0310 Reserved
(fp)0,
//;0x0314 Reserved
(fp)0,
//;0x0318 Reserved
(fp)0,
//;0x031C Reserved
(fp)0,
//;0x0320 Reserved
(fp)0,
//;0x0324 Reserved
(fp)0,
//;0x0328 Reserved
(fp)0,
//;0x032C Reserved
(fp)0,
//;0x0330 Reserved
(fp)0,
//;0x0334 Reserved
(fp)0,
//;0x0338 Reserved
(fp)0,
//;0x033C Reserved
(fp)0,
//;0x0340 Reserved
(fp)0,
//;0x0344 Reserved
(fp)0,
//;0x0348 Reserved
(fp)0,
//;0x034C Reserved
(fp)0,
//;0x0350 Reserved
(fp)0,
//;0x0354 Reserved
(fp)0,
//;0x0358 SCI0_ERI0
(fp)INT_Excep_SCI0_ERI0,
//;0x035C SCI0_RXI0
(fp)INT_Excep_SCI0_RXI0,
//;0x0360 SCI0_TXI0
(fp)INT_Excep_SCI0_TXI0,
//;0x0364 SCI0_TEI0
(fp)INT_Excep_SCI0_TEI0,
//;0x0368 SCI1_ERI1
(fp)INT_Excep_SCI1_ERI1,
//;0x036C SCI1_RXI1
(fp)INT_Excep_SCI1_RXI1,
//;0x0370 SCI1_TXI1
(fp)INT_Excep_SCI1_TXI1,
//;0x0374 SCI1_TEI1
(fp)INT_Excep_SCI1_TEI1,
//;0x0378 SCI5_ERI5
(fp)INT_Excep_SCI5_ERI5,
//;0x037C SCI5_RXI5
(fp)INT_Excep_SCI5_RXI5,
//;0x0380 SCI5_TXI5
(fp)INT_Excep_SCI5_TXI5,
//;0x0384 SCI5_TEI5
(fp)INT_Excep_SCI5_TEI5,
//;0x0388 SCI6_ERI6
(fp)INT_Excep_SCI6_ERI6,
//;0x038C SCI6_RXI6
(fp)INT_Excep_SCI6_RXI6,
//;0x0390 SCI6_TXI6
(fp)INT_Excep_SCI6_TXI6,
//;0x0394 SCI6_TEI6
(fp)INT_Excep_SCI6_TEI6,
//;0x0398 SCI8_ERI8
(fp)INT_Excep_SCI8_ERI8,
//;0x039C SCI8_RXI8
(fp)INT_Excep_SCI8_RXI8,
//;0x03A0 SCI8_TXI8
(fp)INT_Excep_SCI8_TXI8,
//;0x03A4 SCI8_TEI8
(fp)INT_Excep_SCI8_TEI8,
//;0x03A8 SCI9_ERI9
(fp)INT_Excep_SCI9_ERI9,
//;0x03AC SCI9_RXI9
(fp)INT_Excep_SCI9_RXI9,
//;0x03B0 SCI9_TXI9
(fp)INT_Excep_SCI9_TXI9,
//;0x03B4 SCI9_TEI9
(fp)INT_Excep_SCI9_TEI9,
//;0x03B8 SCI12_ERI12
(fp)INT_Excep_SCI12_ERI12,
//;0x03BC SCI12_RXI12
(fp)INT_Excep_SCI12_RXI12,
//;0x03C0 SCI12_TXI12
(fp)INT_Excep_SCI12_TXI12,
//;0x03C4 SCI12_TEI12
(fp)INT_Excep_SCI12_TEI12,
//;0x03C8 SCI12_SCIX0
(fp)INT_Excep_SCI12_SCIX0,
//;0x03CC SCI12_SCIX1
(fp)INT_Excep_SCI12_SCIX1,
//;0x03D0 SCI12_SCIX2
(fp)INT_Excep_SCI12_SCIX2,
//;0x03D4 SCI12_SCIX3
(fp)INT_Excep_SCI12_SCIX3,
//;0x03D8 RIIC0_EEI0
(fp)INT_Excep_RIIC0_EEI0,
//;0x03DC RIIC0_RXI0
(fp)INT_Excep_RIIC0_RXI0,
//;0x03E0 RIIC0_TXI0
(fp)INT_Excep_RIIC0_TXI0,
//;0x03E4 RIIC0_TEI0
(fp)INT_Excep_RIIC0_TEI0,
//;0x03E8 Reserved
(fp)0,
//;0x03EC Reserved
(fp)0,
//;0x03F0 Reserved
(fp)0,
//;0x03F4 Reserved
(fp)0,
//;0x03F8 Reserved
(fp)0,
//;0x03FC Reserved
(fp)0,
};

131
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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_cgc.c
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : This file implements device driver for CGC module.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_cgc.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: R_CGC_Create
* Description : This function initializes the clock generator.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_CGC_Create(void)
{
uint32_t sckcr_dummy;
uint32_t w_count;
/* Set main clock control registers */
SYSTEM.MOFCR.BYTE = _00_CGC_MAINOSC_RESONATOR | _20_CGC_MAINOSC_OVER10M;
SYSTEM.MOSCWTCR.BYTE = _06_CGC_OSC_WAIT_CYCLE_32768;
/* Set main clock operation */
SYSTEM.MOSCCR.BIT.MOSTP = 0U;
/* Wait for main clock oscillator wait counter overflow */
while (1U != SYSTEM.OSCOVFSR.BIT.MOOVF);
/* Set system clock */
sckcr_dummy = _00000000_CGC_PCLKD_DIV_1 | _00000000_CGC_PCLKB_DIV_1 | _00000000_CGC_ICLK_DIV_1 |
_00000000_CGC_FCLK_DIV_1;
SYSTEM.SCKCR.LONG = sckcr_dummy;
while (SYSTEM.SCKCR.LONG != sckcr_dummy);
/* Set PLL circuit */
SYSTEM.PLLCR.WORD = _0002_CGC_PLL_FREQ_DIV_4 | _0F00_CGC_PLL_FREQ_MUL_8;
SYSTEM.PLLCR2.BIT.PLLEN = 0U;
/* Wait for PLL wait counter overflow */
while (1U != SYSTEM.OSCOVFSR.BIT.PLOVF);
/* Stop sub-clock */
SYSTEM.SOSCCR.BIT.SOSTP = 1U;
/* Wait for the register modification to complete */
while (1U != SYSTEM.SOSCCR.BIT.SOSTP);
/* Stop sub-clock */
RTC.RCR3.BIT.RTCEN = 0U;
/* Wait for the register modification to complete */
while (0U != RTC.RCR3.BIT.RTCEN);
/* Wait for 5 sub-clock cycles */
for (w_count = 0U; w_count < _007B_CGC_SUBSTPWT_WAIT; w_count++)
{
__asm volatile( "NOP" );
}
/* Set sub-clock drive capacity */
RTC.RCR3.BIT.RTCDV = 1U;
/* Wait for the register modification to complete */
while (1U != RTC.RCR3.BIT.RTCDV);
/* Set sub-clock */
SYSTEM.SOSCCR.BIT.SOSTP = 0U;
/* Wait for the register modification to complete */
while (0U != SYSTEM.SOSCCR.BIT.SOSTP);
/* Wait for sub-clock to be stable */
for (w_count = 0U; w_count < _00061A81_CGC_SUBOSCWT_WAIT; w_count++)
{
__asm volatile( "NOP" );
}
/* Set clock source */
SYSTEM.SCKCR3.WORD = _0400_CGC_CLOCKSOURCE_PLL;
while (SYSTEM.SCKCR3.WORD != _0400_CGC_CLOCKSOURCE_PLL);
/* Set LOCO */
SYSTEM.LOCOCR.BIT.LCSTP = 1U;
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

190
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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_cgc.h
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : This file implements device driver for CGC module.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
#ifndef CGC_H
#define CGC_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/*
System Clock Control Register (SCKCR)
*/
/* Peripheral Module Clock D (PCLKD) */
#define _00000000_CGC_PCLKD_DIV_1 (0x00000000UL) /* x1 */
#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */
#define _00000002_CGC_PCLKD_DIV_4 (0x00000002UL) /* x1/4 */
#define _00000003_CGC_PCLKD_DIV_8 (0x00000003UL) /* x1/8 */
#define _00000004_CGC_PCLKD_DIV_16 (0x00000004UL) /* x1/16 */
#define _00000005_CGC_PCLKD_DIV_32 (0x00000005UL) /* x1/32 */
#define _00000006_CGC_PCLKD_DIV_64 (0x00000006UL) /* x1/64 */
/* Peripheral Module Clock B (PCLKB) */
#define _00000000_CGC_PCLKB_DIV_1 (0x00000000UL) /* x1 */
#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */
#define _00000200_CGC_PCLKB_DIV_4 (0x00000200UL) /* x1/4 */
#define _00000300_CGC_PCLKB_DIV_8 (0x00000300UL) /* x1/8 */
#define _00000400_CGC_PCLKB_DIV_16 (0x00000400UL) /* x1/16 */
#define _00000500_CGC_PCLKB_DIV_32 (0x00000500UL) /* x1/32 */
#define _00000600_CGC_PCLKB_DIV_64 (0x00000600UL) /* x1/64 */
/* System Clock (ICLK) */
#define _00000000_CGC_ICLK_DIV_1 (0x00000000UL) /* x1 */
#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */
#define _02000000_CGC_ICLK_DIV_4 (0x02000000UL) /* x1/4 */
#define _03000000_CGC_ICLK_DIV_8 (0x03000000UL) /* x1/8 */
#define _04000000_CGC_ICLK_DIV_16 (0x04000000UL) /* x1/16 */
#define _05000000_CGC_ICLK_DIV_32 (0x05000000UL) /* x1/32 */
#define _06000000_CGC_ICLK_DIV_64 (0x06000000UL) /* x1/64 */
/* System Clock (FCLK) */
#define _00000000_CGC_FCLK_DIV_1 (0x00000000UL) /* x1 */
#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */
#define _20000000_CGC_FCLK_DIV_4 (0x20000000UL) /* x1/4 */
#define _30000000_CGC_FCLK_DIV_8 (0x30000000UL) /* x1/8 */
#define _40000000_CGC_FCLK_DIV_16 (0x40000000UL) /* x1/16 */
#define _50000000_CGC_FCLK_DIV_32 (0x50000000UL) /* x1/32 */
#define _60000000_CGC_FCLK_DIV_64 (0x60000000UL) /* x1/64 */
/*
System Clock Control Register 3 (SCKCR3)
*/
#define _0000_CGC_CLOCKSOURCE_LOCO (0x0000U) /* LOCO */
#define _0100_CGC_CLOCKSOURCE_HOCO (0x0100U) /* HOCO */
#define _0200_CGC_CLOCKSOURCE_MAINCLK (0x0200U) /* Main clock oscillator */
#define _0300_CGC_CLOCKSOURCE_SUBCLK (0x0300U) /* Sub-clock oscillator */
#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */
/*
PLL Control Register (PLLCR)
*/
/* PLL Input Frequency Division Ratio Select (PLIDIV[1:0]) */
#define _0000_CGC_PLL_FREQ_DIV_1 (0x0000U) /* x1 */
#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */
#define _0002_CGC_PLL_FREQ_DIV_4 (0x0002U) /* x1/4 */
/* Frequency Multiplication Factor Select (STC[5:0]) */
#define _0B00_CGC_PLL_FREQ_MUL_6 (0x0B00U) /* x6 */
#define _0F00_CGC_PLL_FREQ_MUL_8 (0x0F00U) /* x8 */
/*
USB-dedicated PLL Control Register (UPLLCR)
*/
/* USB-dedicated PLL Input Frequency Division Ratio Select (UPLIDIV[1:0]) */
#define _0000_CGC_PLL_UPLIDIV_1 (0x0000U) /* x1 */
#define _0001_CGC_PLL_UPLIDIV_2 (0x0001U) /* x1/2 */
#define _0002_CGC_PLL_UPLIDIV_4 (0x0002U) /* x1/4 */
/* UCLK Source USB-Dedicated PLL Select (UCKUPLLSEL) */
#define _0000_CGC_UCLK_SYSCLK (0x0000U) /* System clock is selected as UCLK */
#define _0010_CGC_UCLK_USBPLL (0x0010U) /* USB-dedicated PLL is selected as UCLK */
/* Frequency Multiplication Factor Select (USTC[5:0]) */
#define _0B00_CGC_PLL_USTC_6 (0x0B00U) /* x6 */
#define _0F00_CGC_PLL_USTC_8 (0x0F00U) /* x8 */
/*
Oscillation Stop Detection Control Register (OSTDCR)
*/
/* Oscillation Stop Detection Interrupt Enable (OSTDIE) */
#define _00_CGC_OSC_STOP_INT_DISABLE (0x00U) /* The oscillation stop detection interrupt is disabled */
#define _01_CGC_OSC_STOP_INT_ENABLE (0x01U) /* The oscillation stop detection interrupt is enabled */
/* Oscillation Stop Detection Function Enable (OSTDE) */
#define _00_CGC_OSC_STOP_DISABLE (0x00U) /* Oscillation stop detection function is disabled */
#define _80_CGC_OSC_STOP_ENABLE (0x80U) /* Oscillation stop detection function is enabled */
/*
Main Clock Oscillator Wait Control Register (MOSCWTCR)
*/
/* Main Clock Oscillator Wait Time (MSTS[4:0]) */
#define _00_CGC_OSC_WAIT_CYCLE_2 (0x00U) /* Wait time = 2 cycles */
#define _01_CGC_OSC_WAIT_CYCLE_1024 (0x01U) /* Wait time = 1024 cycles */
#define _02_CGC_OSC_WAIT_CYCLE_2048 (0x02U) /* Wait time = 2048 cycles */
#define _03_CGC_OSC_WAIT_CYCLE_4096 (0x03U) /* Wait time = 4096 cycles */
#define _04_CGC_OSC_WAIT_CYCLE_8192 (0x04U) /* Wait time = 8192 cycles */
#define _05_CGC_OSC_WAIT_CYCLE_16384 (0x05U) /* Wait time = 16384 cycles */
#define _06_CGC_OSC_WAIT_CYCLE_32768 (0x06U) /* Wait time = 32768 cycles */
#define _07_CGC_OSC_WAIT_CYCLE_65536 (0x07U) /* Wait time = 65536 cycles */
/*
HOCO Wait Control Register (HOCOWTCR)
*/
/* HOCO Wait Time (HOCOWTCR) */
#define _05_CGC_HOCO_WAIT_CYCLE_138 (0x05U) /* Wait time = 138 cycles (34.5us) */
#define _06_CGC_HOCO_WAIT_CYCLE_266 (0x06U) /* Wait time = 266 cycles (66.5us) */
/*
Clock Output Control Register (CKOCR)
*/
/* Clock Output Source Select (CKOSEL[2:0]) */
#define _0000_CGC_CLKOUT_LOCO (0x0000U) /* LOCO */
#define _0100_CGC_CLKOUT_HOCO (0x0100U) /* HOCO */
#define _0200_CGC_CLKOUT_MAINCLK (0x0200U) /* Main clock oscillator */
#define _0300_CGC_CLKOUT_SUBCLK (0x0300U) /* Sub-clock oscillator */
/* Clock Output Division Ratio Select (CKODIV[2:0]) */
#define _0000_CGC_CLKOUT_DIV_1 (0x0000U) /* x1 */
#define _1000_CGC_CLKOUT_DIV_2 (0x1000U) /* x1/2 */
#define _2000_CGC_CLKOUT_DIV_4 (0x2000U) /* x1/4 */
#define _3000_CGC_CLKOUT_DIV_8 (0x3000U) /* x1/8 */
#define _4000_CGC_CLKOUT_DIV_16 (0x4000U) /* x1/16 */
/* Clock Output Control (CKOSTP) */
#define _0000_CGC_CLKOUT_ENABLE (0x0000U) /* CLKOUT pin output is operating */
#define _8000_CGC_CLKOUT_DISABLE (0x8000U) /* CLKOUT pin output is stopped (fixed at low level) */
/*
Main Clock Oscillator Forced Oscillation Control Register (MOFCR)
*/
/* Main Oscillator Drive Capability Switch (MODRV21) */
#define _00_CGC_MAINOSC_UNDER10M (0x00U) /* 1 MHz to 10 MHz */
#define _20_CGC_MAINOSC_OVER10M (0x20U) /* 10 MHz to 20 MHz */
/* Main Clock Oscillator Switch (MOSEL) */
#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */
#define _40_CGC_MAINOSC_EXTERNAL (0x40U) /* External oscillator input */
/*
LCD Source Clock Control Register (LCDSCLKCR)
*/
/* LCD Source Clock Select (LCDSCLKSEL[2:0]) */
#define _00_CGC_LCDSCLKSEL_LOCO (0x00U) /* LOCO */
#define _01_CGC_LCDSCLKSEL_HOCO (0x01U) /* HOCO */
#define _02_CGC_LCDSCLKSEL_MAINCLK (0x02U) /* Main clock oscillator */
#define _03_CGC_LCDSCLKSEL_SUBCLK (0x03U) /* Sub-clock oscillator */
#define _04_CGC_LCDSCLKSEL_IWDT (0x04U) /* IWDT-dedicated on-chip oscillator */
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
#define _007B_CGC_SUBSTPWT_WAIT (0x007BU) /* Wait time for 5 sub clock cycles */
#define _00061A81_CGC_SUBOSCWT_WAIT (0x00061A81U) /* Wait time for sub clock stable */
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void R_CGC_Create(void);
/* Start user code for function. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#endif

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_cgc_user.c
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : This file implements device driver for CGC module.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_cgc.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_hardware_setup.c
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : This file implements system initializing function.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_cgc.h"
#include "r_cg_port.h"
#include "r_cg_sci.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: R_Systeminit
* Description : This function initializes every macro.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_Systeminit(void)
{
/* Enable writing to registers related to operating modes, LPC, CGC and software reset */
SYSTEM.PRCR.WORD = 0xA50FU;
/* Enable writing to MPC pin function control registers */
MPC.PWPR.BIT.B0WI = 0U;
MPC.PWPR.BIT.PFSWE = 1U;
/* Initialize non-existent pins */
PORT0.PDR.BYTE = 0x6BU;
PORT3.PDR.BYTE = 0xD8U;
PORT4.PDR.BYTE = 0xA0U;
PORT5.PDR.BYTE = 0x80U;
PORT9.PDR.BYTE = 0xF8U;
PORTD.PDR.BYTE = 0xE0U;
PORTF.PDR.BYTE = 0x3FU;
PORTJ.PDR.BYTE = 0x32U;
/* Set peripheral settings */
R_CGC_Create();
R_PORT_Create();
R_SCI1_Create();
/* Disable writing to MPC pin function control registers */
MPC.PWPR.BIT.PFSWE = 0U;
MPC.PWPR.BIT.B0WI = 1U;
/* Enable protection */
SYSTEM.PRCR.WORD = 0xA500U;
}
/***********************************************************************************************************************
* Function Name: HardwareSetup
* Description : This function initializes hardware setting.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void HardwareSetup(void)
{
R_Systeminit();
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_macrodriver.h
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : This file implements general head file.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
#ifndef MODULEID_H
#define MODULEID_H
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "../iodefine.h"
//_RB_#include <machine.h>
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
#ifndef __TYPEDEF__
/* Status list definition */
#define MD_STATUSBASE (0x00U)
#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */
#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */
#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */
#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */
#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */
/* Error list definition */
#define MD_ERRORBASE (0x80U)
#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */
#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error argument input error */
#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */
#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */
#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */
#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */
#define MD_ERROR5 (MD_ERRORBASE + 0x06U) /* error 5 */
/* BRK handler command options */
typedef enum {
BRK_NO_COMMAND,
BRK_ALL_MODULE_CLOCK_STOP,
BRK_SLEEP,
BRK_DEEP_SLEEP,
BRK_STANDBY,
BRK_LOAD_FINTV_REGISTER
} brk_commands;
#endif
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
#ifndef __TYPEDEF__
#if !defined( _STD_USING_INT_TYPES ) && !defined( _STDINT )
#define _SYS_INT_TYPES_H
#ifndef _STD_USING_BIT_TYPES
#ifndef __int8_t_defined
#define __int8_t_defined
#endif
typedef signed char int8_t;
typedef signed short int16_t;
#endif
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef signed long int32_t;
typedef unsigned long uint32_t;
typedef signed char int_least8_t;
typedef signed short int_least16_t;
typedef signed long int_least32_t;
typedef unsigned char uint_least8_t;
typedef unsigned short uint_least16_t;
typedef unsigned long uint_least32_t;
#endif
typedef unsigned short MD_STATUS;
#define __TYPEDEF__
#endif
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void HardwareSetup(void);
void R_Systeminit(void);
#endif

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_port.c
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : This file implements device driver for Port module.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_port.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: R_PORT_Create
* Description : This function initializes the Port I/O.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_PORT_Create(void)
{
PORT2.PDR.BYTE = _04_Pm2_MODE_OUTPUT | _08_Pm3_MODE_OUTPUT | _10_Pm4_MODE_OUTPUT | _20_Pm5_MODE_OUTPUT |
_00_Pm7_MODE_INPUT;
PORT3.PDR.BYTE = _00_Pm2_MODE_INPUT | _D8_PDR3_DEFAULT;
PORTJ.PDR.BYTE = _00_Pm0_MODE_INPUT | _32_PDRJ_DEFAULT;
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_port.h
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : This file implements device driver for Port module.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
#ifndef PORT_H
#define PORT_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/*
Port Direction Register (PDR)
*/
/* Pmn Direction Control (B7 - B0) */
#define _00_Pm0_MODE_NOT_USED (0x00U) /* Pm0 not used */
#define _00_Pm0_MODE_INPUT (0x00U) /* Pm0 as input */
#define _01_Pm0_MODE_OUTPUT (0x01U) /* Pm0 as output */
#define _00_Pm1_MODE_NOT_USED (0x00U) /* Pm1 not used */
#define _00_Pm1_MODE_INPUT (0x00U) /* Pm1 as input */
#define _02_Pm1_MODE_OUTPUT (0x02U) /* Pm1 as output */
#define _00_Pm2_MODE_NOT_USED (0x00U) /* Pm2 not used */
#define _00_Pm2_MODE_INPUT (0x00U) /* Pm2 as input */
#define _04_Pm2_MODE_OUTPUT (0x04U) /* Pm2 as output */
#define _00_Pm3_MODE_NOT_USED (0x00U) /* Pm3 not used */
#define _00_Pm3_MODE_INPUT (0x00U) /* Pm3 as input */
#define _08_Pm3_MODE_OUTPUT (0x08U) /* Pm3 as output */
#define _00_Pm4_MODE_NOT_USED (0x00U) /* Pm4 not used */
#define _00_Pm4_MODE_INPUT (0x00U) /* Pm4 as input */
#define _10_Pm4_MODE_OUTPUT (0x10U) /* Pm4 as output */
#define _00_Pm5_MODE_NOT_USED (0x00U) /* Pm5 not used */
#define _00_Pm5_MODE_INPUT (0x00U) /* Pm5 as input */
#define _20_Pm5_MODE_OUTPUT (0x20U) /* Pm5 as output */
#define _00_Pm6_MODE_NOT_USED (0x00U) /* Pm6 not used */
#define _00_Pm6_MODE_INPUT (0x00U) /* Pm6 as input */
#define _40_Pm6_MODE_OUTPUT (0x40U) /* Pm6 as output */
#define _00_Pm7_MODE_NOT_USED (0x00U) /* Pm7 not used */
#define _00_Pm7_MODE_INPUT (0x00U) /* Pm7 as input */
#define _80_Pm7_MODE_OUTPUT (0x80U) /* Pm7 as output */
/*
Port Output Data Register (PODR)
*/
/* Pmn Output Data Store (B7 - B0) */
#define _00_Pm0_OUTPUT_0 (0x00U) /* output low at B0 */
#define _01_Pm0_OUTPUT_1 (0x01U) /* output high at B0 */
#define _00_Pm1_OUTPUT_0 (0x00U) /* output low at B1 */
#define _02_Pm1_OUTPUT_1 (0x02U) /* output high at B1 */
#define _00_Pm2_OUTPUT_0 (0x00U) /* output low at B2 */
#define _04_Pm2_OUTPUT_1 (0x04U) /* output high at B2 */
#define _00_Pm3_OUTPUT_0 (0x00U) /* output low at B3 */
#define _08_Pm3_OUTPUT_1 (0x08U) /* output high at B3 */
#define _00_Pm4_OUTPUT_0 (0x00U) /* output low at B4 */
#define _10_Pm4_OUTPUT_1 (0x10U) /* output high at B4 */
#define _00_Pm5_OUTPUT_0 (0x00U) /* output low at B5 */
#define _20_Pm5_OUTPUT_1 (0x20U) /* output high at B5 */
#define _00_Pm6_OUTPUT_0 (0x00U) /* output low at B6 */
#define _40_Pm6_OUTPUT_1 (0x40U) /* output high at B6 */
#define _00_Pm7_OUTPUT_0 (0x00U) /* output low at B7 */
#define _80_Pm7_OUTPUT_1 (0x80U) /* output high at B7 */
/*
Open Drain Control Register 0 (ODR0)
*/
/* Pmn Output Type Select (Pm0 to Pm3) */
#define _00_Pm0_CMOS_OUTPUT (0x00U) /* CMOS output */
#define _01_Pm0_NCH_OPEN_DRAIN (0x01U) /* N-channel open-drain output */
#define _02_Pm0_PCH_OPEN_DRAIN (0x02U) /* P-channel open-drain output */
#define _00_Pm1_CMOS_OUTPUT (0x00U) /* CMOS output */
#define _04_Pm1_NCH_OPEN_DRAIN (0x04U) /* N-channel open-drain output */
#define _08_Pm1_PCH_OPEN_DRAIN (0x08U) /* P-channel open-drain output */
#define _00_Pm2_CMOS_OUTPUT (0x00U) /* CMOS output */
#define _10_Pm2_NCH_OPEN_DRAIN (0x10U) /* N-channel open-drain output */
#define _20_Pm2_PCH_OPEN_DRAIN (0x20U) /* P-channel open-drain output */
#define _00_Pm3_CMOS_OUTPUT (0x00U) /* CMOS output */
#define _40_Pm3_NCH_OPEN_DRAIN (0x40U) /* N-channel open-drain output */
#define _80_Pm3_PCH_OPEN_DRAIN (0x80U) /* P-channel open-drain output */
/*
Open Drain Control Register 1 (ODR1)
*/
/* Pmn Output Type Select (Pm4 to Pm7) */
#define _00_Pm4_CMOS_OUTPUT (0x00U) /* CMOS output */
#define _01_Pm4_NCH_OPEN_DRAIN (0x01U) /* N-channel open-drain output */
#define _02_Pm4_PCH_OPEN_DRAIN (0x02U) /* P-channel open-drain output */
#define _00_Pm5_CMOS_OUTPUT (0x00U) /* CMOS output */
#define _04_Pm5_NCH_OPEN_DRAIN (0x04U) /* N-channel open-drain output */
#define _08_Pm5_PCH_OPEN_DRAIN (0x08U) /* P-channel open-drain output */
#define _00_Pm6_CMOS_OUTPUT (0x00U) /* CMOS output */
#define _10_Pm6_NCH_OPEN_DRAIN (0x10U) /* N-channel open-drain output */
#define _20_Pm6_PCH_OPEN_DRAIN (0x20U) /* P-channel open-drain output */
#define _00_Pm7_CMOS_OUTPUT (0x00U) /* CMOS output */
#define _40_Pm7_NCH_OPEN_DRAIN (0x40U) /* N-channel open-drain output */
#define _80_Pm7_PCH_OPEN_DRAIN (0x80U) /* P-channel open-drain output */
/*
Pull-Up Control Register (PCR)
*/
/* Pm0 Input Pull-Up Resistor Control ((B7 - B0)) */
#define _00_Pm0_PULLUP_OFF (0x00U) /* Pn0 pull-up resistor not connected */
#define _01_Pm0_PULLUP_ON (0x01U) /* Pn0 pull-up resistor connected */
#define _00_Pm1_PULLUP_OFF (0x00U) /* Pn1 pull-up resistor not connected */
#define _02_Pm1_PULLUP_ON (0x02U) /* Pn1 pull-up resistor connected */
#define _00_Pm2_PULLUP_OFF (0x00U) /* Pn2 Pull-up resistor not connected */
#define _04_Pm2_PULLUP_ON (0x04U) /* Pn2 pull-up resistor connected */
#define _00_Pm3_PULLUP_OFF (0x00U) /* Pn3 pull-up resistor not connected */
#define _08_Pm3_PULLUP_ON (0x08U) /* Pn3 pull-up resistor connected */
#define _00_Pm4_PULLUP_OFF (0x00U) /* Pn4 pull-up resistor not connected */
#define _10_Pm4_PULLUP_ON (0x10U) /* Pn4 pull-up resistor connected */
#define _00_Pm5_PULLUP_OFF (0x00U) /* Pn5 pull-up resistor not connected */
#define _20_Pm5_PULLUP_ON (0x20U) /* Pn5 pull-up resistor connected */
#define _00_Pm6_PULLUP_OFF (0x00U) /* Pn6 pull-up resistor not connected */
#define _40_Pm6_PULLUP_ON (0x40U) /* Pn6 pull-up resistor connected */
#define _00_Pm7_PULLUP_OFF (0x00U) /* Pn7 pull-up resistor not connected */
#define _80_Pm7_PULLUP_ON (0x80U) /* Pn7 pull-up resistor connected */
/*
Port Switching Register A (PSRA)
*/
/* PB6/PC0 Switching (PSEL6) */
#define _00_PORT_PSEL6_PB6 (0x00U) /* PB6 general I/O port function is selected */
#define _40_PORT_PSEL6_PC0 (0x40U) /* PC0 general I/O port function is selected */
/* PB7/PC1 Switching (PSEL7) */
#define _00_PORT_PSEL7_PB7 (0x00U) /* PB7 general I/O port function is selected */
#define _80_PORT_PSEL7_PC1 (0x80U) /* PC1 general I/O port function is selected */
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
#define _6B_PDR0_DEFAULT (0x6BU) /* PDR0 default value */
#define _D8_PDR3_DEFAULT (0xD8U) /* PDR3 default value */
#define _A0_PDR4_DEFAULT (0xA0U) /* PDR4 default value */
#define _80_PDR5_DEFAULT (0x80U) /* PDR5 default value */
#define _F8_PDR9_DEFAULT (0xF8U) /* PDR9 default value */
#define _E0_PDRD_DEFAULT (0xE0U) /* PDRD default value */
#define _3F_PDRF_DEFAULT (0x3FU) /* PDRF default value */
#define _32_PDRJ_DEFAULT (0x32U) /* PDRJ default value */
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void R_PORT_Create(void);
/* Start user code for function. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#endif

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_port_user.c
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : This file implements device driver for Port module.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_port.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_sbrk.c
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : Program of sbrk.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include <stddef.h>
#include <stdio.h>
#include "r_cg_sbrk.h"
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
int8_t *sbrk(size_t size);
extern int8_t *_s1ptr;
union HEAP_TYPE
{
int16_t dummy ; /* Dummy for 4-byte boundary */
int8_t heap[HEAPSIZE]; /* Declaration of the area managed by sbrk */
};
static union HEAP_TYPE heap_area ;
/* End address allocated by sbrk */
static int8_t *brk = (int8_t *) &heap_area;
/**************************************************************************/
/* sbrk:Memory area allocation */
/* Return value:Start address of allocated area (Pass) */
/* -1 (Failure) */
/**************************************************************************/
int8_t *sbrk(size_t size) /* Assigned area size */
{
int8_t *p;
if (brk+size > heap_area.heap + HEAPSIZE) /* Empty area size */
{
p = (int8_t *)-1;
}
else
{
p = brk; /* Area assignment */
brk += size; /* End address update */
}
return p;
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_sbrk.h
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : Header file of sbrk file.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
#ifndef _SBRK_H
#define _SBRK_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
#define HEAPSIZE (0x400U) /* Size of area managed by sbrk */
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
#endif

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_sci.c
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : This file implements device driver for SCI module.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_sci.h"
/* Start user code for include. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
uint8_t * gp_sci1_tx_address; /* SCI1 transmit buffer address */
uint16_t g_sci1_tx_count; /* SCI1 transmit data number */
uint8_t * gp_sci1_rx_address; /* SCI1 receive buffer address */
uint16_t g_sci1_rx_count; /* SCI1 receive data number */
uint16_t g_sci1_rx_length; /* SCI1 receive data length */
/* Start user code for global. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: R_SCI1_Create
* Description : This function initializes the SCI1.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_SCI1_Create(void)
{
/* Cancel SCI1 module stop state */
MSTP(SCI1) = 0U;
/* Set interrupt priority */
IPR(SCI1, ERI1) = _0F_SCI_PRIORITY_LEVEL15;
/* Clear the SCR.TIE, RIE, TE, RE and TEIE bits */
SCI1.SCR.BIT.TIE = 0U;
SCI1.SCR.BIT.RIE = 0U;
SCI1.SCR.BIT.TE = 0U;
SCI1.SCR.BIT.RE = 0U;
SCI1.SCR.BIT.TEIE = 0U;
/* Set RXD1 pin */
MPC.P15PFS.BYTE = 0x0AU;
PORT1.PMR.BYTE |= 0x20U;
/* Set TXD1 pin */
MPC.P16PFS.BYTE = 0x0AU;
PORT1.PODR.BYTE |= 0x40U;
PORT1.PDR.BYTE |= 0x40U;
PORT1.PMR.BYTE |= 0x40U;
/* Set clock enable */
SCI1.SCR.BYTE = _00_SCI_INTERNAL_SCK_UNUSED;
/* Clear the SIMR1.IICM, SPMR.CKPH, and CKPOL bit */
SCI1.SIMR1.BIT.IICM = 0U;
SCI1.SPMR.BYTE = _00_SCI_RTS | _00_SCI_CLOCK_NOT_INVERTED | _00_SCI_CLOCK_NOT_DELAYED;
/* Set control registers */
SCI1.SMR.BYTE = _01_SCI_CLOCK_PCLK_4 | _00_SCI_STOP_1 | _00_SCI_PARITY_EVEN | _00_SCI_PARITY_DISABLE |
_00_SCI_DATA_LENGTH_8 | _00_SCI_MULTI_PROCESSOR_DISABLE | _00_SCI_ASYNCHRONOUS_MODE;
SCI1.SCMR.BYTE = _00_SCI_SERIAL_MODE | _00_SCI_DATA_INVERT_NONE | _00_SCI_DATA_LSB_FIRST | _72_SCI_SCMR_DEFAULT;
/* Set SEMR, SNFR */
SCI1.SEMR.BYTE = _00_SCI_LOW_LEVEL_START_BIT | _00_SCI_NOISE_FILTER_DISABLE | _10_SCI_8_BASE_CLOCK;
/* Set bitrate */
SCI1.BRR = 0x19U;
}
/***********************************************************************************************************************
* Function Name: R_SCI1_Start
* Description : This function starts the SCI1.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_SCI1_Start(void)
{
IR(SCI1,TXI1) = 0U;
IR(SCI1,TEI1) = 0U;
IR(SCI1,RXI1) = 0U;
IR(SCI1,ERI1) = 0U;
IEN(SCI1,TXI1) = 1U;
IEN(SCI1,TEI1) = 1U;
IEN(SCI1,RXI1) = 1U;
IEN(SCI1,ERI1) = 1U;
}
/***********************************************************************************************************************
* Function Name: R_SCI1_Stop
* Description : This function stops the SCI1.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void R_SCI1_Stop(void)
{
/* Set TXD1 pin */
PORT1.PMR.BYTE &= 0xBFU;
SCI1.SCR.BYTE &= 0xCF; /* Disable serial transmit and receive */
SCI1.SCR.BIT.TIE = 0U; /* Disable TXI interrupt */
SCI1.SCR.BIT.RIE = 0U; /* Disable RXI and ERI interrupt */
IR(SCI1,TXI1) = 0U;
IEN(SCI1,TXI1) = 0U;
IR(SCI1,TEI1) = 0U;
IEN(SCI1,TEI1) = 0U;
IR(SCI1,RXI1) = 0U;
IEN(SCI1,RXI1) = 0U;
IR(SCI1,ERI1) = 0U;
IEN(SCI1,ERI1) = 0U;
}
/***********************************************************************************************************************
* Function Name: R_SCI1_Serial_Receive
* Description : This function receives SCI1 data.
* Arguments : rx_buf -
* receive buffer pointer (Not used when receive data handled by DTC)
* rx_num -
* buffer size
* Return Value : status -
* MD_OK or MD_ARGERROR
***********************************************************************************************************************/
MD_STATUS R_SCI1_Serial_Receive(uint8_t * const rx_buf, uint16_t rx_num)
{
MD_STATUS status = MD_OK;
if (rx_num < 1U)
{
status = MD_ARGERROR;
}
else
{
g_sci1_rx_count = 0U;
g_sci1_rx_length = rx_num;
gp_sci1_rx_address = rx_buf;
SCI1.SCR.BIT.RIE = 1U;
SCI1.SCR.BIT.RE = 1U;
}
return (status);
}
/***********************************************************************************************************************
* Function Name: R_SCI1_Serial_Send
* Description : This function transmits SCI1 data.
* Arguments : tx_buf -
* transfer buffer pointer (Not used when transmit data handled by DTC)
* tx_num -
* buffer size
* Return Value : status -
* MD_OK or MD_ARGERROR
***********************************************************************************************************************/
MD_STATUS R_SCI1_Serial_Send(uint8_t * const tx_buf, uint16_t tx_num)
{
MD_STATUS status = MD_OK;
if (tx_num < 1U)
{
status = MD_ARGERROR;
}
else
{
gp_sci1_tx_address = tx_buf;
g_sci1_tx_count = tx_num;
/* Set TXD1 pin */
PORT1.PMR.BYTE |= 0x40U;
SCI1.SCR.BIT.TIE = 1U;
SCI1.SCR.BIT.TE = 1U;
}
return (status);
}
/* Start user code for adding. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_sci.h
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : This file implements device driver for SCI module.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
#ifndef SCI_H
#define SCI_H
/***********************************************************************************************************************
Macro definitions (Register bit)
***********************************************************************************************************************/
/*
Serial mode register (SMR)
*/
/* Clock select (CKS) */
#define _00_SCI_CLOCK_PCLK (0x00U) /* PCLK */
#define _01_SCI_CLOCK_PCLK_4 (0x01U) /* PCLK/4 */
#define _02_SCI_CLOCK_PCLK_16 (0x02U) /* PCLK/16 */
#define _03_SCI_CLOCK_PCLK_64 (0x03U) /* PCLK/64 */
/* Multi-processor Mode (MP) */
#define _00_SCI_MULTI_PROCESSOR_DISABLE (0x00U) /* Disable multiprocessor mode */
#define _04_SCI_MULTI_PROCESSOR_ENABLE (0x04U) /* Enable multiprocessor mode */
/* Stop bit length (STOP) */
#define _00_SCI_STOP_1 (0x00U) /* 1 stop bit length */
#define _08_SCI_STOP_2 (0x08U) /* 2 stop bits length */
/* Parity mode (PM) */
#define _00_SCI_PARITY_EVEN (0x00U) /* Parity even */
#define _10_SCI_PARITY_ODD (0x10U) /* Parity odd */
/* Parity enable (PE) */
#define _00_SCI_PARITY_DISABLE (0x00U) /* Parity disable */
#define _20_SCI_PARITY_ENABLE (0x20U) /* Parity enable */
/* Character length (CHR) */
#define _00_SCI_DATA_LENGTH_8 (0x00U) /* Data length 8 bits */
#define _40_SCI_DATA_LENGTH_7 (0x40U) /* Data length 7 bits */
/* Communications mode (CM) */
#define _00_SCI_ASYNCHRONOUS_MODE (0x00U) /* Asynchronous mode */
#define _80_SCI_CLOCK_SYNCHRONOUS_MODE (0x80U) /* Clock synchronous mode */
/* Base clock pulse (BCP) */
#define _00_SCI_32_93_CLOCK_CYCLES (0x00U) /* 32 or 93 clock cycles */
#define _04_SCI_64_128_CLOCK_CYCLES (0x04U) /* 64 or 128 clock cycles */
#define _08_SCI_186_372_CLOCK_CYCLES (0x08U) /* 186 or 372 clock cycles */
#define _0C_SCI_256_512_CLOCK_CYCLES (0x0CU) /* 256 or 512 clock cycles */
/* Block transfer mode (BLK) */
#define _00_SCI_BLK_TRANSFER_DISABLE (0x00U) /* Block transfer disable */
#define _40_SCI_BLK_TRANSFER_ENABLE (0x40U) /* Block transfer enable */
/* GSM mode (GSM) */
#define _00_SCI_GSM_DISABLE (0x00U) /* Normal mode operation */
#define _80_SCI_GSM_ENABLE (0x80U) /* GSM mode operation */
/*
Serial control register (SCR)
*/
/* Clock enable (CKE) */
#define _00_SCI_INTERNAL_SCK_UNUSED (0x00U) /* Internal clock selected, SCK pin unused */
#define _01_SCI_INTERNAL_SCK_OUTPUT (0x01U) /* Internal clock selected, SCK pin as clock output */
#define _02_SCI_EXTERNAL (0x02U) /* External clock selected */
#define _03_SCI_EXTERNAL (0x03U) /* External clock selected */
/* Transmit end interrupt enable (TEIE) */
#define _00_SCI_TEI_INTERRUPT_DISABLE (0x00U) /* TEI interrupt request disable */
#define _04_SCI_TEI_INTERRUPT_ENABLE (0x04U) /* TEI interrupt request enable */
/* Multi-processor interrupt enable (MPIE) */
#define _00_SCI_MP_INTERRUPT_NORMAL (0x00U) /* Normal reception */
#define _08_SCI_MP_INTERRUPT_SPECIAL (0x08U) /* Multi-processor ID reception */
/* Receive enable (RE) */
#define _00_SCI_RECEIVE_DISABLE (0x00U) /* Disable receive mode */
#define _10_SCI_RECEIVE_ENABLE (0x10U) /* Enable receive mode */
/* Transmit enable (TE) */
#define _00_SCI_TRANSMIT_DISABLE (0x00U) /* Disable transmit mode */
#define _20_SCI_TRANSMIT_ENABLE (0x20U) /* Enable transmit mode */
/* Receive interrupt enable (RIE) */
#define _00_SCI_RXI_ERI_DISABLE (0x00U) /* Disable RXI and ERI interrupt requests */
#define _40_SCI_RXI_ERI_ENABLE (0x40U) /* Enable RXI and ERI interrupt requests */
/* Transmit interrupt enable (TIE) */
#define _00_SCI_TXI_DISABLE (0x00U) /* Disable TXI interrupt requests */
#define _80_SCI_TXI_ENABLE (0x80U) /* Enable TXI interrupt requests */
/*
Serial status register (SSR)
*/
/* Multi-Processor bit transfer (MPBT) */
#define _00_SCI_SET_DATA_TRANSFER (0x00U) /* Set data transmission cycles */
#define _01_SCI_SET_ID_TRANSFER (0x01U) /* Set ID transmission cycles */
/* Multi-Processor (MPB) */
#define _00_SCI_DATA_TRANSFER (0x00U) /* In data transmission cycles */
#define _02_SCI_ID_TRANSFER (0x02U) /* In ID transmission cycles */
/* Transmit end flag (TEND) */
#define _00_SCI_TRANSMITTING (0x00U) /* A character is being transmitted */
#define _04_SCI_TRANSMIT_COMPLETE (0x04U) /* Character transfer has been completed */
/* Parity error flag (PER) */
#define _08_SCI_PARITY_ERROR (0x08U) /* A parity error has occurred */
/* Framing error flag (FER) */
#define _10_SCI_FRAME_ERROR (0x10U) /* A framing error has occurred */
/* Overrun error flag (ORER) */
#define _20_SCI_OVERRUN_ERROR (0x20U) /* An overrun error has occurred */
/*
Smart card mode register (SCMR)
*/
/* Smart card interface mode select (SMIF) */
#define _00_SCI_SERIAL_MODE (0x00U) /* Serial communications interface mode */
#define _01_SCI_SMART_CARD_MODE (0x01U) /* Smart card interface mode */
/* Transmitted / received data invert (SINV) */
#define _00_SCI_DATA_INVERT_NONE (0x00U) /* Data is not inverted */
#define _04_SCI_DATA_INVERTED (0x04U) /* Data is inverted */
/* Transmitted / received data transfer direction (SDIR) */
#define _00_SCI_DATA_LSB_FIRST (0x00U) /* Transfer data LSB first */
#define _08_SCI_DATA_MSB_FIRST (0x08U) /* Transfer data MSB first */
/* Base clock pulse 2 (BCP2) */
#define _00_SCI_93_128_186_512_CLK (0x00U) /* 93, 128, 186, or 512 clock cycles */
#define _80_SCI_32_64_256_372_CLK (0x80U) /* 32, 64, 256, or 372 clock cycles */
#define _72_SCI_SCMR_DEFAULT (0x72U) /* Write default value of SCMR */
/*
Serial extended mode register (SEMR)
*/
/* Asynchronous Mode Clock Source Select (ACS0) */
#define _00_SCI_ASYNC_SOURCE_EXTERNAL (0x00U) /* External clock input */
#define _01_SCI_ASYNC_SOURCE_TMR (0x01U) /* Logical AND of two clock cycles output from TMR */
/* Asynchronous mode base clock select (ABCS) */
#define _00_SCI_16_BASE_CLOCK (0x00U) /* Selects 16 base clock cycles for 1 bit period */
#define _10_SCI_8_BASE_CLOCK (0x10U) /* Selects 8 base clock cycles for 1 bit period */
/* Digital noise filter function enable (NFEN) */
#define _00_SCI_NOISE_FILTER_DISABLE (0x00U) /* Noise filter is disabled */
#define _20_SCI_NOISE_FILTER_ENABLE (0x20U) /* Noise filter is enabled */
/* Asynchronous start bit edge detections select (RXDESEL) */
#define _00_SCI_LOW_LEVEL_START_BIT (0x00U) /* Low level on RXDn pin selected as start bit */
#define _80_SCI_FALLING_EDGE_START_BIT (0x80U) /* Falling edge on RXDn pin selected as start bit */
/*
Noise filter setting register (SNFR)
*/
/* Noise filter clock select (NFCS) */
#define _00_SCI_ASYNC_DIV_1 (0x00U) /* Clock signal divided by 1 is used with the noise filter */
#define _01_SCI_IIC_DIV_1 (0x01U) /* Clock signal divided by 1 is used with the noise filter */
#define _02_SCI_IIC_DIV_2 (0x02U) /* Clock signal divided by 2 is used with the noise filter */
#define _03_SCI_IIC_DIV_4 (0x03U) /* Clock signal divided by 4 is used with the noise filter */
#define _04_SCI_IIC_DIV_8 (0x04U) /* Clock signal divided by 8 is used with the noise filter */
/*
I2C mode register 1 (SIMR1)
*/
/* Simple IIC mode select (IICM) */
#define _00_SCI_SERIAL_SMART_CARD_MODE (0x00U) /* Serial or smart card mode */
#define _01_SCI_IIC_MODE (0x01U) /* Simple IIC mode */
/*
I2C mode register 2 (SIMR2)
*/
/* IIC interrupt mode select (IICINTM) */
#define _00_SCI_ACK_NACK_INTERRUPTS (0x00U) /* Use ACK/NACK interrupts */
#define _01_SCI_RX_TX_INTERRUPTS (0x01U) /* Use reception/transmission interrupts */
/* Clock synchronization (IICCSC) */
#define _00_SCI_NO_SYNCHRONIZATION (0x00U) /* No synchronization with the clock signal */
#define _02_SCI_SYNCHRONIZATION (0x02U) /* Synchronization with the clock signal */
/* ACK transmission data (IICACKT) */
#define _00_SCI_ACK_TRANSMISSION (0x00U) /* ACK transmission */
#define _20_SCI_NACK_TRANSMISSION (0x20U) /* NACK transmission and reception of ACK/NACK */
/*
I2C mode register 3 (SIMR3)
*/
/* Start condition generation (IICSTAREQ) */
#define _00_SCI_START_CONDITION_OFF (0x00U) /* Start condition is not generated */
#define _01_SCI_START_CONDITION_ON (0x01U) /* Start condition is generated */
/* Restart condition generation (IICRSTAREQ) */
#define _00_SCI_RESTART_CONDITION_OFF (0x00U) /* Restart condition is not generated */
#define _02_SCI_RESTART_CONDITION_ON (0x02U) /* Restart condition is generated */
/* Stop condition generation (IICSTPREQ) */
#define _00_SCI_STOP_CONDITION_OFF (0x00U) /* Stop condition is not generated */
#define _04_SCI_STOP_CONDITION_ON (0x04U) /* Stop condition is generated */
/* Issuing of start, restart, or sstop condition completed flag (IICSTIF) */
#define _00_SCI_CONDITION_GENERATED (0x00U) /* No requests to generate conditions/conditions generated */
#define _08_SCI_GENERATION_COMPLETED (0x08U) /* All request generation has been completed */
/* SSDA output select (IICSDAS) */
#define _00_SCI_SSDA_DATA_OUTPUT (0x00U) /* SSDA output is serial data output */
#define _10_SCI_SSDA_START_RESTART_STOP_CONDITION (0x10U) /* SSDA output generates start, restart or stop condition */
#define _20_SCI_SSDA_LOW_LEVEL (0x20U) /* SSDA output low level */
#define _30_SCI_SSDA_HIGH_IMPEDANCE (0x30U) /* SSDA output high impedance */
/* SSCL output select (IICSCLS) */
#define _00_SCI_SSCL_CLOCK_OUTPUT (0x00U) /* SSCL output is serial clock output */
#define _40_SCI_SSCL_START_RESTART_STOP_CONDITION (0x40U) /* SSCL output generates start, restart or stop condition */
#define _80_SCI_SSCL_LOW_LEVEL (0x80U) /* SSCL output low level */
#define _C0_SCI_SSCL_HIGH_IMPEDANCE (0xC0U) /* SSCL output high impedance */
/*
I2C status register (SISR)
*/
/* ACK reception data flag (IICACKR) */
#define _00_SCI_ACK_RECEIVED (0x00U) /* ACK received */
#define _01_SCI_NACK_RECEIVED (0x01U) /* NACK received */
/*
SPI mode register (SPMR)
*/
/* SS pin function enable (SSE) */
#define _00_SCI_SS_PIN_DISABLE (0x00U) /* SS pin function disabled */
#define _01_SCI_SS_PIN_ENABLE (0x01U) /* SS pin function enabled */
/* CTS enable (CTSE) */
#define _00_SCI_RTS (0x00U) /* RTS function is enabled */
#define _02_SCI_CTS (0x02U) /* CTS function is disabled */
/* Master slave select (MSS) */
#define _00_SCI_SPI_MASTER (0x00U) /* Master mode */
#define _04_SCI_SPI_SLAVE (0x04U) /* Slave mode */
/* Mode fault flag (MFF) */
#define _00_SCI_NO_MODE_FAULT (0x00U) /* No mode fault */
#define _10_SCI_MODE_FAULT (0x10U) /* Mode fault */
/* Clock polarity select (CKPOL) */
#define _00_SCI_CLOCK_NOT_INVERTED (0x00U) /* Clock polarity is not inverted */
#define _40_SCI_CLOCK_INVERTED (0x40U) /* Clock polarity is inverted */
/* Clock phase select (CKPH) */
#define _00_SCI_CLOCK_NOT_DELAYED (0x00U) /* Clock is not delayed */
#define _80_SCI_CLOCK_DELAYED (0x80U) /* Clock is delayed */
/*
Interrupt Source Priority Register n (IPRn)
*/
/* Interrupt Priority Level Select (IPR[3:0]) */
#define _00_SCI_PRIORITY_LEVEL0 (0x00U) /* Level 0 (interrupt disabled) */
#define _01_SCI_PRIORITY_LEVEL1 (0x01U) /* Level 1 */
#define _02_SCI_PRIORITY_LEVEL2 (0x02U) /* Level 2 */
#define _03_SCI_PRIORITY_LEVEL3 (0x03U) /* Level 3 */
#define _04_SCI_PRIORITY_LEVEL4 (0x04U) /* Level 4 */
#define _05_SCI_PRIORITY_LEVEL5 (0x05U) /* Level 5 */
#define _06_SCI_PRIORITY_LEVEL6 (0x06U) /* Level 6 */
#define _07_SCI_PRIORITY_LEVEL7 (0x07U) /* Level 7 */
#define _08_SCI_PRIORITY_LEVEL8 (0x08U) /* Level 8 */
#define _09_SCI_PRIORITY_LEVEL9 (0x09U) /* Level 9 */
#define _0A_SCI_PRIORITY_LEVEL10 (0x0AU) /* Level 10 */
#define _0B_SCI_PRIORITY_LEVEL11 (0x0BU) /* Level 11 */
#define _0C_SCI_PRIORITY_LEVEL12 (0x0CU) /* Level 12 */
#define _0D_SCI_PRIORITY_LEVEL13 (0x0DU) /* Level 13 */
#define _0E_SCI_PRIORITY_LEVEL14 (0x0EU) /* Level 14 */
#define _0F_SCI_PRIORITY_LEVEL15 (0x0FU) /* Level 15 (highest) */
/*
Transfer status control value
*/
/* Simple IIC Transmit Receive Flag */
#define _80_SCI_IIC_TRANSMISSION (0x80U)
#define _00_SCI_IIC_RECEPTION (0x00U)
/* Simple IIC Start Stop Flag */
#define _80_SCI_IIC_START_CYCLE (0x80U)
#define _00_SCI_IIC_STOP_CYCLE (0x00U)
/* Multiprocessor Asynchronous Communication Flag */
#define _80_SCI_ID_TRANSMISSION_CYCLE (0x80U)
#define _00_SCI_DATA_TRANSMISSION_CYCLE (0x00U)
/***********************************************************************************************************************
Macro definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Typedef definitions
***********************************************************************************************************************/
/***********************************************************************************************************************
Global functions
***********************************************************************************************************************/
void R_SCI1_Create(void);
void R_SCI1_Start(void);
void R_SCI1_Stop(void);
MD_STATUS R_SCI1_Serial_Send(uint8_t * const tx_buf, uint16_t tx_num);
MD_STATUS R_SCI1_Serial_Receive(uint8_t * const rx_buf, uint16_t rx_num);
static void r_sci1_callback_transmitend(void);
static void r_sci1_callback_receiveend(void);
static void r_sci1_callback_receiveerror(void);
/* Start user code for function. Do not edit comment generated here */
/* Some of the code in this file is generated using "Code Generator" for e2 studio.
* Warnings exist in this module. */
/* Exported functions used to transmit a number of bytes and wait for completion */
MD_STATUS R_SCI1_AsyncTransmit (uint8_t * const tx_buf, const uint16_t tx_num);
/* Character is used to receive key presses from PC terminal */
extern uint8_t g_rx_char;
/* Flag used to control transmission to PC terminal */
extern volatile uint8_t g_tx_flag;
/* End user code. Do not edit comment generated here */
#endif

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_sci_user.c
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : This file implements device driver for SCI module.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_sci.h"
/* Start user code for include. Do not edit comment generated here */
#include "rskrx113def.h"
//_RB_#include "r_cg_cmt.h"
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
extern uint8_t * gp_sci1_tx_address; /* SCI1 send buffer address */
extern uint16_t g_sci1_tx_count; /* SCI1 send data number */
extern uint8_t * gp_sci1_rx_address; /* SCI1 receive buffer address */
extern uint16_t g_sci1_rx_count; /* SCI1 receive data number */
extern uint16_t g_sci1_rx_length; /* SCI1 receive data length */
/* Start user code for global. Do not edit comment generated here */
/* Global used to receive a character from the PC terminal */
uint8_t g_rx_char;
/* Flag used to control transmission to PC terminal */
volatile uint8_t g_tx_flag = FALSE;
/* Flag used locally to detect transmission complete */
static volatile uint8_t sci1_txdone;
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: r_sci1_transmit_interrupt
* Description : None
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
#if FAST_INTERRUPT_VECTOR == VECT_SCI1_TXI1
#pragma interrupt r_sci1_transmit_interrupt(vect=VECT(SCI1,TXI1),fint)
#else
#pragma interrupt r_sci1_transmit_interrupt(vect=VECT(SCI1,TXI1))
#endif
static void r_sci1_transmit_interrupt(void)
{
if (g_sci1_tx_count > 0U)
{
SCI1.TDR = *gp_sci1_tx_address;
gp_sci1_tx_address++;
g_sci1_tx_count--;
}
else
{
SCI1.SCR.BIT.TIE = 0U;
SCI1.SCR.BIT.TEIE = 1U;
}
}
/***********************************************************************************************************************
* Function Name: r_sci1_transmitend_interrupt
* Description : None
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
#if FAST_INTERRUPT_VECTOR == VECT_SCI1_TEI1
#pragma interrupt r_sci1_transmitend_interrupt(vect=VECT(SCI1,TEI1),fint)
#else
#pragma interrupt r_sci1_transmitend_interrupt(vect=VECT(SCI1,TEI1))
#endif
static void r_sci1_transmitend_interrupt(void)
{
/* Set TXD1 pin */
PORT1.PMR.BYTE &= 0xBFU;
SCI1.SCR.BIT.TIE = 0U;
SCI1.SCR.BIT.TE = 0U;
SCI1.SCR.BIT.TEIE = 0U;
r_sci1_callback_transmitend();
}
/***********************************************************************************************************************
* Function Name: r_sci1_receive_interrupt
* Description : None
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
#if FAST_INTERRUPT_VECTOR == VECT_SCI1_RXI1
#pragma interrupt r_sci1_receive_interrupt(vect=VECT(SCI1,RXI1),fint)
#else
#pragma interrupt r_sci1_receive_interrupt(vect=VECT(SCI1,RXI1))
#endif
static void r_sci1_receive_interrupt(void)
{
if (g_sci1_rx_length > g_sci1_rx_count)
{
*gp_sci1_rx_address = SCI1.RDR;
gp_sci1_rx_address++;
g_sci1_rx_count++;
if (g_sci1_rx_length == g_sci1_rx_count)
{
r_sci1_callback_receiveend();
}
}
}
/***********************************************************************************************************************
* Function Name: r_sci1_receiveerror_interrupt
* Description : None
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
#if FAST_INTERRUPT_VECTOR == VECT_SCI1_ERI1
#pragma interrupt r_sci1_receiveerror_interrupt(vect=VECT(SCI1,ERI1),fint)
#else
#pragma interrupt r_sci1_receiveerror_interrupt(vect=VECT(SCI1,ERI1))
#endif
static void r_sci1_receiveerror_interrupt(void)
{
uint8_t err_type;
r_sci1_callback_receiveerror();
/* Clear overrun, framing and parity error flags */
err_type = SCI1.SSR.BYTE;
SCI1.SSR.BYTE = err_type & 0xC7U;
}
/***********************************************************************************************************************
* Function Name: r_sci1_callback_transmitend
* Description : This function is a callback function when SCI1 finishes transmission.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void r_sci1_callback_transmitend(void)
{
/* Start user code. Do not edit comment generated here */
sci1_txdone = TRUE;
/* End user code. Do not edit comment generated here */
}
/***********************************************************************************************************************
* Function Name: r_sci1_callback_receiveend
* Description : This function is a callback function when SCI1 finishes reception.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void r_sci1_callback_receiveend(void)
{
/* Start user code. Do not edit comment generated here */
/* Check the contents of g_rx_char */
if ('z' == g_rx_char)
{
/* Stop the timer used to control transmission to PC terminal*/
//_RB_ R_CMT0_Stop();
/* Turn off LED0 and turn on LED1 to indicate serial transmission
inactive */
LED0 = LED_OFF;
LED1 = LED_ON;
}
else
{
/* Start the timer used to control transmission to PC terminal*/
//_RB_ R_CMT0_Start();
/* Turn on LED0 and turn off LED1 to indicate serial transmission
active */
LED0 = LED_ON;
LED1 = LED_OFF;
}
/* Set up SCI1 receive buffer again */
R_SCI1_Serial_Receive((uint8_t *) &g_rx_char, 1);
/* End user code. Do not edit comment generated here */
}
/***********************************************************************************************************************
* Function Name: r_sci1_callback_receiveerror
* Description : This function is a callback function when SCI1 reception encounters error.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void r_sci1_callback_receiveerror(void)
{
/* Start user code. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
}
/* Start user code for adding. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: R_SCI1_AsyncTransmit
* Description : This function sends SCI1 data and waits for the transmit end flag.
* Arguments : tx_buf -
* transfer buffer pointer
* tx_num -
* buffer size
* Return Value : status -
* MD_OK or MD_ARGERROR
***********************************************************************************************************************/
MD_STATUS R_SCI1_AsyncTransmit (uint8_t * const tx_buf, const uint16_t tx_num)
{
MD_STATUS status = MD_OK;
/* clear the flag before initiating a new transmission */
sci1_txdone = FALSE;
/* Send the data using the API */
status = R_SCI1_Serial_Send(tx_buf, tx_num);
/* Wait for the transmit end flag */
while (FALSE == sci1_txdone)
{
/* Wait */
}
return (status);
}
/***********************************************************************************************************************
* End of function R_SCI1_AsyncTransmit
***********************************************************************************************************************/
/* End user code. Do not edit comment generated here */

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/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_userdefine.h
* Version : Code Generator for RX113 V1.02.01.02 [28 May 2015]
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* Description : This file includes user definition.
* Creation Date: 21/09/2015
***********************************************************************************************************************/
#ifndef _USER_DEF_H
#define _USER_DEF_H
/***********************************************************************************************************************
User definitions
***********************************************************************************************************************/
#define FAST_INTERRUPT_VECTOR 0
/* Start user code for function. Do not edit comment generated here */
#define TRUE (1)
#define FALSE (0)
/* End user code. Do not edit comment generated here */
#endif

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/*
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
/******************************************************************************
* This project provides two demo applications. A simple blinky style project,
* and a more comprehensive test and demo application. The
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting (defined in this file) is used to
* select between the two. The simply blinky demo is implemented and described
* in main_blinky.c. The more comprehensive test and demo application is
* implemented and described in main_full.c.
*
* This file implements the code that is not demo specific, including the
* hardware setup, standard FreeRTOS hook functions, and the ISR hander called
* by the RTOS after interrupt entry (including nesting) has been taken care of.
*
* ENSURE TO READ THE DOCUMENTATION PAGE FOR THIS PORT AND DEMO APPLICATION ON
* THE http://www.FreeRTOS.org WEB SITE FOR FULL INFORMATION ON USING THIS DEMO
* APPLICATION, AND ITS ASSOCIATE FreeRTOS ARCHITECTURE PORT!
*
*/
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "task.h"
#include "semphr.h"
/* Renesas includes. */
/* Renesas includes. */
#include <rskrx113def.h>
#include "r_cg_macrodriver.h"
#include "r_cg_sci.h"
/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,
or 0 to run the more comprehensive test and demo application. */
#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1
/*-----------------------------------------------------------*/
/*
* Configure the hardware as necessary to run this demo.
*/
static void prvSetupHardware( void );
/*
* main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.
* main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0.
*/
#if( mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1 )
extern void main_blinky( void );
#else
extern void main_full( void );
#endif /* #if mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1 */
/* Prototypes for the standard FreeRTOS callback/hook functions implemented
within this file. */
void vApplicationMallocFailedHook( void );
void vApplicationIdleHook( void );
void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName );
void vApplicationTickHook( void );
/*-----------------------------------------------------------*/
int main( void )
{
/* Configure the hardware ready to run the demo. */
prvSetupHardware();
/* The mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting is described at the top
of this file. */
#if( mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1 )
{
main_blinky();
}
#else
{
main_full();
}
#endif
return 0;
}
/*-----------------------------------------------------------*/
static void prvSetupHardware( void )
{
/* Set up SCI1 receive buffer */
R_SCI1_Serial_Receive((uint8_t *) &g_rx_char, 1);
/* Enable SCI1 operations */
R_SCI1_Start();
LED0 = LED_OFF;
LED1 = LED_OFF;
LED2 = LED_OFF;
LED3 = LED_OFF;
}
/*-----------------------------------------------------------*/
void vApplicationMallocFailedHook( void )
{
/* Called if a call to pvPortMalloc() fails because there is insufficient
free memory available in the FreeRTOS heap. pvPortMalloc() is called
internally by FreeRTOS API functions that create tasks, queues, software
timers, and semaphores. The size of the FreeRTOS heap is set by the
configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h. */
/* Force an assert. */
configASSERT( ( volatile void * ) NULL );
}
/*-----------------------------------------------------------*/
void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName )
{
( void ) pcTaskName;
( void ) pxTask;
/* Run time stack overflow checking is performed if
configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook
function is called if a stack overflow is detected. */
/* Force an assert. */
configASSERT( ( volatile void * ) NULL );
}
/*-----------------------------------------------------------*/
void vApplicationIdleHook( void )
{
volatile size_t xFreeHeapSpace;
/* This is just a trivial example of an idle hook. It is called on each
cycle of the idle task. It must *NOT* attempt to block. In this case the
idle task just queries the amount of FreeRTOS heap that remains. See the
memory management section on the http://www.FreeRTOS.org web site for memory
management options. If there is a lot of heap memory free then the
configTOTAL_HEAP_SIZE value in FreeRTOSConfig.h can be reduced to free up
RAM. */
xFreeHeapSpace = xPortGetFreeHeapSize();
/* Remove compiler warning about xFreeHeapSpace being set but never used. */
( void ) xFreeHeapSpace;
}
/*-----------------------------------------------------------*/
void vApplicationTickHook( void )
{
#if mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 0
{
extern void vFullDemoTickHook( void );
vFullDemoTickHook();
}
#endif
}
/*-----------------------------------------------------------*/
/* The RX port uses this callback function to configure its tick interrupt.
This allows the application to choose the tick interrupt source. */
void vApplicationSetupTimerInterrupt( void )
{
const uint32_t ulEnableRegisterWrite = 0xA50BUL, ulDisableRegisterWrite = 0xA500UL;
/* Disable register write protection. */
SYSTEM.PRCR.WORD = ulEnableRegisterWrite;
/* Enable compare match timer 0. */
MSTP( CMT0 ) = 0;
/* Interrupt on compare match. */
CMT0.CMCR.BIT.CMIE = 1;
/* Set the compare match value. */
CMT0.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) -1 ) / 8 );
/* Divide the PCLK by 8. */
CMT0.CMCR.BIT.CKS = 0;
/* Enable the interrupt... */
_IEN( _CMT0_CMI0 ) = 1;
/* ...and set its priority to the application defined kernel priority. */
_IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
/* Start the timer. */
CMT.CMSTR0.BIT.STR0 = 1;
/* Reneable register protection. */
SYSTEM.PRCR.WORD = ulDisableRegisterWrite;
}
/*-----------------------------------------------------------*/
#ifdef __ICCRX__
#include <intrinsics.h>
/* Called from the C start up code when compiled with IAR. */
#pragma diag_suppress = Pm011
int __low_level_init(void)
#pragma diag_default = Pm011
{
extern void R_Systeminit( void );
__disable_interrupt();
R_Systeminit();
return (int)(1U);
}
#endif /* __ICCRX__ */

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@ -0,0 +1,61 @@
/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : rskrx113def.h
* Device(s) : R5F51138AxFP
* Tool-Chain : CCRX
* H/W Platform : RSKRX113
* Description : Defines macros relating to the RSK user LEDs and switches
* Creation Date: 26/08/2014
*******************************************************************************/
#ifndef RSKRX113_H
#define RSKRX113_H
/*******************************************************************************
User Defines
*******************************************************************************/
/* General Values */
#define LED_ON (0)
#define LED_OFF (1)
#define SET_BIT_HIGH (1)
#define SET_BIT_LOW (0)
#define SET_BYTE_HIGH (0xFF)
#define SET_BYTE_LOW (0x00)
/* Switches */
#define SW1 (PORTJ.PIDR.BIT.B0)
#define SW2 (PORT3.PIDR.BIT.B2)
#define SW3 (PORT2.PIDR.BIT.B7)
/* LED port settings */
#define LED0 (PORT2.PODR.BIT.B2)
#define LED1 (PORT2.PODR.BIT.B3)
#define LED2 (PORT2.PODR.BIT.B4)
#define LED3 (PORT2.PODR.BIT.B5)
#endif