mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-11-04 02:32:42 -05:00
Cleanup of redundant instructions
Signed-off-by: kar-rahul-aws <karahulx@amazon.com>
This commit is contained in:
kar-rahul-aws
parent
d6fff2a530
commit
e4d3814b31
3 changed files with 67 additions and 75 deletions
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@ -83,12 +83,12 @@
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/*-----------------------------------------------------------*/
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/*
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* Starts the first task executing. These functions are necessarily written in
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* assembly code so is implemented in portASM.s.
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* These functions are necessarily written in assembly code, so are implemented
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* in portASM.S.
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*/
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extern void vPortRestoreTaskContext( void );
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extern void vPortInitialiseFPSCR( void );
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extern uint32_t ulReadValueAPSR( void );
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extern uint32_t ulReadAPSR( void );
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/*
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* Used to catch tasks that attempt to return from their implementing function.
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@ -220,7 +220,7 @@ BaseType_t xPortStartScheduler( void )
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/* Only continue if the CPU is not in User mode. The CPU must be in a
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* Privileged mode for the scheduler to start. */
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ulAPSR = ulReadValueAPSR();
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ulAPSR = ulReadAPSR();
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ulAPSR &= portAPSR_MODE_BITS_MASK;
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configASSERT( ulAPSR != portAPSR_USER_MODE );
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@ -321,4 +321,4 @@ void vPortTaskUsesFPU( void )
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/* Initialise the floating point status register. */
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vPortInitialiseFPSCR();
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -34,8 +34,6 @@
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.set IRQ_MODE, 0x12
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/* Variables and functions. */
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.extern ulMaxAPIPriorityMask
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.extern _freertos_vector_table
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.extern pxCurrentTCB
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.extern vTaskSwitchContext
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.extern vApplicationIRQHandler
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@ -48,30 +46,31 @@
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.global FreeRTOS_SVC_Handler
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.global vPortRestoreTaskContext
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.global vPortInitialiseFPSCR
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.global ulReadValueAPSR
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.global ulReadAPSR
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/*-----------------------------------------------------------*/
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.macro portSAVE_CONTEXT
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/* Save the LR and SPSR onto the system mode stack before switching to
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system mode to save the remaining system mode registers. */
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* system mode to save the remaining system mode registers. */
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SRSDB sp!, #SYS_MODE
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CPS #SYS_MODE
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PUSH {R0-R12, R14}
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/* Push the critical nesting count. */
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LDR R2, ulCriticalNestingConst
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LDR R2, =ulCriticalNesting
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LDR R1, [R2]
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PUSH {R1}
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/* Does the task have a floating point context that needs saving? If
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ulPortTaskHasFPUContext is 0 then no. */
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LDR R2, ulPortTaskHasFPUContextConst
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* ulPortTaskHasFPUContext is 0 then no. */
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LDR R2, =ulPortTaskHasFPUContext
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LDR R3, [R2]
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CMP R3, #0
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/* Save the floating point context, if any. */
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FMRXNE R1, FPSCR
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VMRSNE R1, FPSCR
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VPUSHNE {D0-D15}
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#if configFPU_D32 == 1
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VPUSHNE {D16-D31}
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@ -82,24 +81,24 @@
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PUSH {R3}
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/* Save the stack pointer in the TCB. */
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LDR R0, pxCurrentTCBConst
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LDR R0, =pxCurrentTCB
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LDR R1, [R0]
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STR SP, [R1]
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.endm
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; /**********************************************************************/
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/*-----------------------------------------------------------*/
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.macro portRESTORE_CONTEXT
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/* Set the SP to point to the stack of the task being restored. */
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LDR R0, pxCurrentTCBConst
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LDR R0, =pxCurrentTCB
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LDR R1, [R0]
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LDR SP, [R1]
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/* Is there a floating point context to restore? If the restored
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ulPortTaskHasFPUContext is zero then no. */
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LDR R0, ulPortTaskHasFPUContextConst
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* ulPortTaskHasFPUContext is zero then no. */
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LDR R0, =ulPortTaskHasFPUContext
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POP {R1}
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STR R1, [R0]
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CMP R1, #0
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@ -113,7 +112,7 @@
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VMSRNE FPSCR, R0
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/* Restore the critical section nesting depth. */
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LDR R0, ulCriticalNestingConst
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LDR R0, =ulCriticalNesting
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POP {R1}
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STR R1, [R0]
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@ -126,25 +125,25 @@
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.endm
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/*-----------------------------------------------------------*/
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/******************************************************************************
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/*
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* SVC handler is used to yield.
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*****************************************************************************/
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*/
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.align 4
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.type FreeRTOS_SVC_Handler, %function
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FreeRTOS_SVC_Handler:
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/* Save the context of the current task and select a new task to run. */
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portSAVE_CONTEXT
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LDR R0, vTaskSwitchContextConst
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BLX R0
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BLX vTaskSwitchContext
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portRESTORE_CONTEXT
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/******************************************************************************
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/*-----------------------------------------------------------*/
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/*
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* vPortRestoreTaskContext is used to start the scheduler.
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*****************************************************************************/
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*/
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.align 4
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.type vPortRestoreTaskContext, %function
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vPortRestoreTaskContext:
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@ -152,26 +151,31 @@ vPortRestoreTaskContext:
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CPS #SYS_MODE
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portRESTORE_CONTEXT
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/*-----------------------------------------------------------*/
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/******************************************************************************
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* vPortInitialiseFPSCR is used to initialize the FPSCR context.
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*****************************************************************************/
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/*
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* vPortInitialiseFPSCR is used to initialize the FPSCR register.
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*/
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.align 4
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.type vPortInitialiseFPSCR, %function
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vPortInitialiseFPSCR:
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MOV R0, #0
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FMXR FPSCR, R0
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VMSR FPSCR, R0
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BX LR
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/******************************************************************************
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* ulReadValueAPSR is used to read the value of APSR context.
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*****************************************************************************/
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/*-----------------------------------------------------------*/
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/*
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* ulReadAPSR is used to read the value of APSR context.
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*/
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.align 4
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.type ulReadValueAPSR, %function
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ulReadValueAPSR:
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.type ulReadAPSR, %function
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ulReadAPSR:
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MRS R0, APSR
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BX LR
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/*-----------------------------------------------------------*/
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.align 4
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.type FreeRTOS_IRQ_Handler, %function
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FreeRTOS_IRQ_Handler:
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@ -184,29 +188,28 @@ FreeRTOS_IRQ_Handler:
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PUSH {lr}
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/* Change to supervisor mode to allow reentry. */
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CPS #0x13
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CPS #SVC_MODE
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/* Push used registers. */
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PUSH {r0-r3, r12}
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/* Increment nesting count. r3 holds the address of ulPortInterruptNesting
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for future use. r1 holds the original ulPortInterruptNesting value for
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future use. */
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LDR r3, ulPortInterruptNestingConst
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* for future use. r1 holds the original ulPortInterruptNesting value for
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* future use. */
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LDR r3, =ulPortInterruptNesting
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LDR r1, [r3]
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ADD r0, r1, #1
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STR r0, [r3]
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/* Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for
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future use. */
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* future use. */
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MOV r0, sp
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AND r2, r0, #4
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SUB sp, sp, r2
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/* Call the interrupt handler. */
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PUSH {r0-r3, lr}
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LDR r1, vApplicationIRQHandlerConst
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BLX r1
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BLX vApplicationIRQHandler
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POP {r0-r3, lr}
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ADD sp, sp, r2
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@ -215,7 +218,7 @@ FreeRTOS_IRQ_Handler:
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ISB
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/* Write to the EOI register. */
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LDR r0, ulICCEOIRConst
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LDR r0, =ulICCEOIR
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LDR r2, [r0]
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STR r0, [r2]
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@ -227,16 +230,16 @@ FreeRTOS_IRQ_Handler:
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BNE exit_without_switch
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/* Did the interrupt request a context switch? r1 holds the address of
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ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
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use. */
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LDR r1, ulPortYieldRequiredConst
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* ulPortYieldRequired and r0 the value of ulPortYieldRequired for future
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* use. */
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LDR r1, =ulPortYieldRequired
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LDR r0, [r1]
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CMP r0, #0
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BNE switch_before_exit
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exit_without_switch:
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/* No context switch. Restore used registers, LR_irq and SPSR before
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returning. */
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* returning. */
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POP {r0-r3, r12}
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CPS #IRQ_MODE
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POP {LR}
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@ -246,12 +249,12 @@ exit_without_switch:
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switch_before_exit:
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/* A context switch is to be performed. Clear the context switch pending
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flag. */
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* flag. */
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MOV r0, #0
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STR r0, [r1]
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/* Restore used registers, LR-irq and SPSR before saving the context
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to the task stack. */
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* to the task stack. */
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POP {r0-r3, r12}
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CPS #IRQ_MODE
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POP {LR}
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@ -260,23 +263,15 @@ switch_before_exit:
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portSAVE_CONTEXT
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/* Call the function that selects the new task to execute.
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vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
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instructions, or 8 byte aligned stack allocated data. LR does not need
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saving as a new LR will be loaded by portRESTORE_CONTEXT anyway. */
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LDR R0, vTaskSwitchContextConst
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BLX R0
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* vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
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* instructions, or 8 byte aligned stack allocated data. LR does not need
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* saving as a new LR will be loaded by portRESTORE_CONTEXT anyway. */
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BLX vTaskSwitchContext
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/* Restore the context of, and branch to, the task selected to execute
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next. */
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* next. */
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portRESTORE_CONTEXT
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ulICCEOIRConst: .word ulICCEOIR
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pxCurrentTCBConst: .word pxCurrentTCB
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ulCriticalNestingConst: .word ulCriticalNesting
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ulPortTaskHasFPUContextConst: .word ulPortTaskHasFPUContext
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vTaskSwitchContextConst: .word vTaskSwitchContext
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vApplicationIRQHandlerConst: .word vApplicationIRQHandler
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ulPortInterruptNestingConst: .word ulPortInterruptNesting
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ulPortYieldRequiredConst: .word ulPortYieldRequired
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/*-----------------------------------------------------------*/
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.end
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@ -59,7 +59,7 @@ typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
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* not need to be guarded with a critical section. */
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@ -92,10 +92,11 @@ typedef uint32_t TickType_t;
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__asm volatile ( "SWI 0 \n" \
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"ISB " ::: "memory" );
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------
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* Critical section control
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*----------------------------------------------------------*/
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/*
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* Critical section management.
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*/
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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@ -163,19 +164,15 @@ void vPortTaskUsesFPU( void );
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Store/clear the ready priorities in a bit map. */
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/* Store, clear and get the ready priorities in a bit map. */
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#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
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#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
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/*-----------------------------------------------------------*/
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) )
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __builtin_clz( uxReadyPriorities ) )
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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#define portNOP() __asm volatile ( "NOP" )
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#define portINLINE __inline
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#define portINLINE __inline
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#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
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/* *INDENT-OFF* */
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