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Move assembly instructions to portASM file

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This commit is contained in:
kar-rahul-aws 2024-07-10 17:48:48 +05:30
parent e4d3814b31
commit e4b924f881
2 changed files with 79 additions and 31 deletions
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70
portable/GCC/ARM_CRx_No_GIC/portASM.S
View file

@ -29,9 +29,10 @@
.text
.arm
.set SYS_MODE, 0x1f
.set SVC_MODE, 0x13
.set IRQ_MODE, 0x12
.set SYS_MODE, 0x1f
.set SVC_MODE, 0x13
.set IRQ_MODE, 0x12
.set CPSR_I_BIT, 0x80
/* Variables and functions. */
.extern pxCurrentTCB
@ -47,6 +48,10 @@
.global vPortRestoreTaskContext
.global vPortInitialiseFPSCR
.global ulReadAPSR
.global vPortYield
.global vPortEnableInterrupts
.global vPortDisableInterrupts
.global ulPortSetInterruptMaskFromISR
/*-----------------------------------------------------------*/
@ -142,6 +147,8 @@ FreeRTOS_SVC_Handler:
/*-----------------------------------------------------------*/
/*
* void vPortRestoreTaskContext( void );
*
* vPortRestoreTaskContext is used to start the scheduler.
*/
.align 4
@ -154,6 +161,8 @@ vPortRestoreTaskContext:
/*-----------------------------------------------------------*/
/*
* void vPortInitialiseFPSCR( void );
*
* vPortInitialiseFPSCR is used to initialize the FPSCR register.
*/
.align 4
@ -166,13 +175,66 @@ vPortInitialiseFPSCR:
/*-----------------------------------------------------------*/
/*
* uint32_t ulReadAPSR( void );
*
* ulReadAPSR is used to read the value of APSR context.
*/
.align 4
.type ulReadAPSR, %function
ulReadAPSR:
MRS R0, APSR
BX LR
BX LR
/*-----------------------------------------------------------*/
/*
* void vPortYield( void );
*/
.align 4
.type vPortYield, %function
vPortYield:
SVC 0
ISB
BX LR
/*-----------------------------------------------------------*/
/*
* void vPortEnableInterrupts( void );
*/
.align 4
.type vPortEnableInterrupts, %function
vPortEnableInterrupts:
CPSIE I
BX LR
/*-----------------------------------------------------------*/
/*
* void vPortDisableInterrupts( void );
*/
.align 4
.type vPortDisableInterrupts, %function
vPortDisableInterrupts:
CPSID I
DSB
ISB
BX LR
/*-----------------------------------------------------------*/
/*
* uint32_t ulPortSetInterruptMaskFromISR( void );
*/
.align 4
.type ulPortSetInterruptMaskFromISR, %function
ulPortSetInterruptMaskFromISR:
MRS R0, CPSR
AND R0, R0, #CPSR_I_BIT
CPSID I
DSB
ISB
BX LR
/*-----------------------------------------------------------*/

40
portable/GCC/ARM_CRx_No_GIC/portmacro.h
View file

@ -88,9 +88,10 @@ typedef uint32_t TickType_t;
}
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
#define portYIELD() \
__asm volatile ( "SWI 0 \n" \
"ISB " ::: "memory" );
void vPortYield( void );
#define portYIELD() vPortYield();
/*-----------------------------------------------------------*/
@ -100,36 +101,21 @@ typedef uint32_t TickType_t;
extern void vPortEnterCritical( void );
extern void vPortExitCritical( void );
extern uint32_t ulPortSetInterruptMask( void );
extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );
extern void vPortInstallFreeRTOSVectorTable( void );
extern void vPortEnableInterrupts( void );
extern void vPortDisableInterrupts( void );
extern uint32_t ulPortSetInterruptMaskFromISR( void );
/* The I bit within the CPSR. */
#define portINTERRUPT_ENABLE_BIT ( 1 << 7 )
/* In the absence of a priority mask register, these functions and macros
* globally enable and disable interrupts. */
#define portENTER_CRITICAL() vPortEnterCritical();
#define portEXIT_CRITICAL() vPortExitCritical();
#define portENABLE_INTERRUPTS() __asm volatile ( "CPSIE i \n" ::: "memory" );
#define portDISABLE_INTERRUPTS() \
__asm volatile ( "CPSID i \n" \
"DSB \n" \
"ISB " ::: "memory" );
__attribute__( ( always_inline ) ) static __inline uint32_t portINLINE_SET_INTERRUPT_MASK_FROM_ISR( void )
{
volatile uint32_t ulCPSR;
__asm volatile ( "MRS %0, CPSR" : "=r" ( ulCPSR )::"memory" );
ulCPSR &= portINTERRUPT_ENABLE_BIT;
portDISABLE_INTERRUPTS();
return ulCPSR;
}
#define portSET_INTERRUPT_MASK_FROM_ISR() portINLINE_SET_INTERRUPT_MASK_FROM_ISR()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) do { if( x == 0 ) portENABLE_INTERRUPTS( ); } while( 0 )
#define portENTER_CRITICAL() vPortEnterCritical();
#define portEXIT_CRITICAL() vPortExitCritical();
#define portENABLE_INTERRUPTS() vPortEnableInterrupts();
#define portDISABLE_INTERRUPTS() vPortDisableInterrupts();
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMaskFromISR();
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) do { if( x == 0 ) portENABLE_INTERRUPTS(); } while( 0 )
/*-----------------------------------------------------------*/