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Minor updates to demo projects to ensure correct building with V8 rc1.

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This commit is contained in:
Richard Barry 2013-12-30 07:54:46 +00:00
parent 2b6eb1c5ab
commit e4965ca03c
5 changed files with 34 additions and 26 deletions
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FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c
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@ -88,7 +88,6 @@
/* Constants required to pend a PendSV interrupt from the tick ISR if the
preemptive scheduler is being used. These are just standard bits and registers
within the Cortex-M core itself. */
#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
/* The alarm used to generate interrupts in the asynchronous timer. */