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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-21 22:11:57 -04:00
RISC-V tasks now context switching to each other using taskYIELD() - not fully tested yet.
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@ -50,14 +50,14 @@ static void prvTaskExitError( void );
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/* Used to program the machine timer compare register. */
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static uint64_t ullNextTime = 0ULL;
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static volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) 0x2004000;
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static volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) ( configCTRL_BASE + 0x4000 );
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/*-----------------------------------------------------------*/
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void prvTaskExitError( void )
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{
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volatile uint32_t ulx = 0;
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#warning prvTaskExitError not used yet.
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/* A function that implements a task must not exit or attempt to return to
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its caller as there is nothing to return to. If a task wants to exit it
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should instead call vTaskDelete( NULL ).
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@ -154,6 +154,8 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
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// pxTopOfStack--;
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// *pxTopOfStack = ( StackType_t ) 2; /* Stack pointer. */
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// pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) prvTaskExitError;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxCode;
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return pxTopOfStack;
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@ -163,8 +165,8 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
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void vPortSetupTimerInterrupt( void )
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{
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uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
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volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) 0x200BFF8;
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volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) 0x200BFFc;
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volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFF8 );
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volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFFc );
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do
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{
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@ -185,9 +187,13 @@ volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) 0x200BFFc;
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void Software_IRQHandler( void )
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{
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volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCTRL_BASE;
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vTaskSwitchContext();
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/* Clear software interrupt. */
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*ulSoftInterrupt = 0UL;
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}
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/*-----------------------------------------------------------*/
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@ -47,80 +47,83 @@
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.align 8
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xPortStartScheduler:
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lw sp, pxCurrentTCB /* Load pxCurrentTCB. */
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lw sp, 0( sp ) /* Read sp from first TCB member. */
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lw x1, 0( sp )
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lw x5, 1 * WORD_SIZE( sp ) /* t0 */
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lw x6, 2 * WORD_SIZE( sp ) /* t1 */
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lw x7, 3 * WORD_SIZE( sp ) /* t2 */
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lw x8, 4 * WORD_SIZE( sp ) /* s0/fp */
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lw x9, 5 * WORD_SIZE( sp ) /* s1 */
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lw x10, 6 * WORD_SIZE( sp ) /* a0 */
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lw x11, 7 * WORD_SIZE( sp ) /* a1 */
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lw x12, 8 * WORD_SIZE( sp ) /* a2 */
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lw x13, 9 * WORD_SIZE( sp ) /* a3 */
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lw x14, 10 * WORD_SIZE( sp ) /* a4 */
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lw x15, 11 * WORD_SIZE( sp ) /* a5 */
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lw x16, 12 * WORD_SIZE( sp ) /* a6 */
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lw x17, 13 * WORD_SIZE( sp ) /* a7 */
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lw x18, 14 * WORD_SIZE( sp ) /* s2 */
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lw x19, 15 * WORD_SIZE( sp ) /* s3 */
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lw x20, 16 * WORD_SIZE( sp ) /* s4 */
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lw x21, 17 * WORD_SIZE( sp ) /* s5 */
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lw x22, 18 * WORD_SIZE( sp ) /* s6 */
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lw x23, 19 * WORD_SIZE( sp ) /* s7 */
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lw x24, 20 * WORD_SIZE( sp ) /* s8 */
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lw x25, 21 * WORD_SIZE( sp ) /* s9 */
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lw x26, 22 * WORD_SIZE( sp ) /* s10 */
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lw x27, 23 * WORD_SIZE( sp ) /* s11 */
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lw x28, 24 * WORD_SIZE( sp ) /* t3 */
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lw x29, 25 * WORD_SIZE( sp ) /* t4 */
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lw x30, 26 * WORD_SIZE( sp ) /* t5 */
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lw x31, 27 * WORD_SIZE( sp ) /* t6 */
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addi sp, sp, CONTEXT_SIZE
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csrs mie, 8 /* Enable soft interrupt. */
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csrs mstatus, 8 /* Enable interrupts. */
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ret
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lw sp, pxCurrentTCB /* Load pxCurrentTCB. */
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lw sp, 0( sp ) /* Read sp from first TCB member. */
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lw x1, 0( sp ) /* Note for starting the scheduler the exception return address is used as the function return address. */
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lw x5, 2 * WORD_SIZE( sp ) /* t0 */
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lw x6, 3 * WORD_SIZE( sp ) /* t1 */
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lw x7, 4 * WORD_SIZE( sp ) /* t2 */
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lw x8, 5 * WORD_SIZE( sp ) /* s0/fp */
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lw x9, 6 * WORD_SIZE( sp ) /* s1 */
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lw x10, 7 * WORD_SIZE( sp ) /* a0 */
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lw x11, 8 * WORD_SIZE( sp ) /* a1 */
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lw x12, 9 * WORD_SIZE( sp ) /* a2 */
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lw x13, 10 * WORD_SIZE( sp ) /* a3 */
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lw x14, 11 * WORD_SIZE( sp ) /* a4 */
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lw x15, 12 * WORD_SIZE( sp ) /* a5 */
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lw x16, 13 * WORD_SIZE( sp ) /* a6 */
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lw x17, 14 * WORD_SIZE( sp ) /* a7 */
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lw x18, 15 * WORD_SIZE( sp ) /* s2 */
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lw x19, 16 * WORD_SIZE( sp ) /* s3 */
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lw x20, 17 * WORD_SIZE( sp ) /* s4 */
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lw x21, 18 * WORD_SIZE( sp ) /* s5 */
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lw x22, 19 * WORD_SIZE( sp ) /* s6 */
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lw x23, 20 * WORD_SIZE( sp ) /* s7 */
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lw x24, 21 * WORD_SIZE( sp ) /* s8 */
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lw x25, 22 * WORD_SIZE( sp ) /* s9 */
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lw x26, 23 * WORD_SIZE( sp ) /* s10 */
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lw x27, 24 * WORD_SIZE( sp ) /* s11 */
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lw x28, 25 * WORD_SIZE( sp ) /* t3 */
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lw x29, 26 * WORD_SIZE( sp ) /* t4 */
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lw x30, 27 * WORD_SIZE( sp ) /* t5 */
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lw x31, 28 * WORD_SIZE( sp ) /* t6 */
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addi sp, sp, CONTEXT_SIZE
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csrs mstatus, 8 /* Enable machine interrupts. */
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csrs mie, 8 /* Enable soft interrupt. */
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ret
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/*-----------------------------------------------------------*/
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.align 8
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vPortTrapHandler:
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addi sp, sp, -CONTEXT_SIZE
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sw x1, 0( sp )
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sw x5, 1 * WORD_SIZE( sp )
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sw x6, 2 * WORD_SIZE( sp )
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sw x7, 3 * WORD_SIZE( sp )
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sw x8, 4 * WORD_SIZE( sp )
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sw x9, 5 * WORD_SIZE( sp )
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sw x10, 6 * WORD_SIZE( sp )
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sw x11, 7 * WORD_SIZE( sp )
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sw x12, 8 * WORD_SIZE( sp )
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sw x13, 9 * WORD_SIZE( sp )
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sw x14, 10 * WORD_SIZE( sp )
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sw x15, 11 * WORD_SIZE( sp )
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sw x16, 12 * WORD_SIZE( sp )
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sw x17, 13 * WORD_SIZE( sp )
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sw x18, 14 * WORD_SIZE( sp )
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sw x19, 15 * WORD_SIZE( sp )
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sw x20, 16 * WORD_SIZE( sp )
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sw x21, 17 * WORD_SIZE( sp )
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sw x22, 18 * WORD_SIZE( sp )
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sw x23, 19 * WORD_SIZE( sp )
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sw x24, 20 * WORD_SIZE( sp )
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sw x25, 21 * WORD_SIZE( sp )
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sw x26, 22 * WORD_SIZE( sp )
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sw x27, 23 * WORD_SIZE( sp )
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sw x28, 24 * WORD_SIZE( sp )
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sw x29, 25 * WORD_SIZE( sp )
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sw x30, 26 * WORD_SIZE( sp )
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sw x31, 27 * WORD_SIZE( sp )
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sw x1, 1( sp )
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sw x5, 2 * WORD_SIZE( sp )
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sw x6, 3 * WORD_SIZE( sp )
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sw x7, 4 * WORD_SIZE( sp )
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sw x8, 5 * WORD_SIZE( sp )
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sw x9, 6 * WORD_SIZE( sp )
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sw x10, 7 * WORD_SIZE( sp )
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sw x11, 8 * WORD_SIZE( sp )
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sw x12, 9 * WORD_SIZE( sp )
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sw x13, 10 * WORD_SIZE( sp )
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sw x14, 11 * WORD_SIZE( sp )
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sw x15, 12 * WORD_SIZE( sp )
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sw x16, 13 * WORD_SIZE( sp )
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sw x17, 14 * WORD_SIZE( sp )
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sw x18, 15 * WORD_SIZE( sp )
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sw x19, 16 * WORD_SIZE( sp )
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sw x20, 17 * WORD_SIZE( sp )
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sw x21, 18 * WORD_SIZE( sp )
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sw x22, 19 * WORD_SIZE( sp )
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sw x23, 20 * WORD_SIZE( sp )
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sw x24, 21 * WORD_SIZE( sp )
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sw x25, 22 * WORD_SIZE( sp )
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sw x26, 23 * WORD_SIZE( sp )
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sw x27, 24 * WORD_SIZE( sp )
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sw x28, 25 * WORD_SIZE( sp )
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sw x29, 26 * WORD_SIZE( sp )
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sw x30, 27 * WORD_SIZE( sp )
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sw x31, 28 * WORD_SIZE( sp )
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/* Save exception return address. */
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csrr t0, mepc
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sw t0, 0( sp )
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lw t0, pxCurrentTCB /* Load pxCurrentTCB. */
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sw sp, 0( t0 ) /* Write sp from first TCB member. */
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csrr t0, mepc
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sw t0, 31 * WORD_SIZE( sp )
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csrr a0, mcause
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csrr a1, mepc
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mv a2, sp
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li t0, 0x00001800 /* MSTATUS MPP */
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csrs mstatus, t0
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/* Cut and past restore code from xPortStartScheduler - can be made a macro
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but that makes debugging harder. */
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lw sp, pxCurrentTCB /* Load pxCurrentTCB. */
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lw sp, 0( sp ) /* Read sp from first TCB member. */
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lw x1, 0( sp )
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lw x5, 1 * WORD_SIZE( sp ) /* t0 */
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lw x6, 2 * WORD_SIZE( sp ) /* t1 */
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lw x7, 3 * WORD_SIZE( sp ) /* t2 */
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lw x8, 4 * WORD_SIZE( sp ) /* s0/fp */
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lw x9, 5 * WORD_SIZE( sp ) /* s1 */
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lw x10, 6 * WORD_SIZE( sp ) /* a0 */
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lw x11, 7 * WORD_SIZE( sp ) /* a1 */
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lw x12, 8 * WORD_SIZE( sp ) /* a2 */
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lw x13, 9 * WORD_SIZE( sp ) /* a3 */
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lw x14, 10 * WORD_SIZE( sp ) /* a4 */
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lw x15, 11 * WORD_SIZE( sp ) /* a5 */
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lw x16, 12 * WORD_SIZE( sp ) /* a6 */
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lw x17, 13 * WORD_SIZE( sp ) /* a7 */
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lw x18, 14 * WORD_SIZE( sp ) /* s2 */
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lw x19, 15 * WORD_SIZE( sp ) /* s3 */
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lw x20, 16 * WORD_SIZE( sp ) /* s4 */
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lw x21, 17 * WORD_SIZE( sp ) /* s5 */
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lw x22, 18 * WORD_SIZE( sp ) /* s6 */
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lw x23, 19 * WORD_SIZE( sp ) /* s7 */
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lw x24, 20 * WORD_SIZE( sp ) /* s8 */
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lw x25, 21 * WORD_SIZE( sp ) /* s9 */
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lw x26, 22 * WORD_SIZE( sp ) /* s10 */
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lw x27, 23 * WORD_SIZE( sp ) /* s11 */
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lw x28, 24 * WORD_SIZE( sp ) /* t3 */
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lw x29, 25 * WORD_SIZE( sp ) /* t4 */
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lw x30, 26 * WORD_SIZE( sp ) /* t5 */
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lw x31, 27 * WORD_SIZE( sp ) /* t6 */
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addi sp, sp, CONTEXT_SIZE
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mret
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lw sp, pxCurrentTCB /* Load pxCurrentTCB. */
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lw sp, 0( sp ) /* Read sp from first TCB member. */
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/* Load mret with the address of the first task. */
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lw t0, 0( sp )
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csrw mepc, t0
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lw x1, 1( sp )
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lw x5, 2 * WORD_SIZE( sp ) /* t0 */
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lw x6, 3 * WORD_SIZE( sp ) /* t1 */
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lw x7, 4 * WORD_SIZE( sp ) /* t2 */
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lw x8, 5 * WORD_SIZE( sp ) /* s0/fp */
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lw x9, 6 * WORD_SIZE( sp ) /* s1 */
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lw x10, 7 * WORD_SIZE( sp ) /* a0 */
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lw x11, 8 * WORD_SIZE( sp ) /* a1 */
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lw x12, 9 * WORD_SIZE( sp ) /* a2 */
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lw x13, 10 * WORD_SIZE( sp ) /* a3 */
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lw x14, 11 * WORD_SIZE( sp ) /* a4 */
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lw x15, 12 * WORD_SIZE( sp ) /* a5 */
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lw x16, 13 * WORD_SIZE( sp ) /* a6 */
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lw x17, 14 * WORD_SIZE( sp ) /* a7 */
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lw x18, 15 * WORD_SIZE( sp ) /* s2 */
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lw x19, 16 * WORD_SIZE( sp ) /* s3 */
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lw x20, 17 * WORD_SIZE( sp ) /* s4 */
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lw x21, 18 * WORD_SIZE( sp ) /* s5 */
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lw x22, 19 * WORD_SIZE( sp ) /* s6 */
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lw x23, 20 * WORD_SIZE( sp ) /* s7 */
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lw x24, 21 * WORD_SIZE( sp ) /* s8 */
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lw x25, 22 * WORD_SIZE( sp ) /* s9 */
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lw x26, 23 * WORD_SIZE( sp ) /* s10 */
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lw x27, 24 * WORD_SIZE( sp ) /* s11 */
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lw x28, 25 * WORD_SIZE( sp ) /* t3 */
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lw x29, 26 * WORD_SIZE( sp ) /* t4 */
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lw x30, 27 * WORD_SIZE( sp ) /* t5 */
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lw x31, 28 * WORD_SIZE( sp ) /* t6 */
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addi sp, sp, CONTEXT_SIZE
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mret
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@ -70,7 +70,7 @@ not need to be guarded with a critical section. */
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/* Scheduler utilities. */
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#define portYIELD() { volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) 0x2000000; *ulSoftInterrupt = 1UL; }
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#define portYIELD() { volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCTRL_BASE; *ulSoftInterrupt = 1UL; }
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYield()
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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