diff --git a/FreeRTOS/Demo/RISC-V-Qemu-sifive_e-FreedomStudio/.cproject b/FreeRTOS/Demo/RISC-V-Qemu-sifive_e-FreedomStudio/.cproject
index b963a9fc9..38177fd60 100644
--- a/FreeRTOS/Demo/RISC-V-Qemu-sifive_e-FreedomStudio/.cproject
+++ b/FreeRTOS/Demo/RISC-V-Qemu-sifive_e-FreedomStudio/.cproject
@@ -50,7 +50,7 @@
diff --git a/FreeRTOS/Demo/RISC-V_Renode_Emulator_SoftConsole/Microsemi_Code/riscv_hal/entry.S b/FreeRTOS/Demo/RISC-V_Renode_Emulator_SoftConsole/Microsemi_Code/riscv_hal/entry.S
index fce18d785..641237004 100644
--- a/FreeRTOS/Demo/RISC-V_Renode_Emulator_SoftConsole/Microsemi_Code/riscv_hal/entry.S
+++ b/FreeRTOS/Demo/RISC-V_Renode_Emulator_SoftConsole/Microsemi_Code/riscv_hal/entry.S
@@ -24,7 +24,7 @@
#endif
.section .text.entry
- .extern vFreeRTOSPortTrapHandler
+ .extern freertos_risc_v_trap_handler
.globl _start
_start:
@@ -34,10 +34,10 @@ nmi_vector:
j nmi_vector
trap_vector:
- j vFreeRTOSPortTrapHandler
+ j freertos_risc_v_trap_handler
handle_reset:
- la t0, vFreeRTOSPortTrapHandler
+ la t0, freertos_risc_v_trap_handler
csrw mtvec, t0
csrwi mstatus, 0
csrwi mie, 0
diff --git a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_port_specific_extensions.h b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h
similarity index 70%
rename from FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_port_specific_extensions.h
rename to FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h
index 5121abab1..da213e92f 100644
--- a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_port_specific_extensions.h
+++ b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h
@@ -32,29 +32,33 @@
* common across all currently supported RISC-V chips (implementations of the
* RISC-V ISA), and code which tailors the port to a specific RISC-V chip:
*
- * + The code that is common to all RISC-V chips is implemented in
- * FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S. There is only one
- * portASM.S file because the same file is used no matter which RISC-V chip is
- * in use.
+ * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
+ * is common to all currently supported RISC-V chips. There is only one
+ * portASM.S file because the same file is built for all RISC-V target chips.
*
- * + The code that tailors the kernel's RISC-V port to a specific RISC-V
- * chip is implemented in freertos_risc_v_port_specific_extensions.h. There
- * is one freertos_risc_v_port_specific_extensions.h that can be used with any
- * RISC-V chip that both includes a standard CLINT and does not add to the
- * base set of RISC-V registers. There are additional
- * freertos_risc_v_port_specific_extensions.h files for RISC-V implementations
- * that do not include a standard CLINT or do add to the base set of RISC-V
- * registers.
+ * + Header files called freertos_risc_v_chip_specific_extensions.h contain the
+ * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
+ * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files
+ * as there are multiple RISC-V chip implementations.
*
- * CARE MUST BE TAKEN TO INCLDUE THE CORRECT
- * freertos_risc_v_port_specific_extensions.h HEADER FILE FOR THE CHIP
- * IN USE. To include the correct freertos_risc_v_port_specific_extensions.h
- * header file ensure the path to the correct header file is in the assembler's
- * include path.
+ * !!!NOTE!!!
+ * CARE MUST BE TAKEN TO INCLUDE THE CORRECT
+ * freertos_risc_v_chip_specific_extensions.h HEADER FILE FOR THE CHIP IN USE.
+ * If the chip in use includes a core local interrupter (CLINT) and does not
+ * include any chip specific register extensions then set the GNU assembler's
+ * include path such that the header file contained in the
+ * FreeRTOS\Source\portable\GCC\RISC-V-RV32 directory is the header file that is
+ * actually inlcuded. Otherwise set the assembler's include patch to the
+ * sub-directory off of the
+ * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions directory
+ * that contains the freertos_risc_v_chip_specific_extensions.h specific to the
+ * target chip.
*
- * This freertos_risc_v_port_specific_extensions.h is for use with Pulpino Ri5cy
+ */
+
+/*
+ * This freertos_risc_v_chip_specific_extensions.h is for use with Pulpino Ri5cy
* devices, developed and tested using the Vega board RV32M1RM.
- *
*/
#ifndef __FREERTOS_RISC_V_EXTENSIONS_H__
diff --git a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/readme.txt b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/readme.txt
new file mode 100644
index 000000000..b94a43687
--- /dev/null
+++ b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/readme.txt
@@ -0,0 +1,28 @@
+/*
+ * The FreeRTOS kernel's RISC-V port is split between the the code that is
+ * common across all currently supported RISC-V chips (implementations of the
+ * RISC-V ISA), and code which tailors the port to a specific RISC-V chip:
+ *
+ * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
+ * is common to all currently supported RISC-V chips. There is only one
+ * portASM.S file because the same file is built for all RISC-V target chips.
+ *
+ * + Header files called freertos_risc_v_chip_specific_extensions.h contain the
+ * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
+ * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files
+ * as there are multiple RISC-V chip implementations.
+ *
+ * !!!NOTE!!!
+ * CARE MUST BE TAKEN TO INCLUDE THE CORRECT
+ * freertos_risc_v_chip_specific_extensions.h HEADER FILE FOR THE CHIP IN USE.
+ * If the chip in use includes a core local interrupter (CLINT) and does not
+ * include any chip specific register extensions then set the GNU assembler's
+ * include path such that the header file contained in the
+ * FreeRTOS\Source\portable\GCC\RISC-V-RV32 directory is the header file that is
+ * actually inlcuded. Otherwise set the assembler's include patch to the
+ * sub-directory off of the
+ * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions directory
+ * that contains the freertos_risc_v_chip_specific_extensions.h specific to the
+ * target chip.
+ *
+ */
diff --git a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/freertos_risc_v_port_specific_extensions.h b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/freertos_risc_v_chip_specific_extensions.h
similarity index 58%
rename from FreeRTOS/Source/portable/GCC/RISC-V-RV32/freertos_risc_v_port_specific_extensions.h
rename to FreeRTOS/Source/portable/GCC/RISC-V-RV32/freertos_risc_v_chip_specific_extensions.h
index a5544b061..f911cd96d 100644
--- a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/freertos_risc_v_port_specific_extensions.h
+++ b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/freertos_risc_v_chip_specific_extensions.h
@@ -6,9 +6,7 @@
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and t
-
- o permit persons to whom the Software is furnished to do so,
+ * the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
@@ -32,29 +30,27 @@
* common across all currently supported RISC-V chips (implementations of the
* RISC-V ISA), and code which tailors the port to a specific RISC-V chip:
*
- * + The code that is common to all RISC-V chips is implemented in
- * FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S. There is only one
- * portASM.S file because the same file is used no matter which RISC-V chip is
- * in use.
+ * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
+ * is common to all currently supported RISC-V chips. There is only one
+ * portASM.S file because the same file is built for all RISC-V target chips.
*
- * + The code that tailors the kernel's RISC-V port to a specific RISC-V
- * chip is implemented in freertos_risc_v_port_specific_extensions.h. There
- * is one freertos_risc_v_port_specific_extensions.h that can be used with any
- * RISC-V chip that both includes a standard CLINT and does not add to the
- * base set of RISC-V registers. There are additional
- * freertos_risc_v_port_specific_extensions.h files for RISC-V implementations
- * that do not include a standard CLINT or do add to the base set of RISC-V
- * registers.
+ * + Header files called freertos_risc_v_chip_specific_extensions.h contain the
+ * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
+ * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files
+ * as there are multiple RISC-V chip implementations.
*
- * CARE MUST BE TAKEN TO INCLDUE THE CORRECT
- * freertos_risc_v_port_specific_extensions.h HEADER FILE FOR THE CHIP
- * IN USE. To include the correct freertos_risc_v_port_specific_extensions.h
- * header file ensure the path to the correct header file is in the assembler's
- * include path.
- *
- * This freertos_risc_v_port_specific_extensions.h is for use on RISC-V chips
- * that include a standard CLINT and do not add to the base set of RISC-V
- * registers.
+ * !!!NOTE!!!
+ * CARE MUST BE TAKEN TO INCLUDE THE CORRECT
+ * freertos_risc_v_chip_specific_extensions.h HEADER FILE FOR THE CHIP IN USE.
+ * If the chip in use includes a core local interrupter (CLINT) and does not
+ * include any chip specific register extensions then set the GNU assembler's
+ * include path such that the header file contained in the
+ * FreeRTOS\Source\portable\GCC\RISC-V-RV32 directory is the header file that is
+ * actually inlcuded. Otherwise set the assembler's include patch to the
+ * sub-directory off of the
+ * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions directory
+ * that contains the freertos_risc_v_chip_specific_extensions.h specific to the
+ * target chip.
*
*/
diff --git a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S
index 5d9e5f307..4f3e5a8bb 100644
--- a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S
+++ b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S
@@ -45,46 +45,46 @@
* in use.
*
* + The code that tailors the kernel's RISC-V port to a specific RISC-V
- * chip is implemented in freertos_risc_v_port_specific_extensions.h. There
- * is one freertos_risc_v_port_specific_extensions.h that can be used with any
+ * chip is implemented in freertos_risc_v_chip_specific_extensions.h. There
+ * is one freertos_risc_v_chip_specific_extensions.h that can be used with any
* RISC-V chip that both includes a standard CLINT and does not add to the
* base set of RISC-V registers. There are additional
- * freertos_risc_v_port_specific_extensions.h files for RISC-V implementations
+ * freertos_risc_v_chip_specific_extensions.h files for RISC-V implementations
* that do not include a standard CLINT or do add to the base set of RISC-V
* registers.
*
* CARE MUST BE TAKEN TO INCLDUE THE CORRECT
- * freertos_risc_v_port_specific_extensions.h HEADER FILE FOR THE CHIP
- * IN USE. To include the correct freertos_risc_v_port_specific_extensions.h
+ * freertos_risc_v_chip_specific_extensions.h HEADER FILE FOR THE CHIP
+ * IN USE. To include the correct freertos_risc_v_chip_specific_extensions.h
* header file ensure the path to the correct header file is in the assembler's
* include path.
*
- * This freertos_risc_v_port_specific_extensions.h is for use on RISC-V chips
+ * This freertos_risc_v_chip_specific_extensions.h is for use on RISC-V chips
* that include a standard CLINT and do not add to the base set of RISC-V
* registers.
*
*/
-#include "freertos_risc_v_port_specific_extensions.h"
+#include "freertos_risc_v_chip_specific_extensions.h"
-/* Check the freertos_risc_v_port_specific_extensions.h and/or command line
+/* Check the freertos_risc_v_chip_specific_extensions.h and/or command line
definitions. */
#ifndef portasmHAS_CLINT
- #error freertos_risc_v_port_specific_extensions.h must define portasmHAS_CLINT to either 1 (CLINT present) or 0 (clint not present).
+ #error freertos_risc_v_chip_specific_extensions.h must define portasmHAS_CLINT to either 1 (CLINT present) or 0 (clint not present).
#endif
#ifndef portasmHANDLE_INTERRUPT
- #error portasmHANDLE_INTERRUPT must be defined to the function to be called to handle external/peripheral interrupts. portasmHANDLE_INTERRUPT can be defined on the assmbler command line or in the appropriate freertos_risc_v_port_specific_extensions.h header file.
+ #error portasmHANDLE_INTERRUPT must be defined to the function to be called to handle external/peripheral interrupts. portasmHANDLE_INTERRUPT can be defined on the assmbler command line or in the appropriate freertos_risc_v_chip_specific_extensions.h header file.
#endif
/* Only the standard core registers are stored by default. Any additional
registers must be saved by the portasmSAVE_ADDITIONAL_REGISTERS and
portasmRESTORE_ADDITIONAL_REGISTERS macros - which can be defined in a chip
-specific version of freertos_risc_v_port_specific_extensions.h. See the notes
+specific version of freertos_risc_v_chip_specific_extensions.h. See the notes
at the top of this file. */
#define portCONTEXT_SIZE ( 30 * portWORD_SIZE )
.global xPortStartFirstTask
-.global vFreeRTOSPortTrapHandler
+.global freertos_risc_v_trap_handler
.global pxPortInitialiseStack
.extern pxCurrentTCB
.extern ulPortTrapHandler
@@ -99,7 +99,7 @@ at the top of this file. */
.align 8
.func
-vFreeRTOSPortTrapHandler:
+freertos_risc_v_trap_handler:
addi sp, sp, -portCONTEXT_SIZE
sw x1, 1 * portWORD_SIZE( sp )
sw x5, 2 * portWORD_SIZE( sp )
@@ -133,7 +133,7 @@ vFreeRTOSPortTrapHandler:
csrr t0, mstatus /* Required for MPIE bit. */
sw t0, 29 * portWORD_SIZE( sp )
- portasmSAVE_ADDITIONAL_REGISTERS /* Defined in freertos_risc_v_port_specific_extensions.h to save any registers unique to the RISC-V implementation. */
+ portasmSAVE_ADDITIONAL_REGISTERS /* Defined in freertos_risc_v_chip_specific_extensions.h to save any registers unique to the RISC-V implementation. */
lw t0, pxCurrentTCB /* Load pxCurrentTCB. */
sw sp, 0( t0 ) /* Write sp to first TCB member. */
@@ -210,7 +210,7 @@ processed_source:
lw t0, 0( sp )
csrw mepc, t0
- portasmRESTORE_ADDITIONAL_REGISTERS /* Defined in freertos_risc_v_port_specific_extensions.h to restore any registers unique to the RISC-V implementation. */
+ portasmRESTORE_ADDITIONAL_REGISTERS /* Defined in freertos_risc_v_chip_specific_extensions.h to restore any registers unique to the RISC-V implementation. */
/* Load mstatus with the interrupt enable bits used by the task. */
lw t0, 29 * portWORD_SIZE( sp )
@@ -258,7 +258,7 @@ xPortStartFirstTask:
/* If there is a clint then interrupts can branch directly to the FreeRTOS
trap handler. Otherwise the interrupt controller will need to be configured
outside of this file. */
- la t0, vFreeRTOSPortTrapHandler
+ la t0, freertos_risc_v_trap_handler
csrw mtvec, t0
#endif /* portasmHAS_CLILNT */
@@ -267,7 +267,7 @@ xPortStartFirstTask:
lw x1, 0( sp ) /* Note for starting the scheduler the exception return address is used as the function return address. */
- portasmRESTORE_ADDITIONAL_REGISTERS /* Defined in freertos_risc_v_port_specific_extensions.h to restore any registers unique to the RISC-V implementation. */
+ portasmRESTORE_ADDITIONAL_REGISTERS /* Defined in freertos_risc_v_chip_specific_extensions.h to restore any registers unique to the RISC-V implementation. */
lw t0, 29 * portWORD_SIZE( sp ) /* mstatus */
csrrw x0, mstatus, t0 /* Interrupts enabled from here! */
diff --git a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/readme.txt b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/readme.txt
index db628a412..b94a43687 100644
--- a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/readme.txt
+++ b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/readme.txt
@@ -1,27 +1,28 @@
+/*
* The FreeRTOS kernel's RISC-V port is split between the the code that is
* common across all currently supported RISC-V chips (implementations of the
* RISC-V ISA), and code which tailors the port to a specific RISC-V chip:
*
- * + The code that is common to all RISC-V chips is implemented in
- * FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S. There is only one
- * portASM.S file because the same file is used no matter which RISC-V chip is
- * in use.
+ * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
+ * is common to all currently supported RISC-V chips. There is only one
+ * portASM.S file because the same file is built for all RISC-V target chips.
*
- * + The code that tailors the kernel's RISC-V port to a specific RISC-V
- * chip is implemented in freertos_risc_v_port_specific_extensions.h. There
- * is one freertos_risc_v_port_specific_extensions.h that can be used with any
- * RISC-V chip that both includes a standard CLINT and does not add to the
- * base set of RISC-V registers. There are additional
- * freertos_risc_v_port_specific_extensions.h files for RISC-V implementations
- * that do not include a standard CLINT or do add to the base set of RISC-V
- * registers.
+ * + Header files called freertos_risc_v_chip_specific_extensions.h contain the
+ * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
+ * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files
+ * as there are multiple RISC-V chip implementations.
*
- * CARE MUST BE TAKEN TO INCLDUE THE CORRECT
- * freertos_risc_v_port_specific_extensions.h HEADER FILE FOR THE CHIP
- * IN USE. To include the correct freertos_risc_v_port_specific_extensions.h
- * header file ensure the path to the correct header file is in the assembler's
- * include path.
+ * !!!NOTE!!!
+ * CARE MUST BE TAKEN TO INCLUDE THE CORRECT
+ * freertos_risc_v_chip_specific_extensions.h HEADER FILE FOR THE CHIP IN USE.
+ * If the chip in use includes a core local interrupter (CLINT) and does not
+ * include any chip specific register extensions then set the GNU assembler's
+ * include path such that the header file contained in the
+ * FreeRTOS\Source\portable\GCC\RISC-V-RV32 directory is the header file that is
+ * actually inlcuded. Otherwise set the assembler's include patch to the
+ * sub-directory off of the
+ * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions directory
+ * that contains the freertos_risc_v_chip_specific_extensions.h specific to the
+ * target chip.
*
- * This freertos_risc_v_port_specific_extensions.h is for use on RISC-V chips
- * that include a standard CLINT and do not add to the base set of RISC-V
- * registers.
+ */