Add simple USB CDC task.

This commit is contained in:
Richard Barry 2009-08-07 15:30:18 +00:00
parent a83d9d93e8
commit df338c84c3
15 changed files with 2756 additions and 49 deletions

View file

@ -62,6 +62,11 @@
*
* "uIP" task - This is the task that handles the uIP stack. All TCP/IP
* processing is performed in this task.
*
* "USB" task - Enumerates the USB device as a CDC class, then echoes back all
* received characters with a configurable offset (for example, if the offset
* is 1 and 'A' is received then 'B' will be sent back). A dumb terminal such
* as Hyperterminal can be used to talk to the USB task.
*/
/* Scheduler includes. */
@ -116,6 +121,11 @@ static void prvSetupHardware( void );
*/
extern void vuIP_Task( void *pvParameters );
/*
* The task that handles the USB stack.
*/
extern void vUSBTask( void *pvParameters );
/*
* Simply returns the current status message for display on served WEB pages.
*/
@ -145,6 +155,9 @@ int main( void )
vStartRecursiveMutexTasks();
vStartLEDFlashTasks( mainFLASH_TASK_PRIORITY );
/* Create the USB task. */
xTaskCreate( vUSBTask, ( signed char * ) "USB", configMINIMAL_STACK_SIZE, ( void * ) NULL, tskIDLE_PRIORITY, NULL );
/* Create the uIP task. The WEB server runs in this task. */
xTaskCreate( vuIP_Task, ( signed char * ) "uIP", mainBASIC_WEB_STACK_SIZE, ( void * ) NULL, mainUIP_TASK_PRIORITY, NULL );
@ -228,49 +241,6 @@ void prvSetupHardware( void )
/* Disable TPIU. */
PINCON->PINSEL10 = 0;
/* Disconnect the main PLL. */
SC->PLL0CON &= ~PLLCON_PLLC;
SC->PLL0FEED = PLLFEED_FEED1;
SC->PLL0FEED = PLLFEED_FEED2;
while ((SC->PLL0STAT & PLLSTAT_PLLC) != 0);
/* Turn off the main PLL. */
SC->PLL0CON &= ~PLLCON_PLLE;
SC->PLL0FEED = PLLFEED_FEED1;
SC->PLL0FEED = PLLFEED_FEED2;
while ((SC->PLL0STAT & PLLSTAT_PLLE) != 0);
/* No CPU clock divider. */
SC->CCLKCFG = 0;
/* OSCEN. */
SC->SCS = 0x20;
while ((SC->SCS & 0x40) == 0);
/* Use main oscillator. */
SC->CLKSRCSEL = 1;
SC->PLL0CFG = (PLLCFG_MUL16 | PLLCFG_DIV1);
SC->PLL0FEED = PLLFEED_FEED1;
SC->PLL0FEED = PLLFEED_FEED2;
/* Activate the PLL by turning it on then feeding the correct
sequence of bytes. */
SC->PLL0CON = PLLCON_PLLE;
SC->PLL0FEED = PLLFEED_FEED1;
SC->PLL0FEED = PLLFEED_FEED2;
/* 6x CPU clock divider (64 MHz) */
SC->CCLKCFG = 5;
/* Wait for the PLL to lock. */
while ((SC->PLL0STAT & PLLSTAT_PLOCK) == 0);
/* Connect the PLL. */
SC->PLL0CON = PLLCON_PLLC | PLLCON_PLLE;
SC->PLL0FEED = PLLFEED_FEED1;
SC->PLL0FEED = PLLFEED_FEED2;
/* Setup the peripheral bus to be the same as the PLL output (64 MHz). */
SC->PCLKSEL0 = 0x05555555;