Update the Keil and IAR CM0 port layers to match the changes made to the GCC version.

This commit is contained in:
Richard Barry 2013-10-22 11:26:16 +00:00
parent 7bcbef721b
commit dcd261bb8b
3 changed files with 35 additions and 49 deletions

View file

@ -161,7 +161,7 @@ static void prvTaskExitError( void )
void vPortSVCHandler( void ) void vPortSVCHandler( void )
{ {
/* This function is no longer used, but returned for backward /* This function is no longer used, but retained for backward
compatibility. */ compatibility. */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -127,24 +127,9 @@ xPortPendSVHandler:
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
vPortSVCHandler; vPortSVCHandler;
ldr r3, =pxCurrentTCB /* Restore the context. */ /* This function is no longer used, but retained for backward
ldr r1, [r3] /* Get the pxCurrentTCB address. */ compatibility. */
ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */ bx lr
adds r0, r0, #16 /* Move to the high registers. */
ldmia r0!, {r4-r7} /* Pop the high registers. */
mov r8, r4
mov r9, r5
mov r10, r6
mov r11, r7
msr psp, r0 /* Remember the new top of stack for the task. */
subs r0, r0, #32 /* Go back for the low registers that are not automatically restored. */
ldmia r0!, {r4-r7} /* Pop low registers. */
mov r1, r14 /* OR R14 with 0x0d. */
movs r0, #0x0d
orrs r1, r0
bx r1
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -152,9 +137,18 @@ vPortStartFirstTask
/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
table offset register that can be used to locate the initial stack value. table offset register that can be used to locate the initial stack value.
Not all M0 parts have the application vector table at address 0. */ Not all M0 parts have the application vector table at address 0. */
cpsie i /* Globally enable interrupts. */
svc 0 /* System call to start first task. */ ldr r3, =pxCurrentTCB /* Obtain location of pxCurrentTCB. */
nop ldr r1, [r3]
ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
adds r0, #32 /* Discard everything up to r0. */
msr psp, r0 /* This is now the new top of stack to use in the task. */
movs r0, #2 /* Switch to the psp stack. */
msr CONTROL, r0
pop {r0-r5} /* Pop the registers that are saved automatically. */
mov lr, r5 /* lr is now in r5. */
cpsie i /* The first task has its context and interrupts can be enabled. */
pop {pc} /* Finally, pop the PC to jump to the user defined task code. */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -153,43 +153,35 @@ static void prvTaskExitError( void )
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
__asm void vPortSVCHandler( void ) void vPortSVCHandler( void )
{ {
extern pxCurrentTCB; /* This function is no longer used, but retained for backward
compatibility. */
PRESERVE8
ldr r3, =pxCurrentTCB /* Obtain location of pxCurrentTCB. */
ldr r1, [r3]
ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
adds r0, #16 /* Pop the high registers. */
ldmia r0!, {r4-r7}
mov r8, r4
mov r9, r5
mov r10, r6
mov r11, r7
msr psp, r0 /* Remember the new top of stack for the task. */
subs r0, #32 /* Go back for the low registers that are not automatically restored. */
ldmia r0!, {r4-r7} /* Pop low registers. */
mov r1, r14 /* OR R14 with 0x0d. */
movs r0, #0x0d
orrs r1, r0
bx r1
ALIGN
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
__asm void prvPortStartFirstTask( void ) __asm void prvPortStartFirstTask( void )
{ {
extern pxCurrentTCB;
PRESERVE8 PRESERVE8
/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
table offset register that can be used to locate the initial stack value. table offset register that can be used to locate the initial stack value.
Not all M0 parts have the application vector table at address 0. */ Not all M0 parts have the application vector table at address 0. */
cpsie i /* Globally enable interrupts. */
svc 0 /* System call to start first task. */ ldr r3, =pxCurrentTCB /* Obtain location of pxCurrentTCB. */
ldr r1, [r3]
ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
adds r0, #32 /* Discard everything up to r0. */
msr psp, r0 /* This is now the new top of stack to use in the task. */
movs r0, #2 /* Switch to the psp stack. */
msr CONTROL, r0
pop {r0-r5} /* Pop the registers that are saved automatically. */
mov lr, r5 /* lr is now in r5. */
cpsie i /* The first task has its context and interrupts can be enabled. */
pop {pc} /* Finally, pop the PC to jump to the user defined task code. */
ALIGN ALIGN
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/