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First task running in RISC-V-Qemu-sifive_e-FreedomStudio demo.

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This commit is contained in:
Richard Barry 2018-11-24 20:59:07 +00:00
parent d0ef322b13
commit dc99300fa9
11 changed files with 422 additions and 277 deletions
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7
FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S
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@ -41,13 +41,16 @@
.global xPortStartFirstTask
.global vPortTrapHandler
.extern pxCurrentTCB
.extern handle_trap
.extern ulPortTrapHandler
/*-----------------------------------------------------------*/
.align 8
xPortStartFirstTask:
la t0, vPortTrapHandler
csrw mtvec, t0
lw sp, pxCurrentTCB /* Load pxCurrentTCB. */
lw sp, 0( sp ) /* Read sp from first TCB member. */
@ -127,7 +130,7 @@ vPortTrapHandler:
csrr a1, mepc
mv a2, sp
/*_RB_ Does stack need aligning here? */
jal handle_trap
jal ulPortTrapHandler
csrw mepc, a0
/* Save exception return address. */
sw a0, 0( sp )