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First task running in RISC-V-Qemu-sifive_e-FreedomStudio demo.

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This commit is contained in:
Richard Barry 2018-11-24 20:59:07 +00:00
parent d0ef322b13
commit dc99300fa9
11 changed files with 422 additions and 277 deletions
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18
FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c
View file

@ -51,7 +51,7 @@ static void prvTaskExitError( void );
/* Used to program the machine timer compare register. */
static uint64_t ullNextTime = 0ULL;
static const uint64_t ullTimerIncrementsForOneTick = ( uint64_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
static volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) ( configCTRL_BASE + 0x4000 );
static volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) ( configCLINT_BASE_ADDRESS + 0x4000 );
/*-----------------------------------------------------------*/
@ -175,8 +175,8 @@ const uint32_t ulMPIE_Bit = 0x80, ulMPP_Bits = 0x1800;
void vPortSetupTimerInterrupt( void )
{
uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFFC );
volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFF8 );
volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFFC );
volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFF8 );
do
{
@ -200,12 +200,12 @@ volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCTR
void Software_IRQHandler( void )
{
volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCTRL_BASE;
volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCLINT_BASE_ADDRESS;
vTaskSwitchContext();
/* Clear software interrupt. */
*( ( uint32_t * ) configCTRL_BASE ) &= 0x08UL;
*( ( uint32_t * ) configCLINT_BASE_ADDRESS ) &= 0x08UL;
}
/*-----------------------------------------------------------*/
@ -246,6 +246,14 @@ extern void xPortStartFirstTask( void );
should be executing. */
return pdFAIL;
}
/*-----------------------------------------------------------*/
void vPortEndScheduler( void )
{
/* Not implemented. */
for( ;; );
}

7
FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S
View file

@ -41,13 +41,16 @@
.global xPortStartFirstTask
.global vPortTrapHandler
.extern pxCurrentTCB
.extern handle_trap
.extern ulPortTrapHandler
/*-----------------------------------------------------------*/
.align 8
xPortStartFirstTask:
la t0, vPortTrapHandler
csrw mtvec, t0
lw sp, pxCurrentTCB /* Load pxCurrentTCB. */
lw sp, 0( sp ) /* Read sp from first TCB member. */
@ -127,7 +130,7 @@ vPortTrapHandler:
csrr a1, mepc
mv a2, sp
/*_RB_ Does stack need aligning here? */
jal handle_trap
jal ulPortTrapHandler
csrw mepc, a0
/* Save exception return address. */
sw a0, 0( sp )

2
FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h
View file

@ -70,7 +70,7 @@ not need to be guarded with a critical section. */
/* Scheduler utilities. */
#define portYIELD() __asm volatile( "ecall" ); // software interrupt alternative *( ( uint32_t * ) configCTRL_BASE ) |= 0x08UL
#define portYIELD() __asm volatile( "ecall" ); // software interrupt alternative *( ( uint32_t * ) configCLINT_BASE_ADDRESS ) |= 0x08UL
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYield()
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/