mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Revert Portable/CodeWarrior formatting (#831)
Revert the formatting on CodeWarrior ports
This commit is contained in:
Soren Ptak
GitHub
parent
de2c0c1a95
commit
db5df4bfde
6 changed files with 237 additions and 248 deletions
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@ -32,8 +32,8 @@
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the HCS12 port.
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*----------------------------------------------------------*/
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* Implementation of functions defined in portable.h for the HCS12 port.
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*----------------------------------------------------------*/
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/*
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@ -43,29 +43,29 @@
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static void prvSetupTimerInterrupt( void );
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/* Interrupt service routines have to be in non-banked memory - as does the
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* scheduler startup function. */
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scheduler startup function. */
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#pragma CODE_SEG __NEAR_SEG NON_BANKED
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/* Manual context switch function. This is the SWI ISR. */
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void interrupt vPortYield( void );
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/* Manual context switch function. This is the SWI ISR. */
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void interrupt vPortYield( void );
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/* Tick context switch function. This is the timer ISR. */
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void interrupt vPortTickInterrupt( void );
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/* Tick context switch function. This is the timer ISR. */
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void interrupt vPortTickInterrupt( void );
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/* Simply called by xPortStartScheduler(). xPortStartScheduler() does not
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* start the scheduler directly because the header file containing the
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* xPortStartScheduler() prototype is part of the common kernel code, and
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* therefore cannot use the CODE_SEG pragma. */
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static BaseType_t xBankedStartScheduler( void );
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/* Simply called by xPortStartScheduler(). xPortStartScheduler() does not
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start the scheduler directly because the header file containing the
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xPortStartScheduler() prototype is part of the common kernel code, and
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therefore cannot use the CODE_SEG pragma. */
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static BaseType_t xBankedStartScheduler( void );
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#pragma CODE_SEG DEFAULT
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/* Calls to portENTER_CRITICAL() can be nested. When they are nested the
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* critical section should not be left (i.e. interrupts should not be re-enabled)
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* until the nesting depth reaches 0. This variable simply tracks the nesting
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* depth. Each task maintains it's own critical nesting depth variable so
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* uxCriticalNesting is saved and restored from the task stack during a context
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* switch. */
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critical section should not be left (i.e. interrupts should not be re-enabled)
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until the nesting depth reaches 0. This variable simply tracks the nesting
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depth. Each task maintains it's own critical nesting depth variable so
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uxCriticalNesting is saved and restored from the task stack during a context
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switch. */
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volatile UBaseType_t uxCriticalNesting = 0xff;
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/*-----------------------------------------------------------*/
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@ -73,33 +73,31 @@ volatile UBaseType_t uxCriticalNesting = 0xff;
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/*
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* See header file for description.
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*/
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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/*
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* Place a few bytes of known values on the bottom of the stack.
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* This can be uncommented to provide useful stack markers when debugging.
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*
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* pxTopOfStack = ( StackType_t ) 0x11;
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* pxTopOfStack--;
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* pxTopOfStack = ( StackType_t ) 0x22;
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* pxTopOfStack--;
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* pxTopOfStack = ( StackType_t ) 0x33;
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* pxTopOfStack--;
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*/
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Place a few bytes of known values on the bottom of the stack.
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This can be uncommented to provide useful stack markers when debugging.
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*pxTopOfStack = ( StackType_t ) 0x11;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x22;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x33;
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pxTopOfStack--;
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*/
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/* Setup the initial stack of the task. The stack is set exactly as
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* expected by the portRESTORE_CONTEXT() macro. In this case the stack as
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* expected by the HCS12 RTI instruction. */
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expected by the portRESTORE_CONTEXT() macro. In this case the stack as
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expected by the HCS12 RTI instruction. */
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/* The address of the task function is placed in the stack byte at a time. */
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*pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pxCode ) ) + 1 );
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*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 1 );
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pxCode ) ) + 0 );
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*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pxCode) ) + 0 );
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pxTopOfStack--;
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/* Next are all the registers that form part of the task context. */
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@ -117,15 +115,15 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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pxTopOfStack--;
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/* A register contains parameter high byte. */
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*pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pvParameters ) ) + 0 );
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*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 0 );
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pxTopOfStack--;
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/* B register contains parameter low byte. */
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*pxTopOfStack = ( StackType_t ) *( ( ( StackType_t * ) ( &pvParameters ) ) + 1 );
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*pxTopOfStack = ( StackType_t ) *( ((StackType_t *) (&pvParameters) ) + 1 );
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pxTopOfStack--;
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/* CCR: Note that when the task starts interrupts will be enabled since
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* "I" bit of CCR is cleared */
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"I" bit of CCR is cleared */
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*pxTopOfStack = ( StackType_t ) 0x00;
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pxTopOfStack--;
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@ -136,7 +134,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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#endif
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/* Finally the critical nesting depth is initialised with 0 (not within
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* a critical section). */
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a critical section). */
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*pxTopOfStack = ( StackType_t ) 0x00;
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return pxTopOfStack;
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@ -159,10 +157,10 @@ static void prvSetupTimerInterrupt( void )
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BaseType_t xPortStartScheduler( void )
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{
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/* xPortStartScheduler() does not start the scheduler directly because
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* the header file containing the xPortStartScheduler() prototype is part
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* of the common kernel code, and therefore cannot use the CODE_SEG pragma.
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* Instead it simply calls the locally defined xBankedStartScheduler() -
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* which does use the CODE_SEG pragma. */
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the header file containing the xPortStartScheduler() prototype is part
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of the common kernel code, and therefore cannot use the CODE_SEG pragma.
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Instead it simply calls the locally defined xBankedStartScheduler() -
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which does use the CODE_SEG pragma. */
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return xBankedStartScheduler();
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}
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@ -173,7 +171,7 @@ BaseType_t xPortStartScheduler( void )
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static BaseType_t xBankedStartScheduler( void )
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{
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/* Configure the timer that will generate the RTOS tick. Interrupts are
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* disabled when this function is called. */
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disabled when this function is called. */
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prvSetupTimerInterrupt();
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/* Restore the context of the first task. */
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@ -224,15 +222,15 @@ void interrupt vPortTickInterrupt( void )
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TFLG1 = 1;
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/* Restore the context of a task - which may be a different task
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* to that interrupted. */
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to that interrupted. */
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portRESTORE_CONTEXT();
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}
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#else /* if configUSE_PREEMPTION == 1 */
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#else
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{
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xTaskIncrementTick();
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TFLG1 = 1;
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}
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#endif /* if configUSE_PREEMPTION == 1 */
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#endif
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}
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#pragma CODE_SEG DEFAULT
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@ -41,40 +41,40 @@
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*/
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint8_t
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#define portBASE_TYPE char
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint8_t
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#define portBASE_TYPE char
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typedef portSTACK_TYPE StackType_t;
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typedef signed char BaseType_t;
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typedef unsigned char UBaseType_t;
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typedef portSTACK_TYPE StackType_t;
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typedef signed char BaseType_t;
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typedef unsigned char UBaseType_t;
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#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#if( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) ( 0xFFFFFFFFUL )
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) ( 0xFFFFFFFFUL )
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#else
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#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
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#endif
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/*-----------------------------------------------------------*/
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/* Hardware specifics. */
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#define portBYTE_ALIGNMENT 1
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portYIELD() __asm( "swi" );
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#define portNOP() __asm( "nop" );
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#define portBYTE_ALIGNMENT 1
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portYIELD() __asm( "swi" );
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#define portNOP() __asm( "nop" );
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/*-----------------------------------------------------------*/
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/* Critical section handling. */
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#define portENABLE_INTERRUPTS() __asm( "cli" )
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#define portDISABLE_INTERRUPTS() __asm( "sei" )
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#define portENABLE_INTERRUPTS() __asm( "cli" )
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#define portDISABLE_INTERRUPTS() __asm( "sei" )
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/*
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* Disable interrupts before incrementing the count of critical section nesting.
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@ -82,29 +82,29 @@ typedef unsigned char UBaseType_t;
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* re-enabled. Once interrupts are disabled the nesting count can be accessed
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* directly. Each task maintains its own nesting count.
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*/
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#define portENTER_CRITICAL() \
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{ \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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portDISABLE_INTERRUPTS(); \
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uxCriticalNesting++; \
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}
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#define portENTER_CRITICAL() \
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{ \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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portDISABLE_INTERRUPTS(); \
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uxCriticalNesting++; \
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}
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/*
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* Interrupts are disabled so we can access the nesting count directly. If the
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* nesting is found to be 0 (no nesting) then we are leaving the critical
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* section and interrupts can be re-enabled.
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*/
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#define portEXIT_CRITICAL() \
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{ \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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uxCriticalNesting--; \
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if( uxCriticalNesting == 0 ) \
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{ \
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portENABLE_INTERRUPTS(); \
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} \
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}
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#define portEXIT_CRITICAL() \
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{ \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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uxCriticalNesting--; \
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if( uxCriticalNesting == 0 ) \
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{ \
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portENABLE_INTERRUPTS(); \
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} \
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}
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/*-----------------------------------------------------------*/
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/* Task utilities. */
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@ -120,71 +120,70 @@ typedef unsigned char UBaseType_t;
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*/
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#ifdef BANKED_MODEL
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/*
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* Load the stack pointer for the task, then pull the critical nesting
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* count and PPAGE register from the stack. The remains of the
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* context are restored by the RTI instruction.
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*/
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#define portRESTORE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "lds 0, x" ); \
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__asm( "pula" ); \
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__asm( "staa uxCriticalNesting" ); \
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__asm( "pula" ); \
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__asm( "staa 0x30" ); /* 0x30 = PPAGE */ \
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/*
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* Load the stack pointer for the task, then pull the critical nesting
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* count and PPAGE register from the stack. The remains of the
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* context are restored by the RTI instruction.
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*/
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#define portRESTORE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "lds 0, x" ); \
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__asm( "pula" ); \
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__asm( "staa uxCriticalNesting" ); \
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__asm( "pula" ); \
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__asm( "staa 0x30" ); /* 0x30 = PPAGE */ \
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}
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/*
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* By the time this macro is called the processor has already stacked the
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* registers. Simply stack the nesting count and PPAGE value, then save
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* the task stack pointer.
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*/
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#define portSAVE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldaa 0x30" ); /* 0x30 = PPAGE */ \
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__asm( "psha" ); \
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__asm( "ldaa uxCriticalNesting" ); \
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__asm( "psha" ); \
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "sts 0, x" ); \
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/*
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* By the time this macro is called the processor has already stacked the
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* registers. Simply stack the nesting count and PPAGE value, then save
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* the task stack pointer.
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*/
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#define portSAVE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldaa 0x30" ); /* 0x30 = PPAGE */ \
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__asm( "psha" ); \
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__asm( "ldaa uxCriticalNesting" ); \
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__asm( "psha" ); \
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "sts 0, x" ); \
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}
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#else /* ifdef BANKED_MODEL */
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#else
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/*
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* These macros are as per the BANKED versions above, but without saving
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* and restoring the PPAGE register.
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*/
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/*
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* These macros are as per the BANKED versions above, but without saving
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* and restoring the PPAGE register.
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*/
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#define portRESTORE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "lds 0, x" ); \
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__asm( "pula" ); \
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__asm( "staa uxCriticalNesting" ); \
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#define portRESTORE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "lds 0, x" ); \
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__asm( "pula" ); \
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__asm( "staa uxCriticalNesting" ); \
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}
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#define portSAVE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldaa uxCriticalNesting" ); \
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__asm( "psha" ); \
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "sts 0, x" ); \
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#define portSAVE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldaa uxCriticalNesting" ); \
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__asm( "psha" ); \
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "sts 0, x" ); \
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}
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#endif /* ifdef BANKED_MODEL */
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#endif
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/*
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* Utility macro to call macros above in correct order in order to perform a
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@ -192,14 +191,14 @@ typedef unsigned char UBaseType_t;
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* the ISR does not use any local (stack) variables. If the ISR uses stack
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* variables portYIELD() should be used in it's place.
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*/
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#define portTASK_SWITCH_FROM_ISR() \
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portSAVE_CONTEXT(); \
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vTaskSwitchContext(); \
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#define portTASK_SWITCH_FROM_ISR() \
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portSAVE_CONTEXT(); \
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vTaskSwitchContext(); \
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portRESTORE_CONTEXT();
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/* Task function macros as described on the FreeRTOS.org WEB site. */
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#endif /* PORTMACRO_H */
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