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Suppress MISRA C rule 11.3 in MISRA.md (#857)
Suppress MISRA C rule 11.3 in MISRA.md
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MISRA.md
19
MISRA.md
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@ -31,6 +31,25 @@ _Ref 8.4.1_
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a declaration in header file is not useful as the assembly code will
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still need to declare it separately.
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#### Rule 11.3
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_Ref 11.3.1_
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- MISRA C:2012 Rule 11.3: A cast shall not be performed between a pointer to
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object type and a pointer to a different object type.
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This rule prohibits casting a pointer to object into a pointer to a
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different object because it may result in an incorrectly aligned pointer,
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leading to undefined behavior. Even if the casting produces a correctly
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aligned pointer, the behavior may be still undefined if the pointer is
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used to access an object. FreeRTOS deliberately creates external aliases
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for all the kernel object types (StaticEventGroup_t, StaticQueue_t,
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StaticStreamBuffer_t, StaticTimer_t and StaticTask_t) for data hiding
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purposes. The internal object types and the corresponding external
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aliases are guaranteed to have the same size and alignment which is
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checked using configASSERT.
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### MISRA configuration
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Copy below content to `misra.conf` to run Coverity on FreeRTOS-Kernel.
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@ -98,7 +98,10 @@ static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits,
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#endif /* configASSERT_DEFINED */
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/* The user has provided a statically allocated event group - use it. */
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pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer; /*lint !e740 !e9087 EventGroup_t and StaticEventGroup_t are deliberately aliased for data hiding purposes and guaranteed to have the same size and alignment requirement - checked by configASSERT(). */
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/* MISRA Ref 11.3.1 [Misaligned access] */
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/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
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/* coverity[misra_c_2012_rule_11_3_violation] */
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pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer;
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if( pxEventBits != NULL )
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{
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@ -710,6 +713,9 @@ void vEventGroupDelete( EventGroupHandle_t xEventGroup )
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/* Check if the event group was statically allocated. */
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if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdTRUE )
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{
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/* MISRA Ref 11.3.1 [Misaligned access] */
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/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
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/* coverity[misra_c_2012_rule_11_3_violation] */
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*ppxEventGroupBuffer = ( StaticEventGroup_t * ) pxEventBits;
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xReturn = pdTRUE;
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}
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@ -721,6 +727,9 @@ void vEventGroupDelete( EventGroupHandle_t xEventGroup )
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#else /* configSUPPORT_DYNAMIC_ALLOCATION */
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{
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/* Event group must have been statically allocated. */
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/* MISRA Ref 11.3.1 [Misaligned access] */
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/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
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/* coverity[misra_c_2012_rule_11_3_violation] */
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*ppxEventGroupBuffer = ( StaticEventGroup_t * ) pxEventBits;
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xReturn = pdTRUE;
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}
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8
queue.c
8
queue.c
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@ -408,7 +408,10 @@ BaseType_t xQueueGenericReset( QueueHandle_t xQueue,
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/* The address of a statically allocated queue was passed in, use it.
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* The address of a statically allocated storage area was also passed in
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* but is already set. */
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pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
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/* MISRA Ref 11.3.1 [Misaligned access] */
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/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
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/* coverity[misra_c_2012_rule_11_3_violation] */
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pxNewQueue = ( Queue_t * ) pxStaticQueue;
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#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
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{
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@ -459,6 +462,9 @@ BaseType_t xQueueGenericReset( QueueHandle_t xQueue,
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*ppucQueueStorage = ( uint8_t * ) pxQueue->pcHead;
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}
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/* MISRA Ref 11.3.1 [Misaligned access] */
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/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
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/* coverity[misra_c_2012_rule_11_3_violation] */
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*ppxStaticQueue = ( StaticQueue_t * ) pxQueue;
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xReturn = pdTRUE;
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}
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@ -406,7 +406,10 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
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StreamBufferCallbackFunction_t pxSendCompletedCallback,
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StreamBufferCallbackFunction_t pxReceiveCompletedCallback )
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{
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StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer; /*lint !e740 !e9087 Safe cast as StaticStreamBuffer_t is opaque Streambuffer_t. */
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/* MISRA Ref 11.3.1 [Misaligned access] */
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/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
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/* coverity[misra_c_2012_rule_11_3_violation] */
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StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer;
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StreamBufferHandle_t xReturn;
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uint8_t ucFlags;
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@ -466,7 +469,10 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
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traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer );
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xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer; /*lint !e9087 Data hiding requires cast to opaque type. */
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/* MISRA Ref 11.3.1 [Misaligned access] */
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/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
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/* coverity[misra_c_2012_rule_11_3_violation] */
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xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer;
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}
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else
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{
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@ -498,6 +504,9 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
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if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_STATICALLY_ALLOCATED ) != ( uint8_t ) 0 )
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{
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*ppucStreamBufferStorageArea = pxStreamBuffer->pucBuffer;
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/* MISRA Ref 11.3.1 [Misaligned access] */
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/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
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/* coverity[misra_c_2012_rule_11_3_violation] */
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*ppxStaticStreamBuffer = ( StaticStreamBuffer_t * ) pxStreamBuffer;
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xReturn = pdTRUE;
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}
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8
tasks.c
8
tasks.c
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@ -1271,7 +1271,10 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
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{
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/* The memory used for the task's TCB and stack are passed into this
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* function - use them. */
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pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
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/* MISRA Ref 11.3.1 [Misaligned access] */
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/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
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/* coverity[misra_c_2012_rule_11_3_violation] */
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pxNewTCB = ( TCB_t * ) pxTaskBuffer;
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( void ) memset( ( void * ) pxNewTCB, 0x00, sizeof( TCB_t ) );
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pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
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@ -4354,6 +4357,9 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char
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if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB )
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{
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*ppuxStackBuffer = pxTCB->pxStack;
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/* MISRA Ref 11.3.1 [Misaligned access] */
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/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
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/* coverity[misra_c_2012_rule_11_3_violation] */
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*ppxTaskBuffer = ( StaticTask_t * ) pxTCB;
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xReturn = pdTRUE;
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}
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8
timers.c
8
timers.c
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@ -394,7 +394,10 @@
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/* A pointer to a StaticTimer_t structure MUST be provided, use it. */
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configASSERT( pxTimerBuffer );
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pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. */
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/* MISRA Ref 11.3.1 [Misaligned access] */
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/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
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/* coverity[misra_c_2012_rule_11_3_violation] */
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pxNewTimer = ( Timer_t * ) pxTimerBuffer;
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if( pxNewTimer != NULL )
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{
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@ -664,6 +667,9 @@
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if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) != 0U )
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{
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/* MISRA Ref 11.3.1 [Misaligned access] */
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/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
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/* coverity[misra_c_2012_rule_11_3_violation] */
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*ppxTimerBuffer = ( StaticTimer_t * ) pxTimer;
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xReturn = pdTRUE;
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}
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