PPC405 work in progress.

Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/RTOSDemo.ld

@@ -18,7 +18,7 @@ _HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x2000;
 MEMORY
 {
    SRAM_256Kx32_C_MEM0_BASEADDR : ORIGIN = 0x00000000, LENGTH = 0x00100000
-   plb_bram_if_cntlr_1 : ORIGIN = 0xFFFFC000, LENGTH = 0x00004000
+   plb_bram_if_cntlr_1 : ORIGIN = 0xFFFFF000, LENGTH = 0x00001000
 }
 
 /* Specify the default entry point to the program */

Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/main.c

@@ -77,6 +77,7 @@
 #include "death.h"
 #include "partest.h"
 #include "xcache_l.h"
+#include "xintc.h"
 
 #define mainCHECK_TASK_PRIORITY			( tskIDLE_PRIORITY + 4 )
 #define mainSEM_TEST_PRIORITY			( tskIDLE_PRIORITY + 3 )
@@ -102,16 +103,27 @@ static void prvErrorChecks( void *pvParameters );
 static unsigned portBASE_TYPE xRegTestStatus = pdPASS;
 static portSHORT prvCheckOtherTasksAreStillRunning( void );
 
+XIntc xInterruptController;
+extern void vPortISRWrapper( void );
+
 int main( void )
 {
 	XCache_EnableICache( 0x80000000 );
 	XCache_EnableDCache( 0x80000000 );
+
+	XExc_Init();
+	XExc_mDisableExceptions( XEXC_NON_CRITICAL );
+    XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, (XExceptionHandler)vPortISRWrapper, &xInterruptController );
+
+	XIntc_Initialize( &xInterruptController, XPAR_OPB_INTC_0_DEVICE_ID );
+	XIntc_Start( &xInterruptController, XIN_REAL_MODE );
+
 	vParTestInitialise();
 
 	/* Start the standard demo application tasks. */
 	vStartLEDFlashTasks( mainLED_TASK_PRIORITY );	
 	vStartIntegerMathTasks( tskIDLE_PRIORITY );
-	vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED - 1 );
+	vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
 	vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
 	vStartBlockingQueueTasks ( mainQUEUE_BLOCK_PRIORITY );	
 	vStartDynamicPriorityTasks();	
@@ -215,7 +227,7 @@ static void prvErrorChecks( void *pvParameters )
 portTickType xDelayPeriod = mainNO_ERROR_CHECK_DELAY, xLastExecutionTime;
 volatile unsigned portBASE_TYPE uxFreeStack;
 
-	uxFreeStack = uxTaskGetStackHighWaterMark();
+	uxFreeStack = uxTaskGetStackHighWaterMark( NULL );
 
 	/* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()
 	works correctly. */
@@ -225,7 +237,7 @@ volatile unsigned portBASE_TYPE uxFreeStack;
 	operating without error. */
 	for( ;; )
 	{
-		uxFreeStack = uxTaskGetStackHighWaterMark();
+		uxFreeStack = uxTaskGetStackHighWaterMark( NULL );
 
 		/* Wait until it is time to check again.  The time we wait here depends
 		on whether an error has been detected or not.  When an error is 

Demo/PPC405_Xilinx_Virtex4_GCC/RTOSDemo/serial/serial.c

@@ -54,8 +54,11 @@
 #include "serial.h"
 
 /* Microblaze driver includes. */
+#include "xparameters.h"
+#include "xuartlite.h"
 #include "xuartlite_l.h"
 #include "xintc_l.h"
+#include "xintc.h"
 
 /*-----------------------------------------------------------*/
 
@@ -64,11 +67,16 @@ transmitted. */
 static xQueueHandle xRxedChars; 
 static xQueueHandle xCharsForTx; 
 
+static XUartLite xUART;
+
+static void vSerialISR( XUartLite *pxUART );
+
 /*-----------------------------------------------------------*/
 
 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
 {
 unsigned portLONG ulControlReg, ulMask;
+extern XIntc xInterruptController;
 
 	/* NOTE: The baud rate used by this driver is determined by the hardware
 	parameterization of the UART Lite peripheral, and the baud value passed to
@@ -80,18 +88,14 @@ unsigned portLONG ulControlReg, ulMask;
 
 	if( ( xRxedChars ) && ( xCharsForTx ) )
 	{
-		/* Disable the interrupt. */
-		XUartLite_mDisableIntr( XPAR_RS232_UART_BASEADDR );
 
-		/* Flush the fifos. */
+		XUartLite_Initialize( &xUART, XPAR_RS232_UART_DEVICE_ID );
-		ulControlReg = XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_STATUS_REG_OFFSET );
+		XUartLite_ResetFifos( &xUART );
-		XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_CONTROL_REG_OFFSET, ulControlReg | XUL_CR_FIFO_TX_RESET | XUL_CR_FIFO_RX_RESET );
+		XUartLite_DisableInterrupt( &xUART );
+		XIntc_Connect( &xInterruptController, XPAR_OPB_INTC_0_RS232_UART_INTERRUPT_INTR, ( XInterruptHandler )vSerialISR, (void *)&xUART );
+		XIntc_Enable( &xInterruptController, XPAR_OPB_INTC_0_RS232_UART_INTERRUPT_INTR );
 		
-		/* Register the handler. */
+		XUartLite_EnableInterrupt( &xUART );
-		XExc_RegisterHandler( XEXC_ID_UART0_INT, ( XExceptionHandler ) vSerialISR, ( void * ) 0 );
-
-		/* Enable the interrupt again. */
-		XUartLite_mEnableIntr( XPAR_RS232_UART_BASEADDR );
 	}
 	
 	return ( xComPortHandle ) 0;
@@ -162,21 +166,20 @@ void vSerialClose( xComPortHandle xPort )
 }
 /*-----------------------------------------------------------*/
 
-void vSerialISR( void *pvBaseAddress )
+static void vSerialISR( XUartLite *pxUART )
 {
 unsigned portLONG ulISRStatus;
 portBASE_TYPE xTaskWokenByTx = pdFALSE, xTaskWokenByRx = pdFALSE;
 portCHAR cChar;
 
-	/* Determine the cause of the interrupt. */
+    ulISRStatus = XIo_In32( pxUART->RegBaseAddress + XUL_STATUS_REG_OFFSET );
-    ulISRStatus = XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_STATUS_REG_OFFSET );
 
     if( ( ulISRStatus & (XUL_SR_RX_FIFO_FULL | XUL_SR_RX_FIFO_VALID_DATA ) ) != 0 )
     {
 		/* A character is available - place it in the queue of received
 		characters.  This might wake a task that was blocked waiting for 
 		data. */
-		cChar = ( portCHAR )XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_RX_FIFO_OFFSET );
+		cChar = ( portCHAR ) XIo_In32( pxUART->RegBaseAddress + XUL_RX_FIFO_OFFSET );
 		xTaskWokenByRx = xQueueSendFromISR( xRxedChars, &cChar, xTaskWokenByRx );
     }
 
@@ -187,8 +190,9 @@ portCHAR cChar;
 		task that was waiting for space to become available on the Tx queue. */
 		if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xTaskWokenByTx ) == pdTRUE )
 		{
-			XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_TX_FIFO_OFFSET, cChar );
+			XIo_Out32( pxUART->RegBaseAddress + XUL_TX_FIFO_OFFSET, cChar );
 		}
+
     }
 
 	/* If we woke any tasks we may require a context switch. */
@@ -197,3 +201,6 @@ portCHAR cChar;
 		portYIELD_FROM_ISR();
 	}
 }
+
+
+

Demo/PPC405_Xilinx_Virtex4_GCC/__xps/rtosdemo_compiler.opt

@@ -3,7 +3,7 @@ RTOSDEMO_SOURCES = RTOSDemo/main.c RTOSDemo/serial/serial.c RTOSDemo/partest/par
 RTOSDEMO_HEADERS = RTOSDemo/FreeRTOSConfig.h 
 RTOSDEMO_CC = powerpc-eabi-gcc
 RTOSDEMO_CC_SIZE = powerpc-eabi-size
-RTOSDEMO_CC_OPT = -Os
+RTOSDEMO_CC_OPT = -O0
 RTOSDEMO_CFLAGS = -D GCC_PPC405 -mregnames -Xlinker -Map=rtosdemo.map
 RTOSDEMO_CC_SEARCH = # -B
 RTOSDEMO_LIBPATH = -L./ppc405_0/lib/ # -L

Demo/PPC405_Xilinx_Virtex4_GCC/system.xmp

@@ -61,7 +61,7 @@ Header: RTOSDemo/FreeRTOSConfig.h
 DefaultInit: EXECUTABLE
 InitBram: 0
 Active: 1
-CompilerOptLevel: 4
+CompilerOptLevel: 0
 GlobPtrOpt: 0
 DebugSym: 1
 ProfileFlag: 0

Demo/PPC405_Xilinx_Virtex4_GCC/system_incl.make

@@ -115,7 +115,7 @@ RTOSDEMO_HEADERS = RTOSDemo/FreeRTOSConfig.h
 
 RTOSDEMO_CC = powerpc-eabi-gcc
 RTOSDEMO_CC_SIZE = powerpc-eabi-size
-RTOSDEMO_CC_OPT = -Os
+RTOSDEMO_CC_OPT = -O0
 RTOSDEMO_CFLAGS = -D GCC_PPC405 -mregnames -Xlinker -Map=rtosdemo.map
 RTOSDEMO_CC_SEARCH = # -B
 RTOSDEMO_LIBPATH = -L./ppc405_0/lib/ # -L