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Add CC-RH port for Renesas F1Kx devices (#1100)
Add CC-RH port for Renesas F1Kx devices
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Trong Nguyen
GitHub
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c963d24001
commit
da3c35aa48
5 changed files with 1315 additions and 1 deletions
325
portable/CCRH/F1Kx/portasm.s
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325
portable/CCRH/F1Kx/portasm.s
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;/*
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; * FreeRTOS Kernel <DEVELOPMENT BRANCH>
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; * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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; *
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; * SPDX-License-Identifier: MIT
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; *
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; * Permission is hereby granted, free of charge, to any person obtaining a copy of
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; * this software and associated documentation files (the "Software"), to deal in
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; * the Software without restriction, including without limitation the rights to
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; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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; * the Software, and to permit persons to whom the Software is furnished to do so,
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; * subject to the following conditions:
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; *
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; * The above copyright notice and this permission notice shall be included in all
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; * copies or substantial portions of the Software.
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; *
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; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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; *
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; * https://www.FreeRTOS.org
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; * https://github.com/FreeRTOS
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; *
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; */
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;------------------------------------------------------------------------------
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; Extern symbols
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;------------------------------------------------------------------------------
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.extern _uxInterruptNesting
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.extern _uxPortMaxInterruptDepth
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.extern _xPortScheduleStatus
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.extern _vTaskSwitchContext
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.extern _pvPortGetCurrentTCB
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.extern _vCommonISRHandler
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.extern _xPortGET_CORE_ID
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.public _vIrq_Handler
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.public _vPortStartFirstTask
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.public _vPortYield
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.public _vTRAP0_Handler
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;------------------------------------------------------------------------------
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; Macro definitions
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;------------------------------------------------------------------------------
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EIPC .set 0
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EIPSW .set 1
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PSW .set 5
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FPSR .set 6
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FPEPC .set 7
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EIIC .set 13
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CTPC .set 16
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CTPSW .set 17
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EIIC_MSK .set 0x00000FFF
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FPU_MSK .set 0x00010000
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;------------------------------------------------------------------------------
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; portSAVE_CONTEXT
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; Context saving
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;------------------------------------------------------------------------------
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portSAVE_CONTEXT .macro
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prepare lp, 0
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; Save general-purpose registers and EIPSW, EIPC, EIIC, CTPSW, CTPC into stack.
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pushsp r5, r30
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$nowarning
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pushsp r1, r2
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$warning
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stsr EIPSW, r15
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stsr EIPC, r16
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stsr EIIC, r17
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stsr CTPSW, r18
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stsr CTPC, r19
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pushsp r15, r19
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; Save FPU registers to stack if FPU is enabled
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mov FPU_MSK, r19
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tst r15, r19
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; Jump over next 3 instructions: stsr (4 bytes)*2 + pushsp (4 bytes)
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bz 12
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stsr FPSR, r18
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stsr FPEPC, r19
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pushsp r18, r19
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; Get current TCB, the return value is stored in r10 (CCRH compiler)
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jarl _pvPortGetCurrentTCB, lp
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st.w sp, 0[r10]
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.endm
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;------------------------------------------------------------------------------
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; portRESTORE_CONTEXT
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; Context restoring
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;------------------------------------------------------------------------------
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portRESTORE_CONTEXT .macro
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; Current TCB is returned by r10 (CCRH compiler)
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jarl _pvPortGetCurrentTCB, lp
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ld.w 0[r10], sp ; Restore the stack pointer from the TCB
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; Restore FPU registers if FPU is enabled
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mov FPU_MSK, r19
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stsr PSW, r18
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tst r18, r19
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; Jump over next 3 instructions: stsr (4 bytes)*2 + popsp (4 bytes)
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bz 12
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popsp r18, r19
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ldsr r18, FPEPC
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ldsr r19, FPSR
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;Restore general-purpose registers and EIPSW, EIPC, EIIC, CTPSW, CTPC
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popsp r15, r19
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ldsr r19, CTPC
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ldsr r18, CTPSW
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ldsr r17, EIIC
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ldsr r16, EIPC
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ldsr r15, EIPSW
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$nowarning
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popsp r1, r2
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$warning
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popsp r5, r30
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dispose 0, lp
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.endm
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;------------------------------------------------------------------------------
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; Save used registers
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;------------------------------------------------------------------------------
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SAVE_REGISTER .macro
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; Save general-purpose registers and EIPSW, EIPC, EIIC, CTPSW, CTPC into stack.
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; Callee-Save registers (r20 to r30) are not used in interrupt handler and
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; guaranteed no change after function call. So, don't need to save register
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; to optimize the used stack memory.
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pushsp r5, r19
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$nowarning
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pushsp r1, r2
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$warning
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stsr EIPSW, r19
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stsr EIPC, r18
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stsr EIIC, r17
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mov lp, r16
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mov ep, r15
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stsr CTPSW, r14
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stsr CTPC, r13
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pushsp r13, r19
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mov FPU_MSK, r16
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tst r16, r19
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bz 12
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stsr FPSR, r18
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stsr FPEPC, r19
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pushsp r18, r19
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.endm
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;------------------------------------------------------------------------------
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; Restore used registers
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;------------------------------------------------------------------------------
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RESTORE_REGISTER .macro
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mov FPU_MSK, r16
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stsr PSW, r18
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tst r18, r19
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bz 12
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popsp r18, r19
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ldsr r18, FPEPC
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ldsr r19, FPSR
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popsp r13, r19
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ldsr r13, CTPC
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ldsr r14, CTPSW
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mov r15, ep
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mov r16, lp
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ldsr r17, EIIC
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ldsr r18, EIPC
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ldsr r19, EIPSW
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$nowarning
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popsp r1, r2
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$warning
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popsp r5, r19
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.endm
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;------------------------------------------------------------------------------
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; Start the first task.
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;------------------------------------------------------------------------------
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_vPortStartFirstTask:
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portRESTORE_CONTEXT
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eiret
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;------------------------------------------------------------------------------
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; _vPortYield
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;------------------------------------------------------------------------------
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_vPortYield:
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trap 0
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jmp [lp] ; Return to caller function
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;------------------------------------------------------------------------------
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; PortYield handler. This is installed as the TRAP exception handler.
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;------------------------------------------------------------------------------
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_vTRAP0_Handler:
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;Save the context of the current task.
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portSAVE_CONTEXT
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; The use case that portYield() is called from interrupt context as nested interrupt.
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; Context switch should be executed at the most outer of interrupt tree.
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; In that case, set xPortScheduleStatus to flag context switch in interrupt handler.
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jarl _xPortGET_CORE_ID, lp ; return value is contained in r10 (CCRH compiler)
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mov r10, r11
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shl 2, r11
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mov #_uxInterruptNesting, r19
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add r11, r19
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ld.w 0[r19], r18
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cmp r0, r18
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be _vTRAP0_Handler_ContextSwitch
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mov #_xPortScheduleStatus, r19
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add r11, r19
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; Set xPortScheduleStatus[coreID]=PORT_SCHEDULER_TASKSWITCH
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mov 1, r17
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st.w r17, 0[r19]
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br _vTRAP0_Handler_Exit
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_vTRAP0_Handler_ContextSwitch:
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; Pass coreID (r10) as parameter by r6 (CCRH compiler) in SMP support.
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mov r10, r6
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; Call the scheduler to select the next task.
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; vPortYeild may be called to current core again at the end of vTaskSwitchContext.
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; This may case nested interrupt, however, it is not necessary to set
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; uxInterruptNesting (currently 0) for nested trap0 exception. The user interrupt
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; (EI level interrupt) is not accepted inside of trap0 exception.
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jarl _vTaskSwitchContext, lp
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_vTRAP0_Handler_Exit:
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; Restore the context of the next task to run.
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portRESTORE_CONTEXT
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eiret
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;------------------------------------------------------------------------------
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; _Irq_Handler
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; Handler interrupt service routine (ISR).
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;------------------------------------------------------------------------------
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_vIrq_Handler:
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; Save used registers.
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SAVE_REGISTER
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; Get core ID by HTCFG0, thread configuration register.
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; Then, increase nesting count for current core.
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jarl _xPortGET_CORE_ID, lp ; return value is contained in r10 (CCRH compiler)
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shl 2, r10
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mov r10, r17
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mov #_uxInterruptNesting, r19
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add r17, r19
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ld.w 0[r19], r18
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addi 0x1, r18, r16
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st.w r16, 0[r19]
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pushsp r17, r19
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;Call the interrupt handler.
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stsr EIIC, r6
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andi EIIC_MSK, r6, r6
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; Do not enable interrupt for nesting. Stackover flow may occurs if the
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; depth of nesting interrupt is exceeded.
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mov #_uxPortMaxInterruptDepth, r15
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cmp r16, r15
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be 4 ; Jump over ei instruction
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ei
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jarl _vCommonISRHandler, lp
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di
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synce
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popsp r17, r19
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st.w r18, 0[r19] ; Restore the old nesting count.
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; A context switch if no nesting interrupt.
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cmp 0x0, r18
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bne _vIrq_Handler_NotSwitchContext
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; Check if context switch is requested.
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mov #_xPortScheduleStatus, r19
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add r17, r19
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ld.w 0[r19], r18
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cmp r0, r18
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bne _vIrq_Handler_SwitchContext
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_vIrq_Handler_NotSwitchContext:
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; No context switch. Restore used registers
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RESTORE_REGISTER
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eiret
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;This sequence is executed for primary core only to switch context
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_vIrq_Handler_SwitchContext:
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; Clear the context switch pending flag.
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st.w r0, 0[r19]
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add -1, r18
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bnz _vIrq_Handler_StartFirstTask
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; Restore used registers before saving the context to the task stack.
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RESTORE_REGISTER
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portSAVE_CONTEXT
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; Get Core ID and pass to vTaskSwitchContext as parameter (CCRH compiler)
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; The parameter is unused in single core, no problem with this redudant setting
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jarl _xPortGET_CORE_ID, lp ; return value is contained in r10 (CCRH compiler)
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mov r10, r6
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; vPortYeild may be called to current core again at the end of vTaskSwitchContext.
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; This may case nested interrupt, however, it is not necessary to set
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; uxInterruptNesting (currently 0) for trap0 exception. The user interrupt
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; (EI level interrupt) is not accepted inside of trap0 exception.
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jarl _vTaskSwitchContext, lp ;
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portRESTORE_CONTEXT
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eiret
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_vIrq_Handler_StartFirstTask:
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RESTORE_REGISTER
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jr _vPortStartFirstTask
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