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Update the WEB server demo.
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parent
5af3321022
commit
da0c104de4
8 changed files with 7074 additions and 407 deletions
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@ -133,7 +133,7 @@ static portBASE_TYPE xAttempt = 0;
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/* Power Up the EMAC controller. */
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PCONP |= 0x40000000;
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vTaskDelay( 1 );
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vTaskDelay( 10 );
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/* Reset all EMAC internal modules. */
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MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
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@ -141,7 +141,7 @@ static portBASE_TYPE xAttempt = 0;
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Command = CR_REG_RES | CR_TX_RES | CR_RX_RES;
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/* A short delay after reset. */
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vTaskDelay( 1 );
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vTaskDelay( 10 );
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/* Initialize MAC control registers. */
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MAC1 = MAC1_PASS_ALL;
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@ -163,7 +163,7 @@ static portBASE_TYPE xAttempt = 0;
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/* Wait for hardware reset to end. */
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for (tout = 0; tout < 100; tout++) {
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vTaskDelay( 10 );
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vTaskDelay( 200 );
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regv = read_PHY (PHY_REG_BMCR);
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if (!(regv & 0x8000)) {
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/* Reset complete */
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@ -181,7 +181,7 @@ static portBASE_TYPE xAttempt = 0;
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write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);
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/* Wait to complete Auto_Negotiation. */
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for (tout = 0; tout < 10; tout++) {
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vTaskDelay( 100 );
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vTaskDelay( 200 );
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regv = read_PHY (PHY_REG_BMSR);
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if (regv & 0x0020) {
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/* Autonegotiation Complete. */
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@ -199,7 +199,7 @@ static portBASE_TYPE xAttempt = 0;
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{
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xReturn = pdFAIL;
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for (tout = 0; tout < 10; tout++) {
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vTaskDelay( 100 );
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vTaskDelay( 200 );
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regv = read_PHY (PHY_REG_STS);
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if (regv & 0x0001) {
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/* Link is on. */
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