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risc-v: Fix build flags and linker scripts (#906)

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1. miss debug info in assembly code
RISC-V-spike-htif_GCC
        LDFLAGS add arch and abi info for linker
            for riscv64-unknown-elf multilib, if there is no arch and abi
            info, will link to default lib and have below error
            target emulation `elf32-littleriscv' does not match `elf64-littleriscv'
        use CFLAGS to replace ASFLAGS when compile assembly code
            because DEBUG flag is added in CFLAGS, if we use ASFLAGS to compile
            assembly code, there is no debug info in assembly code objfile

2. binutils 2.39 ld warn 'has a LOAD segment with RWX permissions'
RISC-V-Qemu-virt_GCC
RISC-V-spike-htif_GCC
RISC-V_RV32_QEMU_VIRT_GCC

3. fix build fail
RISC-V_RV32_QEMU_VIRT_GCC

Signed-off-by: Eric Chan <e14002270@gmail.com>
This commit is contained in:
e14002270 2023-06-01 02:48:13 +08:00 • committed by GitHub
parent f6f2b67141
commit d60b34c8e2
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GPG key ID: 4AEE18F83AFDEB23
6 changed files with 7 additions and 10 deletions
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3
FreeRTOS/Demo/RISC-V_RV32_QEMU_VIRT_GCC/build/gcc/fake_rom.ld
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@ -30,9 +30,8 @@ SECTIONS
_etext = .;
} >rom AT>rom
.rodata.align :
.rodata.align ALIGN(4):
{
. = ALIGN(4);
_rodata = .;
} >rom AT>rom