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Update version number ready for version 9 release candidate 1.
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Richard Barry
parent
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commit
d3ba0aa98d
1385 changed files with 1722 additions and 4965 deletions
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@ -1,5 +1,5 @@
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/*
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FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
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FreeRTOS V9.0.0rc1 - Copyright (C) 2016 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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@ -133,9 +133,6 @@ is defined. */
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/* Constants required to set up the initial stack. */
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#define portINITIAL_XPSR ( 0x01000000 )
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/* Constants used with memory barrier intrinsics. */
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#define portSY_FULL_READ_WRITE ( 15 )
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/* The systick is a 24-bit counter. */
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#define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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@ -362,24 +359,10 @@ void vPortEndScheduler( void )
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}
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/*-----------------------------------------------------------*/
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void vPortYield( void )
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{
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/* Set a PendSV to request a context switch. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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/* Barriers are normally not required but do ensure the code is completely
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within the specified behaviour for the architecture. */
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__dsb( portSY_FULL_READ_WRITE );
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__isb( portSY_FULL_READ_WRITE );
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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uxCriticalNesting++;
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__dsb( portSY_FULL_READ_WRITE );
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__isb( portSY_FULL_READ_WRITE );
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/* This is not the interrupt safe version of the enter critical function so
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assert() if it is being called from an interrupt context. Only API
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@ -424,6 +407,8 @@ __asm void xPortPendSVHandler( void )
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stmdb sp!, {r3, r14}
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mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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msr basepri, r0
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dsb
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isb
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bl vTaskSwitchContext
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mov r0, #0
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msr basepri, r0
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@ -444,8 +429,9 @@ void xPortSysTickHandler( void )
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/* The SysTick runs at the lowest interrupt priority, so when this interrupt
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executes all interrupts must be unmasked. There is therefore no need to
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save and then restore the interrupt mask value as its value is already
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known. */
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( void ) portSET_INTERRUPT_MASK_FROM_ISR();
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known - therefore the slightly faster vPortRaiseBASEPRI() function is used
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in place of portSET_INTERRUPT_MASK_FROM_ISR(). */
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vPortRaiseBASEPRI();
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{
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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@ -455,7 +441,7 @@ void xPortSysTickHandler( void )
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
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vPortClearBASEPRIFromISR();
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}
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/*-----------------------------------------------------------*/
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@ -637,26 +623,6 @@ void xPortSysTickHandler( void )
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#endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
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/*-----------------------------------------------------------*/
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__asm uint32_t ulPortSetInterruptMask( void )
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{
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PRESERVE8
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mrs r0, basepri
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mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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msr basepri, r1
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bx r14
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}
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/*-----------------------------------------------------------*/
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__asm void vPortClearInterruptMask( uint32_t ulNewMask )
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{
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PRESERVE8
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msr basepri, r0
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bx r14
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}
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/*-----------------------------------------------------------*/
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__asm uint32_t vPortGetIPSR( void )
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{
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PRESERVE8
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@ -1,5 +1,5 @@
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/*
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FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
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FreeRTOS V9.0.0rc1 - Copyright (C) 2016 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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@ -115,29 +115,42 @@ typedef unsigned long UBaseType_t;
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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/* Constants used with memory barrier intrinsics. */
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#define portSY_FULL_READ_WRITE ( 15 )
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/*-----------------------------------------------------------*/
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/* Scheduler utilities. */
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extern void vPortYield( void );
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#define portYIELD() \
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{ \
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/* Set a PendSV to request a context switch. */ \
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
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\
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/* Barriers are normally not required but do ensure the code is completely \
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within the specified behaviour for the architecture. */ \
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__dsb( portSY_FULL_READ_WRITE ); \
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__isb( portSY_FULL_READ_WRITE ); \
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}
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/*-----------------------------------------------------------*/
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#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portYIELD() vPortYield()
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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/* Critical section management. */
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extern uint32_t ulPortSetInterruptMask( void );
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extern void vPortClearInterruptMask( uint32_t ulNewMask );
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
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#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )
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#define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()
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#define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 )
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortSetBASEPRI(x)
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/*-----------------------------------------------------------*/
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/* Tickless idle/low power functionality. */
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@ -165,7 +178,7 @@ extern void vPortExitCritical( void );
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/*-----------------------------------------------------------*/
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
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#endif /* taskRECORD_READY_PRIORITY */
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/*-----------------------------------------------------------*/
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@ -187,6 +200,92 @@ not necessary for to use this port. They are defined so the common demo files
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#define portINLINE __inline
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#ifndef portFORCE_INLINE
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#define portFORCE_INLINE __forceinline
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#endif
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/*-----------------------------------------------------------*/
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static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
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{
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__asm
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{
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/* Barrier instructions are not used as this function is only used to
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lower the BASEPRI value. */
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msr basepri, ulBASEPRI
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}
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}
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/*-----------------------------------------------------------*/
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static portFORCE_INLINE void vPortRaiseBASEPRI( void )
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{
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uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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__asm
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{
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/* Set BASEPRI to the max syscall priority to effect a critical
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section. */
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msr basepri, ulNewBASEPRI
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dsb
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isb
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}
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}
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/*-----------------------------------------------------------*/
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static portFORCE_INLINE void vPortClearBASEPRIFromISR( void )
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{
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__asm
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{
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/* Set BASEPRI to 0 so no interrupts are masked. This function is only
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used to lower the mask in an interrupt, so memory barriers are not
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used. */
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msr basepri, #0
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}
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}
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/*-----------------------------------------------------------*/
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static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
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{
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uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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__asm
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{
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/* Set BASEPRI to the max syscall priority to effect a critical
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section. */
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mrs ulReturn, basepri
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msr basepri, ulNewBASEPRI
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dsb
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isb
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}
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return ulReturn;
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}
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/*-----------------------------------------------------------*/
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static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void )
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{
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uint32_t ulCurrentInterrupt;
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BaseType_t xReturn;
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/* Obtain the number of the currently executing interrupt. */
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__asm
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{
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mrs ulCurrentInterrupt, ipsr
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}
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if( ulCurrentInterrupt == 0 )
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{
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xReturn = pdFALSE;
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}
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else
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{
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xReturn = pdTRUE;
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}
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return xReturn;
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}
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#ifdef __cplusplus
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}
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#endif
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