mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Previously the MPSoC Cortex-A53 demo was updated to the latest Xilinx SDK tools to the point where it was building, but not tested. This check in modifies the project files slightly following testing.
This commit is contained in:
Richard Barry
parent
26d8c76996
commit
d30249789b
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@ -1,8 +1,8 @@
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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@ -14,134 +14,74 @@
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|
|
@ -27,31 +27,102 @@
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@ -60,151 +131,7 @@
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@ -213,7 +140,7 @@
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@ -225,7 +152,7 @@
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@ -53,21 +53,85 @@
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|
||||
.globl _boot
|
||||
.globl _vector_table
|
||||
.globl _freertos_vector_table
|
||||
|
||||
.globl FIQInterrupt
|
||||
.globl IRQInterrupt
|
||||
.globl SErrorInterrupt
|
||||
.globl SynchronousInterrupt
|
||||
|
||||
|
||||
.org 0
|
||||
|
||||
.section .vectors, "a"
|
||||
|
||||
_vector_table:
|
||||
|
||||
.set VBAR, _vector_table
|
||||
|
||||
.org VBAR
|
||||
b _boot
|
||||
|
||||
.org (VBAR + 0x80)
|
||||
b .
|
||||
|
||||
.org (VBAR + 0x100)
|
||||
b .
|
||||
|
||||
.org (VBAR + 0x180)
|
||||
b .
|
||||
|
||||
|
||||
.org (VBAR + 0x200)
|
||||
b .
|
||||
|
||||
.org (VBAR + 0x280)
|
||||
b .
|
||||
|
||||
.org (VBAR + 0x300)
|
||||
b .
|
||||
|
||||
.org (VBAR + 0x380)
|
||||
b .
|
||||
|
||||
|
||||
|
||||
.org (VBAR + 0x400)
|
||||
b .
|
||||
|
||||
.org (VBAR + 0x480)
|
||||
b .
|
||||
|
||||
.org (VBAR + 0x500)
|
||||
b .
|
||||
|
||||
.org (VBAR + 0x580)
|
||||
b .
|
||||
|
||||
.org (VBAR + 0x600)
|
||||
b .
|
||||
|
||||
.org (VBAR + 0x680)
|
||||
b .
|
||||
|
||||
.org (VBAR + 0x700)
|
||||
b .
|
||||
|
||||
.org (VBAR + 0x780)
|
||||
b .
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* Vector table to use when FreeRTOS is running.
|
||||
*****************************************************************************/
|
||||
.text
|
||||
.section .freertos_vectors
|
||||
.align 8
|
||||
.set FREERTOS_VBAR, .
|
||||
.set FREERTOS_VBAR, (VBAR+0x1000)
|
||||
|
||||
.org(FREERTOS_VBAR)
|
||||
_freertos_vector_table:
|
||||
b FreeRTOS_SWI_Handler
|
||||
|
|
@ -121,7 +185,7 @@ _freertos_vector_table:
|
|||
|
||||
|
||||
|
||||
|
||||
#if 0
|
||||
SynchronousInterruptHandler:
|
||||
stp X0,X1, [sp,#-0x10]!
|
||||
stp X2,X3, [sp,#-0x10]!
|
||||
|
|
@ -239,5 +303,6 @@ SErrorInterruptHandler:
|
|||
ldp X0,X1, [sp], #0x10
|
||||
|
||||
eret
|
||||
#endif
|
||||
|
||||
.end
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
/* */
|
||||
/* Version: */
|
||||
/* */
|
||||
/* Copyright (c) 2010 Xilinx, Inc. All rights reserved. */
|
||||
/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */
|
||||
/* */
|
||||
/* Description : Cortex-A53 Linker Script */
|
||||
/* */
|
||||
|
|
@ -21,13 +21,10 @@ _EL2_STACK_SIZE = DEFINED(_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024;
|
|||
|
||||
MEMORY
|
||||
{
|
||||
psu_bbram_0_S_AXI_BASEADDR : ORIGIN = 0xFFCD0000, LENGTH = 0x10000
|
||||
psu_ddr_0_S_AXI_BASEADDR : ORIGIN = 0x0, LENGTH = 0x80000000
|
||||
psu_ocm_ram_0_S_AXI_BASEADDR : ORIGIN = 0xFFFC0000, LENGTH = 0x30000
|
||||
psu_ocm_ram_1_S_AXI_BASEADDR : ORIGIN = 0xFFFF0000, LENGTH = 0x10000
|
||||
psu_ocm_xmpu_cfg_S_AXI_BASEADDR : ORIGIN = 0xFFA70000, LENGTH = 0x10000
|
||||
psu_pmu_ram_S_AXI_BASEADDR : ORIGIN = 0xFFDC0000, LENGTH = 0x20000
|
||||
psu_qspi_linear_0_S_AXI_BASEADDR : ORIGIN = 0xC0000000, LENGTH = 0x20000000
|
||||
psu_ddr_0_MEM_0 : ORIGIN = 0x0, LENGTH = 0x7FF00000
|
||||
psu_ddr_1_MEM_0 : ORIGIN = 0x800000000, LENGTH = 0x80000000
|
||||
psu_ocm_ram_0_MEM_0 : ORIGIN = 0xFFFC0000, LENGTH = 0x40000
|
||||
psu_qspi_linear_0_MEM_0 : ORIGIN = 0xC0000000, LENGTH = 0x20000000
|
||||
}
|
||||
|
||||
/* Specify the default entry point to the program */
|
||||
|
|
@ -40,7 +37,6 @@ SECTIONS
|
|||
{
|
||||
.text : {
|
||||
KEEP (*(.vectors))
|
||||
KEEP (*(.freertos_vectors))
|
||||
*(.boot)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
|
|
@ -52,23 +48,23 @@ SECTIONS
|
|||
*(.glue_7t)
|
||||
*(.ARM.extab)
|
||||
*(.gnu.linkonce.armextab.*)
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.init (ALIGN(64)) : {
|
||||
KEEP (*(.init))
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.fini (ALIGN(64)) : {
|
||||
KEEP (*(.fini))
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.interp : {
|
||||
KEEP (*(.interp))
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.note-ABI-tag : {
|
||||
KEEP (*(.note-ABI-tag))
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.rodata : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -77,7 +73,7 @@ SECTIONS
|
|||
*(.rodata.*)
|
||||
*(.gnu.linkonce.r.*)
|
||||
__rodata_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.rodata1 : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -85,7 +81,7 @@ SECTIONS
|
|||
*(.rodata1)
|
||||
*(.rodata1.*)
|
||||
__rodata1_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.sdata2 : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -94,7 +90,7 @@ SECTIONS
|
|||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
__sdata2_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.sbss2 : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -103,7 +99,7 @@ SECTIONS
|
|||
*(.sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
__sbss2_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.data : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -115,7 +111,7 @@ SECTIONS
|
|||
*(.got)
|
||||
*(.got.plt)
|
||||
__data_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.data1 : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -123,19 +119,19 @@ SECTIONS
|
|||
*(.data1)
|
||||
*(.data1.*)
|
||||
__data1_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.got : {
|
||||
*(.got)
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.got1 : {
|
||||
*(.got1)
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.got2 : {
|
||||
*(.got2)
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.ctors : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -147,7 +143,7 @@ SECTIONS
|
|||
KEEP (*(.ctors))
|
||||
__CTOR_END__ = .;
|
||||
___CTORS_END___ = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.dtors : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -159,52 +155,52 @@ SECTIONS
|
|||
KEEP (*(.dtors))
|
||||
__DTOR_END__ = .;
|
||||
___DTORS_END___ = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.fixup : {
|
||||
__fixup_start = .;
|
||||
*(.fixup)
|
||||
__fixup_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.eh_frame : {
|
||||
*(.eh_frame)
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.eh_framehdr : {
|
||||
__eh_framehdr_start = .;
|
||||
*(.eh_framehdr)
|
||||
__eh_framehdr_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.gcc_except_table : {
|
||||
*(.gcc_except_table)
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.mmu_tbl0 (ALIGN(4096)) : {
|
||||
__mmu_tbl0_start = .;
|
||||
*(.mmu_tbl0)
|
||||
__mmu_tbl0_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.mmu_tbl1 (ALIGN(4096)) : {
|
||||
__mmu_tbl1_start = .;
|
||||
*(.mmu_tbl1)
|
||||
__mmu_tbl1_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.mmu_tbl2 (ALIGN(4096)) : {
|
||||
__mmu_tbl2_start = .;
|
||||
*(.mmu_tbl2)
|
||||
__mmu_tbl2_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.ARM.exidx : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
*(.gnu.linkonce.armexidix.*.*)
|
||||
__exidx_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.preinit_array : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -212,7 +208,7 @@ SECTIONS
|
|||
KEEP (*(SORT(.preinit_array.*)))
|
||||
KEEP (*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.init_array : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -220,7 +216,7 @@ SECTIONS
|
|||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
__init_array_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.fini_array : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -228,13 +224,13 @@ SECTIONS
|
|||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array))
|
||||
__fini_array_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.ARM.attributes : {
|
||||
__ARM.attributes_start = .;
|
||||
*(.ARM.attributes)
|
||||
__ARM.attributes_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.sdata : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -243,7 +239,7 @@ SECTIONS
|
|||
*(.sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
__sdata_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.sbss (NOLOAD) : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -253,7 +249,7 @@ SECTIONS
|
|||
*(.gnu.linkonce.sb.*)
|
||||
. = ALIGN(64);
|
||||
__sbss_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.tdata : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -262,7 +258,7 @@ SECTIONS
|
|||
*(.tdata.*)
|
||||
*(.gnu.linkonce.td.*)
|
||||
__tdata_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.tbss : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -271,7 +267,7 @@ SECTIONS
|
|||
*(.tbss.*)
|
||||
*(.gnu.linkonce.tb.*)
|
||||
__tbss_end = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.bss (NOLOAD) : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -282,7 +278,7 @@ SECTIONS
|
|||
*(COMMON)
|
||||
. = ALIGN(64);
|
||||
__bss_end__ = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );
|
||||
|
||||
|
|
@ -298,7 +294,7 @@ _SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 );
|
|||
. += _HEAP_SIZE;
|
||||
_heap_end = .;
|
||||
HeapLimit = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
.stack (NOLOAD) : {
|
||||
. = ALIGN(64);
|
||||
|
|
@ -317,7 +313,7 @@ _SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 );
|
|||
. += _EL0_STACK_SIZE;
|
||||
. = ALIGN(64);
|
||||
__el0_stack = .;
|
||||
} > psu_ddr_0_S_AXI_BASEADDR
|
||||
} > psu_ddr_0_MEM_0
|
||||
|
||||
_end = .;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -26,6 +26,10 @@
|
|||
*/
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* See http://www.FreeRTOS.org/RTOS-Xilinx-UltraScale_MPSoC_64-bit.html for
|
||||
* additional information on this demo.
|
||||
*
|
||||
* NOTE 1: This project provides two demo applications. A simple blinky
|
||||
* style project, and a more comprehensive test and demo application. The
|
||||
* mainSELECTED_APPLICATION setting in main.c is used to select between the two.
|
||||
|
|
@ -34,6 +38,12 @@
|
|||
* NOTE 2: This file only contains the source code that is not specific to
|
||||
* either the simply blinky or full demos - this includes initialisation code
|
||||
* and callback functions.
|
||||
*
|
||||
* NOTE 3: This project builds the FreeRTOS source code, so is expecting the
|
||||
* BSP project to be configured as a 'standalone' bsp project rather than a
|
||||
* 'FreeRTOS' bsp project. However the BSP project MUST still be build with
|
||||
* the FREERTOS_BSP symbol defined (-DFREERTOS_BSP must be added to the
|
||||
* command line in the BSP configuration).
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
|
|
@ -95,6 +105,9 @@ XScuGic xInterruptController;
|
|||
|
||||
int main( void )
|
||||
{
|
||||
/* See http://www.FreeRTOS.org/RTOS-Xilinx-UltraScale_MPSoC_64-bit.html for
|
||||
additional information on this demo. */
|
||||
|
||||
/* Configure the hardware ready to run the demo. */
|
||||
prvSetupHardware();
|
||||
|
||||
|
|
@ -253,3 +266,15 @@ void vMainAssertCalled( const char *pcFileName, uint32_t ulLineNumber )
|
|||
for( ;; );
|
||||
}
|
||||
|
||||
void *____memset(void *str, int c, size_t n)
|
||||
{
|
||||
size_t x;
|
||||
uint8_t *puc = ( uint8_t * ) str;
|
||||
|
||||
for( x = 0; x < c; x++ )
|
||||
{
|
||||
puc[ x ] = ( uint8_t ) c;
|
||||
}
|
||||
|
||||
return str;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -68,8 +68,14 @@ enable_caches()
|
|||
void
|
||||
disable_caches()
|
||||
{
|
||||
#ifdef __MICROBLAZE__
|
||||
#ifdef XPAR_MICROBLAZE_USE_DCACHE
|
||||
Xil_DCacheDisable();
|
||||
#endif
|
||||
#ifdef XPAR_MICROBLAZE_USE_ICACHE
|
||||
Xil_ICacheDisable();
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="org.eclipse.cdt.core.default.config.1606552079">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.core.defaultConfigDataProvider" id="org.eclipse.cdt.core.default.config.1606552079" moduleId="org.eclipse.cdt.core.settings" name="Configuration">
|
||||
<cconfiguration id="org.eclipse.cdt.core.default.config.200132248">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.core.defaultConfigDataProvider" id="org.eclipse.cdt.core.default.config.200132248" moduleId="org.eclipse.cdt.core.settings" name="Configuration">
|
||||
<externalSettings/>
|
||||
<extensions/>
|
||||
</storageModule>
|
||||
|
|
|
|||
|
|
@ -23,11 +23,11 @@ $(PROCESSOR)/lib/libxil.a: $(PROCESSOR)/lib/libxil_init.a
|
|||
|
||||
%/make.include: $(if $(wildcard $(PROCESSOR)/lib/libxil_init.a),$(PROCESSOR)/lib/libxil.a,)
|
||||
@echo "Running Make include in $(subst /make.include,,$@)"
|
||||
$(MAKE) -C $(subst /make.include,,$@) -s include "SHELL=$(SHELL)" "COMPILER=aarch64-none-elf-gcc" "ARCHIVER=aarch64-none-elf-ar" "COMPILER_FLAGS= -O2 -c" "EXTRA_COMPILER_FLAGS=-g -Wall -Wextra"
|
||||
$(MAKE) -C $(subst /make.include,,$@) -s include "SHELL=$(SHELL)" "COMPILER=aarch64-none-elf-gcc" "ARCHIVER=aarch64-none-elf-ar" "COMPILER_FLAGS= -O2 -c" "EXTRA_COMPILER_FLAGS=-g -Wall -Wextra -DFREERTOS_BSP"
|
||||
|
||||
%/make.libs: include
|
||||
@echo "Running Make libs in $(subst /make.libs,,$@)"
|
||||
$(MAKE) -C $(subst /make.libs,,$@) -s libs "SHELL=$(SHELL)" "COMPILER=aarch64-none-elf-gcc" "ARCHIVER=aarch64-none-elf-ar" "COMPILER_FLAGS= -O2 -c" "EXTRA_COMPILER_FLAGS=-g -Wall -Wextra"
|
||||
$(MAKE) -C $(subst /make.libs,,$@) -s libs "SHELL=$(SHELL)" "COMPILER=aarch64-none-elf-gcc" "ARCHIVER=aarch64-none-elf-ar" "COMPILER_FLAGS= -O2 -c" "EXTRA_COMPILER_FLAGS=-g -Wall -Wextra -DFREERTOS_BSP"
|
||||
|
||||
%/make.clean:
|
||||
$(MAKE) -C $(subst /make.clean,,$@) -s clean
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@ BEGIN PROCESSOR
|
|||
PARAMETER DRIVER_NAME = cpu_cortexa53
|
||||
PARAMETER DRIVER_VER = 1.5
|
||||
PARAMETER HW_INSTANCE = psu_cortexa53_0
|
||||
PARAMETER extra_compiler_flags = -g -Wall -Wextra -DFREERTOS_BSP
|
||||
END
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>ZynqMP_ZCU102_hw_platform</name>
|
||||
<comment>Created by SDK v2016.4</comment>
|
||||
<comment>Created by SDK v2018.1</comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
|
|
@ -11,7 +11,7 @@
|
|||
</natures>
|
||||
<filteredResources>
|
||||
<filter>
|
||||
<id>1484841836970</id>
|
||||
<id>1525357889050</id>
|
||||
<name></name>
|
||||
<type>6</type>
|
||||
<matcher>
|
||||
|
|
@ -20,7 +20,7 @@
|
|||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1484841836972</id>
|
||||
<id>1525357889050</id>
|
||||
<name></name>
|
||||
<type>6</type>
|
||||
<matcher>
|
||||
|
|
@ -29,7 +29,7 @@
|
|||
</matcher>
|
||||
</filter>
|
||||
<filter>
|
||||
<id>1484841836978</id>
|
||||
<id>1525357889065</id>
|
||||
<name></name>
|
||||
<type>6</type>
|
||||
<matcher>
|
||||
|
|
|
|||
Loading…
Reference in a new issue