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Changes required to build with the latest Xilinx tools.
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@ -109,7 +109,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
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{
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/* Place a known value at the bottom of the stack for debugging. */
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*pxTopOfStack = 0xDEADBEEF;
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*pxTopOfStack--;
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pxTopOfStack--;
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/* EABI stack frame. */
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pxTopOfStack -= 28; /* R31 to R4 inclusive. */
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@ -140,7 +140,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) vPortEndScheduler;/* Next LR. */
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pxTopOfStack--;
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*pxTopOfStack = 0x00000000UL;;/* Backchain. */
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*pxTopOfStack = 0x00000000UL;/* Backchain. */
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return pxTopOfStack;
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}
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@ -194,7 +194,7 @@ XIntc_VectorTableEntry *pxTable;
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/* Get the configuration by using the device ID - in this case it is
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assumed that only one interrupt controller is being used. */
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pxInterruptController = &XIntc_ConfigTable[ XPAR_OPB_INTC_0_DEVICE_ID ];
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pxInterruptController = &XIntc_ConfigTable[ XPAR_XPS_INTC_0_DEVICE_ID ];
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/* Which interrupts are pending? */
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ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress );
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@ -238,7 +238,7 @@ extern void vPortISRWrapper( void );
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save the stack into the TCB. The wrapper then calls the handler defined
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above. */
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XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, ( XExceptionHandler ) vPortISRWrapper, NULL );
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XIntc_Initialize( &xInterruptController, XPAR_OPB_INTC_0_DEVICE_ID );
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XIntc_Initialize( &xInterruptController, XPAR_XPS_INTC_0_DEVICE_ID );
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XIntc_Start( &xInterruptController, XIN_REAL_MODE );
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}
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/*-----------------------------------------------------------*/
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