mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-19 21:11:57 -04:00
Add configCLEAR_TICK_INTERRUPT() to the IAR and RVDS Cortex-A9 ports.
Replace LDMFD with POP instructions in IAR and RVDS Cortex-A9 ports. Replace branch to address with indirect branch and exchange to address in register in the IAR and RVDS Cortex-A9 ports.
This commit is contained in:
parent
9a8da3ff38
commit
d12ec14160
|
@ -218,7 +218,7 @@ typedef struct xLIST
|
||||||
/*
|
/*
|
||||||
* Return the list item at the head of the list.
|
* Return the list item at the head of the list.
|
||||||
*
|
*
|
||||||
* \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY
|
* \page listGET_NEXT listGET_NEXT
|
||||||
* \ingroup LinkedList
|
* \ingroup LinkedList
|
||||||
*/
|
*/
|
||||||
#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext )
|
#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext )
|
||||||
|
|
|
@ -82,6 +82,9 @@ extern "C" {
|
||||||
*----------------------------------------------------------*/
|
*----------------------------------------------------------*/
|
||||||
|
|
||||||
#define tskKERNEL_VERSION_NUMBER "V8.0.0 release candidate 1"
|
#define tskKERNEL_VERSION_NUMBER "V8.0.0 release candidate 1"
|
||||||
|
#define tskKERNEL_VERSION_MAJOR 8
|
||||||
|
#define tskKERNEL_VERSION_MINOR 0
|
||||||
|
#define tskKERNEL_VERSION_BUILD 0
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* task. h
|
* task. h
|
||||||
|
|
|
@ -113,6 +113,10 @@
|
||||||
#error configMAX_API_CALL_INTERRUPT_PRIORITY must be greater than ( configUNIQUE_INTERRUPT_PRIORITIES / 2 )
|
#error configMAX_API_CALL_INTERRUPT_PRIORITY must be greater than ( configUNIQUE_INTERRUPT_PRIORITIES / 2 )
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifndef configCLEAR_TICK_INTERRUPT
|
||||||
|
#define configCLEAR_TICK_INTERRUPT()
|
||||||
|
#endif
|
||||||
|
|
||||||
/* A critical section is exited when the critical section nesting count reaches
|
/* A critical section is exited when the critical section nesting count reaches
|
||||||
this value. */
|
this value. */
|
||||||
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
|
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
|
||||||
|
@ -131,7 +135,6 @@ context. */
|
||||||
/* Constants required to setup the initial task context. */
|
/* Constants required to setup the initial task context. */
|
||||||
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||||
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||||
#define portINTERRUPT_ENABLE_BIT ( 0x80UL )
|
|
||||||
#define portTHUMB_MODE_ADDRESS ( 0x01UL )
|
#define portTHUMB_MODE_ADDRESS ( 0x01UL )
|
||||||
|
|
||||||
/* Used by portASSERT_IF_INTERRUPT_PRIORITY_INVALID() when ensuring the binary
|
/* Used by portASSERT_IF_INTERRUPT_PRIORITY_INVALID() when ensuring the binary
|
||||||
|
@ -354,6 +357,7 @@ void FreeRTOS_Tick_Handler( void )
|
||||||
|
|
||||||
/* Ensure all interrupt priorities are active again. */
|
/* Ensure all interrupt priorities are active again. */
|
||||||
portCLEAR_INTERRUPT_MASK();
|
portCLEAR_INTERRUPT_MASK();
|
||||||
|
configCLEAR_TICK_INTERRUPT();
|
||||||
}
|
}
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -113,7 +113,7 @@ portRESTORE_CONTEXT macro
|
||||||
CMP R1, #0
|
CMP R1, #0
|
||||||
|
|
||||||
; Restore the floating point context, if any
|
; Restore the floating point context, if any
|
||||||
LDMFDNE SP!, {R0}
|
POPNE {R0}
|
||||||
VPOPNE {D16-D31}
|
VPOPNE {D16-D31}
|
||||||
VPOPNE {D0-D15}
|
VPOPNE {D0-D15}
|
||||||
VMSRNE FPSCR, R0
|
VMSRNE FPSCR, R0
|
||||||
|
|
|
@ -130,7 +130,8 @@ FreeRTOS_IRQ_Handler
|
||||||
|
|
||||||
; Call the interrupt handler
|
; Call the interrupt handler
|
||||||
PUSH {r0-r3, lr}
|
PUSH {r0-r3, lr}
|
||||||
BL vApplicationIRQHandler
|
LDR r1, =vApplicationIRQHandler
|
||||||
|
BLX r1
|
||||||
POP {r0-r3, lr}
|
POP {r0-r3, lr}
|
||||||
ADD sp, sp, r2
|
ADD sp, sp, r2
|
||||||
|
|
||||||
|
@ -184,7 +185,8 @@ switch_before_exit
|
||||||
; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
|
; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
|
||||||
; instructions, or 8 byte aligned stack allocated data. LR does not need
|
; instructions, or 8 byte aligned stack allocated data. LR does not need
|
||||||
; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.
|
; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.
|
||||||
BL vTaskSwitchContext
|
LDR r0, =vTaskSwitchContext
|
||||||
|
BLX r0
|
||||||
|
|
||||||
; Restore the context of, and branch to, the task selected to execute next.
|
; Restore the context of, and branch to, the task selected to execute next.
|
||||||
portRESTORE_CONTEXT
|
portRESTORE_CONTEXT
|
||||||
|
|
|
@ -110,6 +110,10 @@
|
||||||
#error configMAX_API_CALL_INTERRUPT_PRIORITY must be greater than ( configUNIQUE_INTERRUPT_PRIORITIES / 2 )
|
#error configMAX_API_CALL_INTERRUPT_PRIORITY must be greater than ( configUNIQUE_INTERRUPT_PRIORITIES / 2 )
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifndef configCLEAR_TICK_INTERRUPT
|
||||||
|
#define configCLEAR_TICK_INTERRUPT()
|
||||||
|
#endif
|
||||||
|
|
||||||
/* The number of bits to shift for an interrupt priority is dependent on the
|
/* The number of bits to shift for an interrupt priority is dependent on the
|
||||||
number of bits implemented by the interrupt controller. */
|
number of bits implemented by the interrupt controller. */
|
||||||
#if configUNIQUE_INTERRUPT_PRIORITIES == 16
|
#if configUNIQUE_INTERRUPT_PRIORITIES == 16
|
||||||
|
@ -167,7 +171,6 @@ point is zero. */
|
||||||
/* Constants required to setup the initial task context. */
|
/* Constants required to setup the initial task context. */
|
||||||
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||||
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||||
#define portINTERRUPT_ENABLE_BIT ( 0x80UL )
|
|
||||||
#define portTHUMB_MODE_ADDRESS ( 0x01UL )
|
#define portTHUMB_MODE_ADDRESS ( 0x01UL )
|
||||||
|
|
||||||
/* Masks all bits in the APSR other than the mode bits. */
|
/* Masks all bits in the APSR other than the mode bits. */
|
||||||
|
@ -393,6 +396,7 @@ void FreeRTOS_Tick_Handler( void )
|
||||||
|
|
||||||
/* Ensure all interrupt priorities are active again. */
|
/* Ensure all interrupt priorities are active again. */
|
||||||
portCLEAR_INTERRUPT_MASK();
|
portCLEAR_INTERRUPT_MASK();
|
||||||
|
configCLEAR_TICK_INTERRUPT();
|
||||||
}
|
}
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
|
@ -126,7 +126,8 @@ FreeRTOS_IRQ_Handler
|
||||||
|
|
||||||
; Call the interrupt handler
|
; Call the interrupt handler
|
||||||
PUSH {r0-r3, lr}
|
PUSH {r0-r3, lr}
|
||||||
BL vApplicationIRQHandler
|
LDR r1, =vApplicationIRQHandler
|
||||||
|
BLX r1
|
||||||
POP {r0-r3, lr}
|
POP {r0-r3, lr}
|
||||||
ADD sp, sp, r2
|
ADD sp, sp, r2
|
||||||
|
|
||||||
|
@ -180,7 +181,8 @@ switch_before_exit
|
||||||
; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
|
; vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD
|
||||||
; instructions, or 8 byte aligned stack allocated data. LR does not need
|
; instructions, or 8 byte aligned stack allocated data. LR does not need
|
||||||
; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.
|
; saving as a new LR will be loaded by portRESTORE_CONTEXT anyway.
|
||||||
BL vTaskSwitchContext
|
LDR r0, =vTaskSwitchContext
|
||||||
|
BLX r0
|
||||||
|
|
||||||
; Restore the context of, and branch to, the task selected to execute next.
|
; Restore the context of, and branch to, the task selected to execute next.
|
||||||
portRESTORE_CONTEXT
|
portRESTORE_CONTEXT
|
||||||
|
|
|
@ -120,7 +120,7 @@ IRQ_MODE EQU 0x12
|
||||||
CMP R1, #0
|
CMP R1, #0
|
||||||
|
|
||||||
; Restore the floating point context, if any
|
; Restore the floating point context, if any
|
||||||
LDMFDNE SP!, {R0}
|
POPNE {R0}
|
||||||
VPOPNE {D16-D31}
|
VPOPNE {D16-D31}
|
||||||
VPOPNE {D0-D15}
|
VPOPNE {D0-D15}
|
||||||
VMSRNE FPSCR, R0
|
VMSRNE FPSCR, R0
|
||||||
|
|
|
@ -1678,7 +1678,9 @@ UBaseType_t uxSavedInterruptStatus;
|
||||||
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
|
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
|
||||||
|
|
||||||
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
|
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
|
||||||
xReturn = xTickCount;
|
{
|
||||||
|
xReturn = xTickCount;
|
||||||
|
}
|
||||||
portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
|
portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
|
||||||
|
|
||||||
return xReturn;
|
return xReturn;
|
||||||
|
|
Loading…
Reference in a new issue