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Continue working on GCC/CA_9 port layer - tick interrupt now working but needs tidy up.

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Richard Barry 2014-01-23 11:51:57 +00:00
parent 8cb6a4f032
commit d0323e67ae
2 changed files with 3 additions and 1 deletions
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1
FreeRTOS/Source/portable/GCC/ARM_CA9/port.c
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@ -337,6 +337,7 @@ uint32_t ulAPSR;
if( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE ) if( ( portICCBPR_BINARY_POINT_REGISTER & portBINARY_POINT_BITS ) <= portMAX_BINARY_POINT_VALUE )
{ {
/* Start the timer that generates the tick ISR. */ /* Start the timer that generates the tick ISR. */
__asm volatile( "cpsid i" );
configSETUP_TICK_INTERRUPT(); configSETUP_TICK_INTERRUPT();
// __asm volatile( "cpsie i" ); // __asm volatile( "cpsie i" );

3
FreeRTOS/Source/portable/GCC/ARM_CA9/portASM.S
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@ -52,7 +52,6 @@
licensing and training services. licensing and training services.
*/ */
.text .text
.set SYS_MODE, 0x1f .set SYS_MODE, 0x1f
@ -241,6 +240,7 @@ FreeRTOS_IRQ_Handler:
/* Read value from the interrupt acknowledge register, which is stored in r0 /* Read value from the interrupt acknowledge register, which is stored in r0
for future parameter and interrupt clearing use. */ for future parameter and interrupt clearing use. */
LDR r2, ulICCIARConst LDR r2, ulICCIARConst
LDR r2, [r2]
LDR r0, [r2] LDR r0, [r2]
/* Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for /* Ensure bit 2 of the stack pointer is clear. r2 holds the bit 2 value for
@ -259,6 +259,7 @@ FreeRTOS_IRQ_Handler:
/* Write the value read from ICCIAR to ICCEOIR. */ /* Write the value read from ICCIAR to ICCEOIR. */
LDR r4, ulICCEOIRConst LDR r4, ulICCEOIRConst
LDR r4, [r4]
STR r0, [r4] STR r0, [r4]
/* Restore the old nesting count. */ /* Restore the old nesting count. */