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Code cleanup

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Misc coding style cleanup and typo fixes
This commit is contained in:
carlo-dev-git 2021-03-22 09:33:45 +01:00
parent 522ac1e628
commit cf2e50988e
5 changed files with 36 additions and 35 deletions
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30
portable/RVDS/ARM_CM4F/port.c
View file

@ -243,14 +243,14 @@ __asm void vPortSVCHandler( void )
PRESERVE8
/* Get the location of the current TCB. */
ldr r3, = pxCurrentTCB
ldr r3, =pxCurrentTCB
ldr r1, [ r3 ]
ldr r0, [ r1 ]
/* Pop the core registers. */
ldmia r0 !, {r4-r11,r14}
ldmia r0 !, { r4 - r11, r14 }
msr psp, r0
isb
mov r0, # 0
mov r0, #0
msr basepri, r0
bx r14
/* *INDENT-ON* */
@ -468,36 +468,36 @@ __asm void xPortPendSVHandler( void )
/* Is the task using the FPU context? If so, push high vfp registers. */
tst r14, #0x10
it eq
vstmdbeq r0!, {s16-s31}
vstmdbeq r0 !, { s16 - s31 }
/* Save the core registers. */
stmdb r0!, {r4-r11, r14}
stmdb r0 !, { r4 - r11, r14 }
/* Save the new top of stack into the first member of the TCB. */
str r0, [ r2 ]
stmdb sp!, {r0, r3}
mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY
stmdb sp !, { r0, r3 }
mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
msr basepri, r0
dsb
isb
bl vTaskSwitchContext
mov r0, # 0
mov r0, #0
msr basepri, r0
ldmia sp!, {r0, r3}
ldmia sp !, { r0, r3 }
/* The first item in pxCurrentTCB is the task top of stack. */
ldr r1, [ r3 ]
ldr r0, [ r1 ]
/* Pop the core registers. */
ldmia r0!, {r4-r11, r14}
ldmia r0 !, { r4 - r11, r14 }
/* Is the task using the FPU context? If so, pop the high vfp registers
* too. */
tst r14, # 0x10
tst r14, #0x10
it eq
vldmiaeq r0!, {s16-s31}
vldmiaeq r0 !, { s16 - s31 }
msr psp, r0
isb
@ -775,10 +775,10 @@ __asm uint32_t vPortGetIPSR( void )
* be set to a value equal to or numerically *higher* than
* configMAX_SYSCALL_INTERRUPT_PRIORITY.
*
* Interrupts that use the FreeRTOS API must not be left at their
* default priority of zero as that is the highest possible priority,
* Interrupts that use the FreeRTOS API must not be left at their
* default priority of zero as that is the highest possible priority,
* which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
* and therefore also guaranteed to be invalid.
* and therefore also guaranteed to be invalid.
*
* FreeRTOS maintains separate thread and ISR API functions to ensure
* interrupt entry is as fast and simple as possible.

4
portable/RVDS/ARM_CM4F/portmacro.h
View file

@ -28,8 +28,8 @@
#ifndef PORTMACRO_H
#define PORTMACRO_H
/* *INDENT-OFF* */
/* *INDENT-OFF* */
#ifdef __cplusplus
extern "C" {
#endif
@ -173,7 +173,7 @@
/* Barrier instructions are not used as this function is only used to
* lower the BASEPRI value. */
/* *INDENT-OFF* */
msr basepri, ulBASEPRI
msr basepri, ulBASEPRI
/* *INDENT-ON* */
}
}

15
portable/RVDS/ARM_CM4_MPU/port.c
View file

@ -384,9 +384,9 @@ __asm void prvRestoreContextOfFirstTask( void )
*/
BaseType_t xPortStartScheduler( void )
{
/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
* See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
#if ( configASSERT_DEFINED == 1 )
{
@ -942,10 +942,10 @@ __asm uint32_t prvPortGetIPSR( void )
* be set to a value equal to or numerically *higher* than
* configMAX_SYSCALL_INTERRUPT_PRIORITY.
*
* Interrupts that use the FreeRTOS API must not be left at their
* default priority of zero as that is the highest possible priority,
* Interrupts that use the FreeRTOS API must not be left at their
* default priority of zero as that is the highest possible priority,
* which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
* and therefore also guaranteed to be invalid.
* and therefore also guaranteed to be invalid.
*
* FreeRTOS maintains separate thread and ISR API functions to ensure
* interrupt entry is as fast and simple as possible.
@ -968,9 +968,8 @@ __asm uint32_t prvPortGetIPSR( void )
* devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
* scheduler. Note however that some vendor specific peripheral libraries
* assume a non-zero priority group setting, in which cases using a value
* of zero will result in unpredicable behaviour. */
* of zero will result in unpredictable behaviour. */
configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
}
#endif /* configASSERT_DEFINED */
/*-----------------------------------------------------------*/

3
portable/RVDS/ARM_CM7/r0p1/port.c
View file

@ -233,9 +233,9 @@ static void prvTaskExitError( void )
__asm void vPortSVCHandler( void )
{
/* *INDENT-OFF* */
PRESERVE8
/* *INDENT-OFF* */
/* Get the location of the current TCB. */
ldr r3, =pxCurrentTCB
ldr r1, [ r3 ]
@ -374,7 +374,6 @@ BaseType_t xPortStartScheduler( void )
/* Make PendSV and SysTick the lowest priority interrupts. */
portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
/* Start the timer that generates the tick ISR. Interrupts are disabled

19
portable/RVDS/ARM_CM7/r0p1/portmacro.h
View file

@ -27,11 +27,13 @@
#ifndef PORTMACRO_H
#define PORTMACRO_H
#define PORTMACRO_H
#ifdef __cplusplus
extern "C" {
#endif
/* *INDENT-OFF* */
#ifdef __cplusplus
extern "C" {
#endif
/* *INDENT-ON* */
/*-----------------------------------------------------------
* Port specific definitions.
@ -257,9 +259,10 @@
return xReturn;
}
#ifdef __cplusplus
}
#endif
/* *INDENT-OFF* */
#ifdef __cplusplus
}
#endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */