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Add support for 16 MPU regions to GCC Cortex-M33 ports (#448)
* Add support for 16 MPU regions to GCC Cortex-M33 TZ port Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> * Add support for 16 MPU regions to Cortex-M33 NTZ GCC port Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
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76a8335b23
commit
cf248aec2d
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@ -184,7 +184,7 @@
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#define portMPU_ENABLE_BIT ( 1UL << 0UL )
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#define portMPU_ENABLE_BIT ( 1UL << 0UL )
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/* Expected value of the portMPU_TYPE register. */
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/* Expected value of the portMPU_TYPE register. */
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#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
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#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL )
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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/**
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/**
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@ -625,6 +625,12 @@ static void prvTaskExitError( void )
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extern uint32_t __privileged_sram_end__[];
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extern uint32_t __privileged_sram_end__[];
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#endif /* defined( __ARMCC_VERSION ) */
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#endif /* defined( __ARMCC_VERSION ) */
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/* The only permitted number of regions are 8 or 16. */
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configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) );
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/* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
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configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
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/* Check that the MPU is present. */
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/* Check that the MPU is present. */
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if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
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if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
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{
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{
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@ -1156,7 +1162,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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}
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}
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else
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else
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{
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{
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/* Attr1 in MAIR0 is configured as normal memory. */
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/* Attr0 in MAIR0 is configured as normal memory. */
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xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
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xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
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}
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}
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}
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}
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@ -135,6 +135,15 @@
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#define portPRIVILEGE_BIT ( 0x0UL )
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#define portPRIVILEGE_BIT ( 0x0UL )
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#endif /* configENABLE_MPU */
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#endif /* configENABLE_MPU */
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/* MPU settings that can be overriden in FreeRTOSConfig.h. */
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#ifndef configTOTAL_MPU_REGIONS
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/* Define to 8 for backward compatibility. */
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#define configTOTAL_MPU_REGIONS ( 8UL )
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#endif
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#if( configTOTAL_MPU_REGIONS == 16 )
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#error 16 MPU regions are not yet supported for this port.
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#endif
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/* MPU regions. */
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/* MPU regions. */
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#define portPRIVILEGED_FLASH_REGION ( 0UL )
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#define portPRIVILEGED_FLASH_REGION ( 0UL )
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@ -143,7 +152,7 @@
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#define portPRIVILEGED_RAM_REGION ( 3UL )
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#define portPRIVILEGED_RAM_REGION ( 3UL )
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#define portSTACK_REGION ( 4UL )
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#define portSTACK_REGION ( 4UL )
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#define portFIRST_CONFIGURABLE_REGION ( 5UL )
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#define portFIRST_CONFIGURABLE_REGION ( 5UL )
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#define portLAST_CONFIGURABLE_REGION ( 7UL )
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#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
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#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
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#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
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#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
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#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
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@ -135,6 +135,15 @@
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#define portPRIVILEGE_BIT ( 0x0UL )
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#define portPRIVILEGE_BIT ( 0x0UL )
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#endif /* configENABLE_MPU */
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#endif /* configENABLE_MPU */
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/* MPU settings that can be overriden in FreeRTOSConfig.h. */
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#ifndef configTOTAL_MPU_REGIONS
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/* Define to 8 for backward compatibility. */
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#define configTOTAL_MPU_REGIONS ( 8UL )
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#endif
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#if( configTOTAL_MPU_REGIONS == 16 )
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#error 16 MPU regions are not yet supported for this port.
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#endif
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/* MPU regions. */
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/* MPU regions. */
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#define portPRIVILEGED_FLASH_REGION ( 0UL )
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#define portPRIVILEGED_FLASH_REGION ( 0UL )
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@ -143,7 +152,7 @@
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#define portPRIVILEGED_RAM_REGION ( 3UL )
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#define portPRIVILEGED_RAM_REGION ( 3UL )
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#define portSTACK_REGION ( 4UL )
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#define portSTACK_REGION ( 4UL )
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#define portFIRST_CONFIGURABLE_REGION ( 5UL )
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#define portFIRST_CONFIGURABLE_REGION ( 5UL )
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#define portLAST_CONFIGURABLE_REGION ( 7UL )
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#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
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#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
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#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
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#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
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#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
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@ -69,6 +69,21 @@ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_
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" ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
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" ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
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" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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" \n"
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" \n"
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#if ( configTOTAL_MPU_REGIONS == 16 )
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" ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
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" movs r4, #8 \n"/* r4 = 8. */
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" str r4, [r2] \n"/* Program RNR = 8. */
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" ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
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" ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
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" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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" ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
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" movs r4, #12 \n"/* r4 = 12. */
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" str r4, [r2] \n"/* Program RNR = 12. */
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" ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
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" ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
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" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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#endif /* configTOTAL_MPU_REGIONS == 16 */
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" \n"
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" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
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" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
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" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
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" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
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" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
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" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
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@ -310,6 +325,21 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
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" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
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" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
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" stmia r3!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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" stmia r3!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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" \n"
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" \n"
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#if ( configTOTAL_MPU_REGIONS == 16 )
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" ldr r3, xRNRConst \n"/* r3 = 0xe000ed98 [Location of RNR]. */
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" movs r4, #8 \n"/* r4 = 8. */
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" str r4, [r3] \n"/* Program RNR = 8. */
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" ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
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" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
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" stmia r3!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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" ldr r3, xRNRConst \n"/* r3 = 0xe000ed98 [Location of RNR]. */
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" movs r4, #12 \n"/* r4 = 12. */
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" str r4, [r3] \n"/* Program RNR = 12. */
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" ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
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" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
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" stmia r3!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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#endif /* configTOTAL_MPU_REGIONS == 16 */
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" \n"
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" ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
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" ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
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" ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */
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" ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */
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" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
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" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
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@ -135,6 +135,11 @@
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#define portPRIVILEGE_BIT ( 0x0UL )
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#define portPRIVILEGE_BIT ( 0x0UL )
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#endif /* configENABLE_MPU */
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#endif /* configENABLE_MPU */
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/* MPU settings that can be overriden in FreeRTOSConfig.h. */
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#ifndef configTOTAL_MPU_REGIONS
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/* Define to 8 for backward compatibility. */
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#define configTOTAL_MPU_REGIONS ( 8UL )
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#endif
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/* MPU regions. */
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/* MPU regions. */
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#define portPRIVILEGED_FLASH_REGION ( 0UL )
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#define portPRIVILEGED_FLASH_REGION ( 0UL )
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#define portPRIVILEGED_RAM_REGION ( 3UL )
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#define portPRIVILEGED_RAM_REGION ( 3UL )
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#define portSTACK_REGION ( 4UL )
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#define portSTACK_REGION ( 4UL )
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#define portFIRST_CONFIGURABLE_REGION ( 5UL )
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#define portFIRST_CONFIGURABLE_REGION ( 5UL )
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#define portLAST_CONFIGURABLE_REGION ( 7UL )
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#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
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#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
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#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
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#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
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#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
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@ -69,6 +69,21 @@ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_
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" ldmia r1!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
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" ldmia r1!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
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" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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" \n"
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" \n"
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#if ( configTOTAL_MPU_REGIONS == 16 )
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" ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
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" movs r3, #8 \n"/* r3 = 8. */
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" str r3, [r2] \n"/* Program RNR = 8. */
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" ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
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" ldmia r1!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
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" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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" ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
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" movs r3, #12 \n"/* r3 = 12. */
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" str r3, [r2] \n"/* Program RNR = 12. */
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" ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
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" ldmia r1!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
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" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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#endif /* configTOTAL_MPU_REGIONS == 16 */
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" \n"
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" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
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" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
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" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
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" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
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" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
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" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
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" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
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" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
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" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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" \n"
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" \n"
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#if ( configTOTAL_MPU_REGIONS == 16 )
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" ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */
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" movs r3, #8 \n"/* r3 = 8. */
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" str r3, [r2] \n"/* Program RNR = 8. */
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" ldr r2, xRBARConst \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
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" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
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" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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" ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */
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" movs r3, #12 \n"/* r3 = 12. */
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" str r3, [r2] \n"/* Program RNR = 12. */
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" ldr r2, xRBARConst \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
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" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
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" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
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#endif /* configTOTAL_MPU_REGIONS == 16 */
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" \n"
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" ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
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" ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
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" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
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" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
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" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
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" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
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#define portPRIVILEGE_BIT ( 0x0UL )
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#define portPRIVILEGE_BIT ( 0x0UL )
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#endif /* configENABLE_MPU */
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#endif /* configENABLE_MPU */
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/* MPU settings that can be overriden in FreeRTOSConfig.h. */
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#ifndef configTOTAL_MPU_REGIONS
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/* Define to 8 for backward compatibility. */
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#define configTOTAL_MPU_REGIONS ( 8UL )
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#endif
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/* MPU regions. */
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/* MPU regions. */
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#define portPRIVILEGED_FLASH_REGION ( 0UL )
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#define portPRIVILEGED_FLASH_REGION ( 0UL )
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#define portPRIVILEGED_RAM_REGION ( 3UL )
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#define portPRIVILEGED_RAM_REGION ( 3UL )
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#define portSTACK_REGION ( 4UL )
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#define portSTACK_REGION ( 4UL )
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#define portFIRST_CONFIGURABLE_REGION ( 5UL )
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#define portFIRST_CONFIGURABLE_REGION ( 5UL )
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#define portLAST_CONFIGURABLE_REGION ( 7UL )
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#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
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#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
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#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
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#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
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#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
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||||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
|
|
||||||
|
/* MPU settings that can be overriden in FreeRTOSConfig.h. */
|
||||||
|
#ifndef configTOTAL_MPU_REGIONS
|
||||||
|
/* Define to 8 for backward compatibility. */
|
||||||
|
#define configTOTAL_MPU_REGIONS ( 8UL )
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
#error 16 MPU regions are not yet supported for this port.
|
||||||
|
#endif
|
||||||
|
|
||||||
/* MPU regions. */
|
/* MPU regions. */
|
||||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||||
|
@ -143,7 +152,7 @@
|
||||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||||
#define portSTACK_REGION ( 4UL )
|
#define portSTACK_REGION ( 4UL )
|
||||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
|
||||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||||
|
|
||||||
|
|
|
@ -135,6 +135,15 @@
|
||||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
|
|
||||||
|
/* MPU settings that can be overriden in FreeRTOSConfig.h. */
|
||||||
|
#ifndef configTOTAL_MPU_REGIONS
|
||||||
|
/* Define to 8 for backward compatibility. */
|
||||||
|
#define configTOTAL_MPU_REGIONS ( 8UL )
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
#error 16 MPU regions are not yet supported for this port.
|
||||||
|
#endif
|
||||||
|
|
||||||
/* MPU regions. */
|
/* MPU regions. */
|
||||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||||
|
@ -143,7 +152,7 @@
|
||||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||||
#define portSTACK_REGION ( 4UL )
|
#define portSTACK_REGION ( 4UL )
|
||||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
|
||||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||||
|
|
||||||
|
|
|
@ -135,6 +135,15 @@
|
||||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
|
|
||||||
|
/* MPU settings that can be overriden in FreeRTOSConfig.h. */
|
||||||
|
#ifndef configTOTAL_MPU_REGIONS
|
||||||
|
/* Define to 8 for backward compatibility. */
|
||||||
|
#define configTOTAL_MPU_REGIONS ( 8UL )
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
#error 16 MPU regions are not yet supported for this port.
|
||||||
|
#endif
|
||||||
|
|
||||||
/* MPU regions. */
|
/* MPU regions. */
|
||||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||||
|
@ -143,7 +152,7 @@
|
||||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||||
#define portSTACK_REGION ( 4UL )
|
#define portSTACK_REGION ( 4UL )
|
||||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
|
||||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||||
|
|
||||||
|
|
|
@ -135,6 +135,15 @@
|
||||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
|
|
||||||
|
/* MPU settings that can be overriden in FreeRTOSConfig.h. */
|
||||||
|
#ifndef configTOTAL_MPU_REGIONS
|
||||||
|
/* Define to 8 for backward compatibility. */
|
||||||
|
#define configTOTAL_MPU_REGIONS ( 8UL )
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
#error 16 MPU regions are not yet supported for this port.
|
||||||
|
#endif
|
||||||
|
|
||||||
/* MPU regions. */
|
/* MPU regions. */
|
||||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||||
|
@ -143,7 +152,7 @@
|
||||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||||
#define portSTACK_REGION ( 4UL )
|
#define portSTACK_REGION ( 4UL )
|
||||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
|
||||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||||
|
|
||||||
|
|
|
@ -184,7 +184,7 @@
|
||||||
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
||||||
|
|
||||||
/* Expected value of the portMPU_TYPE register. */
|
/* Expected value of the portMPU_TYPE register. */
|
||||||
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
|
#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -625,6 +625,12 @@ static void prvTaskExitError( void )
|
||||||
extern uint32_t __privileged_sram_end__[];
|
extern uint32_t __privileged_sram_end__[];
|
||||||
#endif /* defined( __ARMCC_VERSION ) */
|
#endif /* defined( __ARMCC_VERSION ) */
|
||||||
|
|
||||||
|
/* The only permitted number of regions are 8 or 16. */
|
||||||
|
configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) );
|
||||||
|
|
||||||
|
/* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
|
||||||
|
configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
|
||||||
|
|
||||||
/* Check that the MPU is present. */
|
/* Check that the MPU is present. */
|
||||||
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
||||||
{
|
{
|
||||||
|
@ -1156,7 +1162,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* Attr1 in MAIR0 is configured as normal memory. */
|
/* Attr0 in MAIR0 is configured as normal memory. */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -135,6 +135,15 @@
|
||||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
|
|
||||||
|
/* MPU settings that can be overriden in FreeRTOSConfig.h. */
|
||||||
|
#ifndef configTOTAL_MPU_REGIONS
|
||||||
|
/* Define to 8 for backward compatibility. */
|
||||||
|
#define configTOTAL_MPU_REGIONS ( 8UL )
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
#error 16 MPU regions are not yet supported for this port.
|
||||||
|
#endif
|
||||||
|
|
||||||
/* MPU regions. */
|
/* MPU regions. */
|
||||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||||
|
@ -143,7 +152,7 @@
|
||||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||||
#define portSTACK_REGION ( 4UL )
|
#define portSTACK_REGION ( 4UL )
|
||||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
|
||||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||||
|
|
||||||
|
|
|
@ -184,7 +184,7 @@
|
||||||
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
||||||
|
|
||||||
/* Expected value of the portMPU_TYPE register. */
|
/* Expected value of the portMPU_TYPE register. */
|
||||||
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
|
#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -625,6 +625,12 @@ static void prvTaskExitError( void )
|
||||||
extern uint32_t __privileged_sram_end__[];
|
extern uint32_t __privileged_sram_end__[];
|
||||||
#endif /* defined( __ARMCC_VERSION ) */
|
#endif /* defined( __ARMCC_VERSION ) */
|
||||||
|
|
||||||
|
/* The only permitted number of regions are 8 or 16. */
|
||||||
|
configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) );
|
||||||
|
|
||||||
|
/* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
|
||||||
|
configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
|
||||||
|
|
||||||
/* Check that the MPU is present. */
|
/* Check that the MPU is present. */
|
||||||
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
||||||
{
|
{
|
||||||
|
@ -1156,7 +1162,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* Attr1 in MAIR0 is configured as normal memory. */
|
/* Attr0 in MAIR0 is configured as normal memory. */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -135,6 +135,15 @@
|
||||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
|
|
||||||
|
/* MPU settings that can be overriden in FreeRTOSConfig.h. */
|
||||||
|
#ifndef configTOTAL_MPU_REGIONS
|
||||||
|
/* Define to 8 for backward compatibility. */
|
||||||
|
#define configTOTAL_MPU_REGIONS ( 8UL )
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
#error 16 MPU regions are not yet supported for this port.
|
||||||
|
#endif
|
||||||
|
|
||||||
/* MPU regions. */
|
/* MPU regions. */
|
||||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||||
|
@ -143,7 +152,7 @@
|
||||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||||
#define portSTACK_REGION ( 4UL )
|
#define portSTACK_REGION ( 4UL )
|
||||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
|
||||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||||
|
|
||||||
|
|
|
@ -184,7 +184,7 @@
|
||||||
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
||||||
|
|
||||||
/* Expected value of the portMPU_TYPE register. */
|
/* Expected value of the portMPU_TYPE register. */
|
||||||
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
|
#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -625,6 +625,12 @@ static void prvTaskExitError( void )
|
||||||
extern uint32_t __privileged_sram_end__[];
|
extern uint32_t __privileged_sram_end__[];
|
||||||
#endif /* defined( __ARMCC_VERSION ) */
|
#endif /* defined( __ARMCC_VERSION ) */
|
||||||
|
|
||||||
|
/* The only permitted number of regions are 8 or 16. */
|
||||||
|
configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) );
|
||||||
|
|
||||||
|
/* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
|
||||||
|
configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
|
||||||
|
|
||||||
/* Check that the MPU is present. */
|
/* Check that the MPU is present. */
|
||||||
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
||||||
{
|
{
|
||||||
|
@ -1156,7 +1162,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* Attr1 in MAIR0 is configured as normal memory. */
|
/* Attr0 in MAIR0 is configured as normal memory. */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -69,6 +69,21 @@ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_
|
||||||
" ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
|
" ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||||
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||||
" \n"
|
" \n"
|
||||||
|
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
" ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
|
||||||
|
" movs r4, #8 \n"/* r4 = 8. */
|
||||||
|
" str r4, [r2] \n"/* Program RNR = 8. */
|
||||||
|
" ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||||
|
" ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||||
|
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||||
|
" ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
|
||||||
|
" movs r4, #12 \n"/* r4 = 12. */
|
||||||
|
" str r4, [r2] \n"/* Program RNR = 12. */
|
||||||
|
" ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||||
|
" ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||||
|
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||||
|
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||||
|
" \n"
|
||||||
" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||||
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||||
" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
||||||
|
@ -310,6 +325,21 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||||
" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
|
" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||||
" stmia r3!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
" stmia r3!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||||
" \n"
|
" \n"
|
||||||
|
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
" ldr r3, xRNRConst \n"/* r3 = 0xe000ed98 [Location of RNR]. */
|
||||||
|
" movs r4, #8 \n"/* r4 = 8. */
|
||||||
|
" str r4, [r3] \n"/* Program RNR = 8. */
|
||||||
|
" ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||||
|
" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||||
|
" stmia r3!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||||
|
" ldr r3, xRNRConst \n"/* r3 = 0xe000ed98 [Location of RNR]. */
|
||||||
|
" movs r4, #12 \n"/* r4 = 12. */
|
||||||
|
" str r4, [r3] \n"/* Program RNR = 12. */
|
||||||
|
" ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
|
||||||
|
" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||||
|
" stmia r3!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||||
|
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||||
|
" \n"
|
||||||
" ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
|
" ldr r3, xMPUCTRLConst \n"/* r3 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||||
" ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */
|
" ldr r4, [r3] \n"/* Read the value of MPU_CTRL. */
|
||||||
" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
||||||
|
|
|
@ -135,6 +135,11 @@
|
||||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
|
|
||||||
|
/* MPU settings that can be overriden in FreeRTOSConfig.h. */
|
||||||
|
#ifndef configTOTAL_MPU_REGIONS
|
||||||
|
/* Define to 8 for backward compatibility. */
|
||||||
|
#define configTOTAL_MPU_REGIONS ( 8UL )
|
||||||
|
#endif
|
||||||
|
|
||||||
/* MPU regions. */
|
/* MPU regions. */
|
||||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||||
|
@ -143,7 +148,7 @@
|
||||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||||
#define portSTACK_REGION ( 4UL )
|
#define portSTACK_REGION ( 4UL )
|
||||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
|
||||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||||
|
|
||||||
|
|
|
@ -184,7 +184,7 @@
|
||||||
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
||||||
|
|
||||||
/* Expected value of the portMPU_TYPE register. */
|
/* Expected value of the portMPU_TYPE register. */
|
||||||
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
|
#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -625,6 +625,12 @@ static void prvTaskExitError( void )
|
||||||
extern uint32_t __privileged_sram_end__[];
|
extern uint32_t __privileged_sram_end__[];
|
||||||
#endif /* defined( __ARMCC_VERSION ) */
|
#endif /* defined( __ARMCC_VERSION ) */
|
||||||
|
|
||||||
|
/* The only permitted number of regions are 8 or 16. */
|
||||||
|
configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) );
|
||||||
|
|
||||||
|
/* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
|
||||||
|
configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
|
||||||
|
|
||||||
/* Check that the MPU is present. */
|
/* Check that the MPU is present. */
|
||||||
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
||||||
{
|
{
|
||||||
|
@ -1156,7 +1162,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* Attr1 in MAIR0 is configured as normal memory. */
|
/* Attr0 in MAIR0 is configured as normal memory. */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -69,6 +69,21 @@ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_
|
||||||
" ldmia r1!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
|
" ldmia r1!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||||
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||||
" \n"
|
" \n"
|
||||||
|
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
" ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
|
||||||
|
" movs r3, #8 \n"/* r3 = 8. */
|
||||||
|
" str r3, [r2] \n"/* Program RNR = 8. */
|
||||||
|
" ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||||
|
" ldmia r1!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||||
|
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||||
|
" ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
|
||||||
|
" movs r3, #12 \n"/* r3 = 12. */
|
||||||
|
" str r3, [r2] \n"/* Program RNR = 12. */
|
||||||
|
" ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||||
|
" ldmia r1!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
|
||||||
|
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||||
|
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||||
|
" \n"
|
||||||
" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
" ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||||
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||||
" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
||||||
|
@ -262,6 +277,21 @@ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
|
||||||
" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
|
" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||||
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||||
" \n"
|
" \n"
|
||||||
|
#if ( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
" ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */
|
||||||
|
" movs r3, #8 \n"/* r3 = 8. */
|
||||||
|
" str r3, [r2] \n"/* Program RNR = 8. */
|
||||||
|
" ldr r2, xRBARConst \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||||
|
" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||||
|
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||||
|
" ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */
|
||||||
|
" movs r3, #12 \n"/* r3 = 12. */
|
||||||
|
" str r3, [r2] \n"/* Program RNR = 12. */
|
||||||
|
" ldr r2, xRBARConst \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
|
||||||
|
" ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
|
||||||
|
" stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
|
||||||
|
#endif /* configTOTAL_MPU_REGIONS == 16 */
|
||||||
|
" \n"
|
||||||
" ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
" ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
|
||||||
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
" ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
|
||||||
" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
" orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
|
||||||
|
|
|
@ -135,6 +135,11 @@
|
||||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
|
|
||||||
|
/* MPU settings that can be overriden in FreeRTOSConfig.h. */
|
||||||
|
#ifndef configTOTAL_MPU_REGIONS
|
||||||
|
/* Define to 8 for backward compatibility. */
|
||||||
|
#define configTOTAL_MPU_REGIONS ( 8UL )
|
||||||
|
#endif
|
||||||
|
|
||||||
/* MPU regions. */
|
/* MPU regions. */
|
||||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||||
|
@ -143,7 +148,7 @@
|
||||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||||
#define portSTACK_REGION ( 4UL )
|
#define portSTACK_REGION ( 4UL )
|
||||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
|
||||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||||
|
|
||||||
|
|
|
@ -184,7 +184,7 @@
|
||||||
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
||||||
|
|
||||||
/* Expected value of the portMPU_TYPE register. */
|
/* Expected value of the portMPU_TYPE register. */
|
||||||
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
|
#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -625,6 +625,12 @@ static void prvTaskExitError( void )
|
||||||
extern uint32_t __privileged_sram_end__[];
|
extern uint32_t __privileged_sram_end__[];
|
||||||
#endif /* defined( __ARMCC_VERSION ) */
|
#endif /* defined( __ARMCC_VERSION ) */
|
||||||
|
|
||||||
|
/* The only permitted number of regions are 8 or 16. */
|
||||||
|
configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) );
|
||||||
|
|
||||||
|
/* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
|
||||||
|
configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
|
||||||
|
|
||||||
/* Check that the MPU is present. */
|
/* Check that the MPU is present. */
|
||||||
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
||||||
{
|
{
|
||||||
|
@ -1156,7 +1162,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* Attr1 in MAIR0 is configured as normal memory. */
|
/* Attr0 in MAIR0 is configured as normal memory. */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -135,6 +135,15 @@
|
||||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
|
|
||||||
|
/* MPU settings that can be overriden in FreeRTOSConfig.h. */
|
||||||
|
#ifndef configTOTAL_MPU_REGIONS
|
||||||
|
/* Define to 8 for backward compatibility. */
|
||||||
|
#define configTOTAL_MPU_REGIONS ( 8UL )
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
#error 16 MPU regions are not yet supported for this port.
|
||||||
|
#endif
|
||||||
|
|
||||||
/* MPU regions. */
|
/* MPU regions. */
|
||||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||||
|
@ -143,7 +152,7 @@
|
||||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||||
#define portSTACK_REGION ( 4UL )
|
#define portSTACK_REGION ( 4UL )
|
||||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
|
||||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||||
|
|
||||||
|
|
|
@ -184,7 +184,7 @@
|
||||||
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
||||||
|
|
||||||
/* Expected value of the portMPU_TYPE register. */
|
/* Expected value of the portMPU_TYPE register. */
|
||||||
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
|
#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -625,6 +625,12 @@ static void prvTaskExitError( void )
|
||||||
extern uint32_t __privileged_sram_end__[];
|
extern uint32_t __privileged_sram_end__[];
|
||||||
#endif /* defined( __ARMCC_VERSION ) */
|
#endif /* defined( __ARMCC_VERSION ) */
|
||||||
|
|
||||||
|
/* The only permitted number of regions are 8 or 16. */
|
||||||
|
configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) );
|
||||||
|
|
||||||
|
/* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
|
||||||
|
configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
|
||||||
|
|
||||||
/* Check that the MPU is present. */
|
/* Check that the MPU is present. */
|
||||||
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
||||||
{
|
{
|
||||||
|
@ -1156,7 +1162,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* Attr1 in MAIR0 is configured as normal memory. */
|
/* Attr0 in MAIR0 is configured as normal memory. */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -135,6 +135,15 @@
|
||||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
|
|
||||||
|
/* MPU settings that can be overriden in FreeRTOSConfig.h. */
|
||||||
|
#ifndef configTOTAL_MPU_REGIONS
|
||||||
|
/* Define to 8 for backward compatibility. */
|
||||||
|
#define configTOTAL_MPU_REGIONS ( 8UL )
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
#error 16 MPU regions are not yet supported for this port.
|
||||||
|
#endif
|
||||||
|
|
||||||
/* MPU regions. */
|
/* MPU regions. */
|
||||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||||
|
@ -143,7 +152,7 @@
|
||||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||||
#define portSTACK_REGION ( 4UL )
|
#define portSTACK_REGION ( 4UL )
|
||||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
|
||||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||||
|
|
||||||
|
|
|
@ -184,7 +184,7 @@
|
||||||
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
||||||
|
|
||||||
/* Expected value of the portMPU_TYPE register. */
|
/* Expected value of the portMPU_TYPE register. */
|
||||||
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
|
#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -625,6 +625,12 @@ static void prvTaskExitError( void )
|
||||||
extern uint32_t __privileged_sram_end__[];
|
extern uint32_t __privileged_sram_end__[];
|
||||||
#endif /* defined( __ARMCC_VERSION ) */
|
#endif /* defined( __ARMCC_VERSION ) */
|
||||||
|
|
||||||
|
/* The only permitted number of regions are 8 or 16. */
|
||||||
|
configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) );
|
||||||
|
|
||||||
|
/* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
|
||||||
|
configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
|
||||||
|
|
||||||
/* Check that the MPU is present. */
|
/* Check that the MPU is present. */
|
||||||
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
||||||
{
|
{
|
||||||
|
@ -1156,7 +1162,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* Attr1 in MAIR0 is configured as normal memory. */
|
/* Attr0 in MAIR0 is configured as normal memory. */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -135,6 +135,15 @@
|
||||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
|
|
||||||
|
/* MPU settings that can be overriden in FreeRTOSConfig.h. */
|
||||||
|
#ifndef configTOTAL_MPU_REGIONS
|
||||||
|
/* Define to 8 for backward compatibility. */
|
||||||
|
#define configTOTAL_MPU_REGIONS ( 8UL )
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
#error 16 MPU regions are not yet supported for this port.
|
||||||
|
#endif
|
||||||
|
|
||||||
/* MPU regions. */
|
/* MPU regions. */
|
||||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||||
|
@ -143,7 +152,7 @@
|
||||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||||
#define portSTACK_REGION ( 4UL )
|
#define portSTACK_REGION ( 4UL )
|
||||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
|
||||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||||
|
|
||||||
|
|
|
@ -184,7 +184,7 @@
|
||||||
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
|
||||||
|
|
||||||
/* Expected value of the portMPU_TYPE register. */
|
/* Expected value of the portMPU_TYPE register. */
|
||||||
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
|
#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL )
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -625,6 +625,12 @@ static void prvTaskExitError( void )
|
||||||
extern uint32_t __privileged_sram_end__[];
|
extern uint32_t __privileged_sram_end__[];
|
||||||
#endif /* defined( __ARMCC_VERSION ) */
|
#endif /* defined( __ARMCC_VERSION ) */
|
||||||
|
|
||||||
|
/* The only permitted number of regions are 8 or 16. */
|
||||||
|
configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) );
|
||||||
|
|
||||||
|
/* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
|
||||||
|
configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
|
||||||
|
|
||||||
/* Check that the MPU is present. */
|
/* Check that the MPU is present. */
|
||||||
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
|
||||||
{
|
{
|
||||||
|
@ -1156,7 +1162,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* Attr1 in MAIR0 is configured as normal memory. */
|
/* Attr0 in MAIR0 is configured as normal memory. */
|
||||||
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -135,6 +135,15 @@
|
||||||
#define portPRIVILEGE_BIT ( 0x0UL )
|
#define portPRIVILEGE_BIT ( 0x0UL )
|
||||||
#endif /* configENABLE_MPU */
|
#endif /* configENABLE_MPU */
|
||||||
|
|
||||||
|
/* MPU settings that can be overriden in FreeRTOSConfig.h. */
|
||||||
|
#ifndef configTOTAL_MPU_REGIONS
|
||||||
|
/* Define to 8 for backward compatibility. */
|
||||||
|
#define configTOTAL_MPU_REGIONS ( 8UL )
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if( configTOTAL_MPU_REGIONS == 16 )
|
||||||
|
#error 16 MPU regions are not yet supported for this port.
|
||||||
|
#endif
|
||||||
|
|
||||||
/* MPU regions. */
|
/* MPU regions. */
|
||||||
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
#define portPRIVILEGED_FLASH_REGION ( 0UL )
|
||||||
|
@ -143,7 +152,7 @@
|
||||||
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
#define portPRIVILEGED_RAM_REGION ( 3UL )
|
||||||
#define portSTACK_REGION ( 4UL )
|
#define portSTACK_REGION ( 4UL )
|
||||||
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
#define portFIRST_CONFIGURABLE_REGION ( 5UL )
|
||||||
#define portLAST_CONFIGURABLE_REGION ( 7UL )
|
#define portLAST_CONFIGURABLE_REGION ( configTOTAL_MPU_REGIONS - 1UL )
|
||||||
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
|
||||||
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue