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Add support for 16 MPU regions to GCC Cortex-M33 ports (#448)

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* Add support for 16 MPU regions to GCC Cortex-M33 TZ port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add support for 16 MPU regions to Cortex-M33 NTZ GCC port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
This commit is contained in:
Gaurav-Aggarwal-AWS 2022-02-07 16:51:19 -08:00 • committed by GitHub
parent 76a8335b23
commit cf248aec2d
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GPG key ID: 4AEE18F83AFDEB23
29 changed files with 7506 additions and 7204 deletions
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10
portable/ARMv8M/non_secure/port.c
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@ -184,7 +184,7 @@
#define portMPU_ENABLE_BIT ( 1UL << 0UL )
/* Expected value of the portMPU_TYPE register. */
#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
#define portEXPECTED_MPU_TYPE_VALUE ( configTOTAL_MPU_REGIONS << 8UL )
/*-----------------------------------------------------------*/
/**
@ -625,6 +625,12 @@ static void prvTaskExitError( void )
extern uint32_t __privileged_sram_end__[];
#endif /* defined( __ARMCC_VERSION ) */
/* The only permitted number of regions are 8 or 16. */
configASSERT( ( configTOTAL_MPU_REGIONS == 8 ) || ( configTOTAL_MPU_REGIONS == 16 ) );
/* Ensure that the configTOTAL_MPU_REGIONS is configured correctly. */
configASSERT( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE );
/* Check that the MPU is present. */
if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
{
@ -1156,7 +1162,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
}
else
{
/* Attr1 in MAIR0 is configured as normal memory. */
/* Attr0 in MAIR0 is configured as normal memory. */
xMPUSettings->xRegionsSettings[ ulRegionNumber ].ulRLAR |= portMPU_RLAR_ATTR_INDEX0;
}
}