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Add support for the configUSE_TASK_FPU_SUPPORT constant in the GCC/ARM_CR5 port (#584)

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* Add support for the configUSE_TASK_FPU_SUPPORT in the GCC/ARM_CR5 port

This is done almost identically as in the GCC/ARM_CA9 port

* Adjust task stack initialitation of the GCC/ARM_CR5 port

Ensure that the task stack initialization is done correctly for the
different options of configUSE_TASK_FPU_SUPPORT.

This is very similar to the GCC/ARM_CA9 port. The only meaningful
difference is, that the FPU of the Cortex-R5 has just sixteen 64-bit
floating point registers as it implements the VFPv3-D16 architecture.
You may also refer to the ARM documentation

* Add support for FPU safe interrupts to the GCC/ARM_CR5 port

Similar to GCC/ARM_CA9 port

* Clarify comment about the size of the FPU registers of Cortex R5
This commit is contained in:
ChristosZosi 2022-11-14 06:18:47 +01:00 • committed by GitHub
parent 1072988de7
commit cd1f51cb5e
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3 changed files with 127 additions and 16 deletions
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37
portable/GCC/ARM_CR5/portASM.S
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@ -262,6 +262,42 @@ switch_before_exit:
next. */
portRESTORE_CONTEXT
/******************************************************************************
* If the application provides an implementation of vApplicationIRQHandler(),
* then it will get called directly without saving the FPU registers on
* interrupt entry, and this weak implementation of
* vApplicationIRQHandler() will not get called.
*
* If the application provides its own implementation of
* vApplicationFPUSafeIRQHandler() then this implementation of
* vApplicationIRQHandler() will be called, save the FPU registers, and then
* call vApplicationFPUSafeIRQHandler().
*
* Therefore, if the application writer wants FPU registers to be saved on
* interrupt entry their IRQ handler must be called
* vApplicationFPUSafeIRQHandler(), and if the application writer does not want
* FPU registers to be saved on interrupt entry their IRQ handler must be
* called vApplicationIRQHandler().
*****************************************************************************/
.align 4
.weak vApplicationIRQHandler
.type vApplicationIRQHandler, %function
vApplicationIRQHandler:
PUSH {LR}
FMRX R1, FPSCR
VPUSH {D0-D15}
PUSH {R1}
LDR r1, vApplicationFPUSafeIRQHandlerConst
BLX r1
POP {R0}
VPOP {D0-D15}
VMSR FPSCR, R0
POP {PC}
ulICCIARConst: .word ulICCIAR
ulICCEOIRConst: .word ulICCEOIR
ulICCPMRConst: .word ulICCPMR
@ -272,6 +308,7 @@ ulMaxAPIPriorityMaskConst: .word ulMaxAPIPriorityMask
vTaskSwitchContextConst: .word vTaskSwitchContext
vApplicationIRQHandlerConst: .word vApplicationIRQHandler
ulPortInterruptNestingConst: .word ulPortInterruptNesting
vApplicationFPUSafeIRQHandlerConst: .word vApplicationFPUSafeIRQHandler
.end