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Update polarfire project to latest RISC-V port with vector mode support (#791)
* Update PolarFire Project to support vector mode.l * Update vector alignments. * Update file headers. * Code review changes Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
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Ming Yue
GitHub
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commit
cc8c0266a8
3 changed files with 125 additions and 3 deletions
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@ -5,10 +5,10 @@
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<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
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<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
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<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
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<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-651266087234227896" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
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<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-1167646644509623642" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
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<language-scope id="org.eclipse.cdt.core.gcc"/>
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<language-scope id="org.eclipse.cdt.core.g++"/>
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</provider>
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</extension>
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</configuration>
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</project>
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</project>
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@ -20,7 +20,7 @@
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://aws.amazon.com/freertos
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* https://github.com/FreeRTOS
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*
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*/
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@ -60,8 +60,22 @@
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or 0 to run the more comprehensive test and demo application. */
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#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0
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/* Set to 1 to use direct mode and set to 0 to use vectored mode.
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VECTOR MODE=Direct --> all traps into machine mode cause the pc to be set to the
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vector base address (BASE) in the mtvec register.
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VECTOR MODE=Vectored --> all synchronous exceptions into machine mode cause the
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pc to be set to the BASE, whereas interrupts cause the pc to be set to the
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address BASE plus four times the interrupt cause number.
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*/
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#define mainVECTOR_MODE_DIRECT 0
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/*-----------------------------------------------------------*/
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extern void freertos_risc_v_trap_handler( void );
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extern void freertos_vector_table( void );
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/*
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* main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.
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* main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0.
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@ -121,6 +135,16 @@ static void prvSetupHardware( void )
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mss_config_clk_rst( MSS_PERIPH_GPIO2, ( uint8_t )MPFS_HAL_FIRST_HART, PERIPHERAL_ON );
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MSS_GPIO_config( GPIO2_LO, MSS_GPIO_16, MSS_GPIO_OUTPUT_MODE ); /* Red Led (LED1). */
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MSS_GPIO_config( GPIO2_LO, MSS_GPIO_18, MSS_GPIO_OUTPUT_MODE ); /* Yellow Led (LED3). */
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#if( mainVECTOR_MODE_DIRECT == 1 )
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{
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__asm__ volatile( "csrw mtvec, %0" :: "r"( freertos_risc_v_trap_handler ) );
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}
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#else
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{
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__asm__ volatile( "csrw mtvec, %0" :: "r"( ( uintptr_t )freertos_vector_table | 0x1 ) );
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}
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#endif
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}
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/*-----------------------------------------------------------*/
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@ -0,0 +1,98 @@
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/*
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* FreeRTOS V202112.00
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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.extern freertos_risc_v_exception_handler
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.extern freertos_risc_v_interrupt_handler
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.extern freertos_risc_v_mtimer_interrupt_handler
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.balign 256, 0
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.option norvc
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.global freertos_vector_table
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freertos_vector_table:
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IRQ_0:
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j freertos_risc_v_exception_handler
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IRQ_1:
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j freertos_risc_v_interrupt_handler
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IRQ_2:
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j freertos_risc_v_interrupt_handler
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IRQ_3:
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j freertos_risc_v_interrupt_handler
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IRQ_4:
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j freertos_risc_v_interrupt_handler
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IRQ_5:
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j freertos_risc_v_interrupt_handler
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IRQ_6:
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j freertos_risc_v_interrupt_handler
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IRQ_7:
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j freertos_risc_v_mtimer_interrupt_handler
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IRQ_8:
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j freertos_risc_v_interrupt_handler
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IRQ_9:
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j freertos_risc_v_interrupt_handler
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IRQ_10:
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j freertos_risc_v_interrupt_handler
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IRQ_11:
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j freertos_risc_v_interrupt_handler
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IRQ_12:
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j freertos_risc_v_interrupt_handler
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IRQ_13:
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j freertos_risc_v_interrupt_handler
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IRQ_14:
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j freertos_risc_v_interrupt_handler
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IRQ_15:
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j freertos_risc_v_interrupt_handler
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IRQ_LC0:
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j freertos_risc_v_interrupt_handler
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IRQ_LC1:
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j freertos_risc_v_interrupt_handler
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IRQ_LC2:
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j freertos_risc_v_interrupt_handler
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IRQ_LC3:
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j freertos_risc_v_interrupt_handler
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IRQ_LC4:
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j freertos_risc_v_interrupt_handler
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IRQ_LC5:
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j freertos_risc_v_interrupt_handler
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IRQ_LC6:
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j freertos_risc_v_interrupt_handler
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IRQ_LC7:
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j freertos_risc_v_interrupt_handler
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IRQ_LC8:
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j freertos_risc_v_interrupt_handler
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IRQ_LC9:
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j freertos_risc_v_interrupt_handler
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IRQ_LC10:
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j freertos_risc_v_interrupt_handler
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IRQ_LC11:
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j freertos_risc_v_interrupt_handler
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IRQ_LC12:
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j freertos_risc_v_interrupt_handler
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IRQ_LC13:
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j freertos_risc_v_interrupt_handler
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IRQ_LC14:
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j freertos_risc_v_interrupt_handler
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IRQ_LC15:
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j freertos_risc_v_interrupt_handler
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