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Ching-Hsin,Lee 2024-07-08 10:50:07 +08:00
parent 4ec5b9d94d
commit cb0b1ed882
1 changed files with 23 additions and 23 deletions
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46
tasks.c
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@ -348,6 +348,29 @@
} \
} while( 0 )
#endif /* #if ( configNUMBER_OF_CORES > 1 ) */
#if ( configNUMBER_OF_CORES == 1 )
#define prvGetCurrentTaskTCB() pxCurrentTCB
#define prvGetCurrentTaskTCBUnsafe() pxCurrentTCB
#define prvSetCurrentTaskTCBUnsafe( pxTCB ) \
do{ \
pxCurrentTCB = pxTCB; \
} while( 0 )
#else
/* Retrieving the current task TCB in a multi-core environment involves two steps:
* 1. Obtaining the core ID.
* 2. Using the core ID to index the pxCurrentTCBs array.
* If these two steps are not performed atomically, a race condition may occur.
* To ensure atomicity, prvGetCurrentTaskTCBUnsafe() should be called in a context where
* the core executing the task remains fixed until the operation is completed. */
#define prvGetCurrentTaskTCBUnsafe() pxCurrentTCBs[ portGET_CORE_ID() ]
#define prvSetCurrentTaskTCBUnsafe( pxTCB ) \
do{ \
pxCurrentTCBs[ portGET_CORE_ID() ] = pxTCB; \
} while( 0 )
#endif /* if ( configNUMBER_OF_CORES == 1 ) */
/*-----------------------------------------------------------*/
/*
@ -439,29 +462,6 @@ typedef struct tskTaskControlBlock /* The old naming convention is used to
* below to enable the use of older kernel aware debuggers. */
typedef tskTCB TCB_t;
/* Retrieving the current task TCB in a multi-core environment involves two steps:
* 1. Obtaining the core ID.
* 2. Using the core ID to index the pxCurrentTCBs array.
* If these two steps are not performed atomically, a race condition may occur.
* To ensure atomicity, prvGetCurrentTaskTCBUnsafe() should be called in a context where
* the core executing the task remains fixed until the operation is completed. */
#if ( configNUMBER_OF_CORES == 1 )
#define prvGetCurrentTaskTCBUnsafe() pxCurrentTCB
#define prvGetCurrentTaskTCB() pxCurrentTCB
#define prvSetCurrentTaskTCBUnsafe( pxTCB ) \
do{ \
pxCurrentTCB = pxTCB; \
} while( 0 )
#else
#define prvGetCurrentTaskTCBUnsafe() pxCurrentTCBs[ portGET_CORE_ID() ]
#define prvSetCurrentTaskTCBUnsafe( pxTCB ) \
do{ \
pxCurrentTCBs[ portGET_CORE_ID() ] = pxTCB; \
} while( 0 )
#endif /* if ( configNUMBER_OF_CORES == 1 ) */
#if ( configNUMBER_OF_CORES == 1 )
/* MISRA Ref 8.4.1 [Declaration shall be visible] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-84 */