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Use saved mstatus for FPU/VPU state determination (#1330)

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According to the RISC-V Privileged Architecture Specification (20211203),
writing Initial or Clean to the FS field of mstatus may result in the FS
value getting set to Dirty in some implementations. This means we cannot
rely on reading back the same FS value after writing to mstatus.

Previously, the context restore code would:
1. Write an FS value to mstatus
2. Read mstatus again at a later point
3. Use the read FS value to determine FPU status

This change updates the context restore code to use the mstatus value
from the saved context instead of re-reading mstatus after writing to
it. This required chaning the location of the mstatus slot in the
context.

Fixes: https://github.com/FreeRTOS/FreeRTOS-Kernel/issues/1327

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
This commit is contained in:
Gaurav-Aggarwal-AWS 2025-11-03 12:32:08 +05:30 • committed by GitHub
parent 8b63f94d8d
commit c8d31ddcff
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3 changed files with 35 additions and 34 deletions
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24
portable/GCC/RISC-V/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h
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@ -80,22 +80,22 @@ csrr t2, lpcount0
csrr t3, lpstart1
csrr t4, lpend1
csrr t5, lpcount1
sw t0, 2 * portWORD_SIZE( sp )
sw t1, 3 * portWORD_SIZE( sp )
sw t2, 4 * portWORD_SIZE( sp )
sw t3, 5 * portWORD_SIZE( sp )
sw t4, 6 * portWORD_SIZE( sp )
sw t5, 7 * portWORD_SIZE( sp )
sw t0, 1 * portWORD_SIZE( sp )
sw t1, 2 * portWORD_SIZE( sp )
sw t2, 3 * portWORD_SIZE( sp )
sw t3, 4 * portWORD_SIZE( sp )
sw t4, 5 * portWORD_SIZE( sp )
sw t5, 6 * portWORD_SIZE( sp )
.endm
/* Restore the additional registers found on the Pulpino. */
.macro portasmRESTORE_ADDITIONAL_REGISTERS
lw t0, 2 * portWORD_SIZE( sp ) /* Load additional registers into accessible temporary registers. */
lw t1, 3 * portWORD_SIZE( sp )
lw t2, 4 * portWORD_SIZE( sp )
lw t3, 5 * portWORD_SIZE( sp )
lw t4, 6 * portWORD_SIZE( sp )
lw t5, 7 * portWORD_SIZE( sp )
lw t0, 1 * portWORD_SIZE( sp ) /* Load additional registers into accessible temporary registers. */
lw t1, 2 * portWORD_SIZE( sp )
lw t2, 3 * portWORD_SIZE( sp )
lw t3, 4 * portWORD_SIZE( sp )
lw t4, 5 * portWORD_SIZE( sp )
lw t5, 6 * portWORD_SIZE( sp )
csrw lpstart0, t0
csrw lpend0, t1
csrw lpcount0, t2