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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Work in progress on the Cortus port.
This commit is contained in:
Richard Barry
parent
a671be77bf
commit
c848059d5f
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@ -33,9 +33,9 @@
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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@ -64,14 +64,14 @@
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/*-----------------------------------------------------------*/
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/* The initial PSR has the Previous Interrupt Enabled (PIEN) flag set. */
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#define portINITIAL_PSR ( 0x00020000 )
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#define portINITIAL_PSR ( 0x00020000 )
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/*-----------------------------------------------------------*/
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/*
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* Perform any hardware configuration necessary to generate the tick interrupt.
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*/
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static void prvSetupTickInterrupt( void );
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static void prvSetupTimerInterrupt( void );
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/*-----------------------------------------------------------*/
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/* Variables used to hold interrupt and critical nesting depths, with variables
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@ -84,20 +84,20 @@ const volatile unsigned portBASE_TYPE *puxTopOfInterruptStack = &( uxInterruptSt
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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/* For the time being, mimic the stack when using the
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/* For the time being, mimic the stack when using the
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__attribute__((interrupt)) plus the extra caller saved registers. */
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pxTopOfStack -= 17;
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/* RTT */
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pxTopOfStack[ 16 ] = ( portSTACK_TYPE )pxCode;
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/* PSR */
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pxTopOfStack[ 15 ] = portINITIAL_PSR;
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/* R14 and R15 aka FuncSP and LR, respectively */
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pxTopOfStack[ 14 ] = 0x00000000;
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pxTopOfStack[ 13 ] = ( portSTACK_TYPE )( pxTopOfStack + 17 );
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/* R7 to R2 */
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pxTopOfStack[ 12 ] = 0x07070707;
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pxTopOfStack[ 11 ] = 0x06060606;
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@ -105,10 +105,10 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_COD
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pxTopOfStack[ 9 ] = 0x04040404;
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pxTopOfStack[ 8 ] = 0x03030303;
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pxTopOfStack[ 7 ] = ( portSTACK_TYPE )pvParameters;
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/* Set the Interrupt Priority on Task entry. */
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pxTopOfStack[ 6 ] = portKERNEL_INTERRUPT_PRIORITY_LEVEL;
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/* R13 to R8. */
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pxTopOfStack[ 5 ] = 0x0D0D0D0D;
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pxTopOfStack[ 4 ] = 0x0C0C0C0C;
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@ -123,8 +123,8 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_COD
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portBASE_TYPE xPortStartScheduler( void )
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{
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/* Set-up the Tick Interrupt. */
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prvSetupTickInterrupt();
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/* Set-up the timer interrupt. */
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prvSetupTimerInterrupt();
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/* Enable the TRAP yield. */
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irq[ portIRQ_TRAP_YIELD ].ien = 1;
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@ -137,7 +137,7 @@ portBASE_TYPE xPortStartScheduler( void )
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/* Restore calleree saved registers. */
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portRESTORE_CONTEXT_REDUCED();
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/* Mimic an ISR epiplogue to start the task executing. */
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/* Mimic an ISR epilogue to start the task executing. */
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asm __volatile__( \
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"mov r1, r14 \n" \
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"ldd r6, [r1]+0x20 \n" \
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@ -155,7 +155,7 @@ portBASE_TYPE xPortStartScheduler( void )
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}
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/*-----------------------------------------------------------*/
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static void prvSetupTickInterrupt( void )
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static void prvSetupTimerInterrupt( void )
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{
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/* Enable timer interrupts */
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counter1->reload = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1;
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@ -202,7 +202,7 @@ void interrupt_handler( IRQ_COUNTER1 )
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:
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:"i"( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 )
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:"r2","r3" /* Fix the stack. */
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);
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);
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#if configUSE_PREEMPTION == 1
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portYIELD_FROM_ISR();
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@ -33,9 +33,9 @@
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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@ -114,6 +114,20 @@ extern volatile unsigned portBASE_TYPE uxInterruptNestingCount;
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#define portYIELD() asm __volatile__( " trap #%0 "::"i"(portIRQ_TRAP_YIELD):"memory")
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/*---------------------------------------------------------------------------*/
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extern void vTaskEnterCritical( void );
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extern void vTaskExitCritical( void );
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#define portENTER_CRITICAL() vTaskEnterCritical()
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#define portEXIT_CRITICAL() vTaskExitCritical()
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/*---------------------------------------------------------------------------*/
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/* Critical section management. */
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#define portDISABLE_INTERRUPTS() ic->cpl = ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 )
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#define portENABLE_INTERRUPTS() ic->cpl = portKERNEL_INTERRUPT_PRIORITY_LEVEL
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#define portSET_INTERRUPT_MASK_FROM_ISR() ic->cpl; portDISABLE_INTERRUPTS()
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#define portRESTORE_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) ic->cpl = uxSavedInterruptStatus
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/*---------------------------------------------------------------------------*/
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#define portYIELD_FROM_ISR() \
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{ \
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asm __volatile__( \
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@ -132,43 +146,13 @@ extern volatile unsigned portBASE_TYPE uxInterruptNestingCount;
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:"i"(portSYSTEM_INTERRUPT_PRIORITY_LEVEL+1) \
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:"r2","r3"); \
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}
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/*---------------------------------------------------------------------------*/
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extern void vTaskEnterCritical( void );
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extern void vTaskExitCritical( void );
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#define portENTER_CRITICAL() vTaskEnterCritical()
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#define portEXIT_CRITICAL() vTaskExitCritical()
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/*---------------------------------------------------------------------------*/
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/* Critical section management. */
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#define portDISABLE_INTERRUPTS() \
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{ /*ic->cpl = ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 );*/ \
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asm __volatile__( \
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" movhi r2, #16384 \n" \
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" mov r3, #%0 \n" \
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" stb r3, [r2]+2" \
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: \
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:"i"(portSYSTEM_INTERRUPT_PRIORITY_LEVEL+1) \
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:"r2", "r3" ); \
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}
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/*---------------------------------------------------------------------------*/
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#define portENABLE_INTERRUPTS() \
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{ /*ic->cpl = portKERNEL_INTERRUPT_PRIORITY_LEVEL;*/ \
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asm __volatile__( \
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" movhi r2, #16384 \n" \
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" mov r3, #%0 \n" \
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" stb r3, [r2]+2" \
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: \
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:"i"(portKERNEL_INTERRUPT_PRIORITY_LEVEL) \
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:"r2", "r3" ); \
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}
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/*---------------------------------------------------------------------------*/
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#define portSAVE_CONTEXT_REDUCED() \
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{ \
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asm __volatile__( \
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/* "sub r1, #0x28" */ \
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/* "sub r1, #0x28" */ /* Prologue generated by the compiler. */ \
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/* "stq r4, [r1]+0x8" */ \
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/* "mov r6, psr" */ \
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/* "mov r7, rtt" */ \
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@ -221,7 +205,7 @@ extern void vTaskExitCritical( void );
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"ldq r8, [r1] \n" \
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"add r1, #0x1c \n" \
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"mov r14, r1 \n" \
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/* "mov r1, r14" */ \
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/* "mov r1, r14" */ /* Epilogue generated by the compiler. */ \
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/* "ldd r6, [r1]+0x20" */ \
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/* "mov psr, r6" */ \
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/* "mov rtt, r7" */ \
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