mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2026-10-10 08:02:57 -04:00
Merge b4972f4093 into 8be86d4a24
This commit is contained in:
commit
c4fea5df12
4 changed files with 32 additions and 28 deletions
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@ -95,6 +95,7 @@ typedef void ( * portISR_t )( void );
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#define portMPU_REGION_ENABLE ( 0x01UL )
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#define portPERIPHERALS_START_ADDRESS 0x40000000UL
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#define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL
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#define portMPU_RBAR_ADDRESS_MASK 0xFFFFFFE0
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/* Constants required to access and manipulate the SysTick and other FreeRTOS
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* interrupts. */
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@ -1137,7 +1138,7 @@ static void prvSetupMPU( void )
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if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
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{
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/* First setup the unprivileged flash for unprivileged read only access. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( ( uint32_t ) __FLASH_segment_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portUNPRIVILEGED_FLASH_REGION );
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@ -1148,7 +1149,7 @@ static void prvSetupMPU( void )
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/* Setup the privileged flash for privileged only access. This is where
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* the kernel code is * placed. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portPRIVILEGED_FLASH_REGION );
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@ -1159,7 +1160,7 @@ static void prvSetupMPU( void )
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/* Setup the privileged data RAM region. This is where the kernel data
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* is placed. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( ( uint32_t ) __privileged_data_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portPRIVILEGED_RAM_REGION );
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@ -1171,7 +1172,7 @@ static void prvSetupMPU( void )
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/* By default allow everything to access the general peripherals. The
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* system peripherals and registers are protected. */
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portMPU_REGION_BASE_ADDRESS_REG = ( portPERIPHERALS_START_ADDRESS ) |
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portMPU_REGION_BASE_ADDRESS_REG = ( portPERIPHERALS_START_ADDRESS & portMPU_RBAR_ADDRESS_MASK ) |
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( portMPU_REGION_VALID ) |
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( portGENERAL_PERIPHERALS_REGION );
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@ -1281,7 +1282,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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{
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/* No MPU regions are specified so allow access to all RAM. */
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xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
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( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
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( ( ( uint32_t ) __SRAM_segment_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portSTACK_REGION ); /* Region number. */
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@ -1317,7 +1318,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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{
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/* Define the region that allows access to the stack. */
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xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
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( ( uint32_t ) pxBottomOfStack ) |
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( ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK ) |
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( portMPU_REGION_VALID ) |
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( portSTACK_REGION ); /* Region number. */
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@ -1344,7 +1345,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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* xRegions into the CM3 specific MPU settings that are then
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* stored in xMPUSettings. */
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xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
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( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
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( ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK ) |
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( portMPU_REGION_VALID ) |
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( ul - 1UL ); /* Region number. */
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@ -105,6 +105,7 @@ typedef void ( * portISR_t )( void );
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#define portMPU_REGION_ENABLE ( 0x01UL )
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#define portPERIPHERALS_START_ADDRESS 0x40000000UL
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#define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL
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#define portMPU_RBAR_ADDRESS_MASK 0xFFFFFFE0
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/* Constants required to access and manipulate the SysTick and other FreeRTOS
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* interrupts. */
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@ -1282,7 +1283,7 @@ static void prvSetupMPU( void )
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if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
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{
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/* First setup the unprivileged flash for unprivileged read only access. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( ( uint32_t ) __FLASH_segment_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portUNPRIVILEGED_FLASH_REGION );
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@ -1293,7 +1294,7 @@ static void prvSetupMPU( void )
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/* Setup the privileged flash for privileged only access. This is where
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* the kernel code is placed. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portPRIVILEGED_FLASH_REGION );
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@ -1304,7 +1305,7 @@ static void prvSetupMPU( void )
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/* Setup the privileged data RAM region. This is where the kernel data
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* is placed. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( ( uint32_t ) __privileged_data_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portPRIVILEGED_RAM_REGION );
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@ -1316,7 +1317,7 @@ static void prvSetupMPU( void )
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/* By default allow everything to access the general peripherals. The
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* system peripherals and registers are protected. */
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portMPU_REGION_BASE_ADDRESS_REG = ( portPERIPHERALS_START_ADDRESS ) |
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portMPU_REGION_BASE_ADDRESS_REG = ( portPERIPHERALS_START_ADDRESS & portMPU_RBAR_ADDRESS_MASK ) |
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( portMPU_REGION_VALID ) |
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( portGENERAL_PERIPHERALS_REGION );
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@ -1426,7 +1427,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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{
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/* No MPU regions are specified so allow access to all RAM. */
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xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
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( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
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( ( ( uint32_t ) __SRAM_segment_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portSTACK_REGION ); /* Region number. */
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@ -1462,7 +1463,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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{
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/* Define the region that allows access to the stack. */
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xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
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( ( uint32_t ) pxBottomOfStack ) |
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( ( ( uint32_t ) pxBottomOfStack & portMPU_RBAR_ADDRESS_MASK ) ) |
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( portMPU_REGION_VALID ) |
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( portSTACK_REGION ); /* Region number. */
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@ -1490,7 +1491,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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* xRegions into the CM4 specific MPU settings that are then
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* stored in xMPUSettings. */
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xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
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( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
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( ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK ) |
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( portMPU_REGION_VALID ) |
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( ul - 1UL ); /* Region number. */
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@ -106,6 +106,7 @@ typedef void ( * portISR_t )( void );
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#define portMPU_REGION_ENABLE ( 0x01UL )
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#define portPERIPHERALS_START_ADDRESS 0x40000000UL
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#define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL
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#define portMPU_RBAR_ADDRESS_MASK 0xFFFFFFE0
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/* ...then bits in the registers. */
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#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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@ -1071,7 +1072,7 @@ static void prvSetupMPU( void )
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if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
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{
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/* First setup the unprivileged flash for unprivileged read only access. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( ( uint32_t ) __FLASH_segment_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portUNPRIVILEGED_FLASH_REGION );
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@ -1082,7 +1083,7 @@ static void prvSetupMPU( void )
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/* Setup the privileged flash for privileged only access. This is where
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* the kernel code is placed. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portPRIVILEGED_FLASH_REGION );
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@ -1093,7 +1094,7 @@ static void prvSetupMPU( void )
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/* Setup the privileged data RAM region. This is where the kernel data
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* is placed. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( ( uint32_t ) __privileged_data_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portPRIVILEGED_RAM_REGION );
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@ -1105,7 +1106,7 @@ static void prvSetupMPU( void )
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/* By default allow everything to access the general peripherals. The
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* system peripherals and registers are protected. */
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portMPU_REGION_BASE_ADDRESS_REG = ( portPERIPHERALS_START_ADDRESS ) |
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portMPU_REGION_BASE_ADDRESS_REG = ( portPERIPHERALS_START_ADDRESS & portMPU_RBAR_ADDRESS_MASK ) |
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( portMPU_REGION_VALID ) |
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( portGENERAL_PERIPHERALS_REGION );
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@ -1162,7 +1163,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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{
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/* No MPU regions are specified so allow access to all RAM. */
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xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
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( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
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( ( ( uint32_t ) __SRAM_segment_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portSTACK_REGION ); /* Region number. */
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@ -1198,7 +1199,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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{
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/* Define the region that allows access to the stack. */
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xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
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( ( uint32_t ) pxBottomOfStack ) |
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( ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK ) |
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( portMPU_REGION_VALID ) |
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( portSTACK_REGION ); /* Region number. */
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@ -1226,7 +1227,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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* xRegions into the CM4 specific MPU settings that are then
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* stored in xMPUSettings. */
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xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
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( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
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( ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK ) |
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( portMPU_REGION_VALID ) |
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( ul - 1UL ); /* Region number. */
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@ -94,6 +94,7 @@ typedef void ( * portISR_t )( void );
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#define portMPU_REGION_ENABLE ( 0x01UL )
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#define portPERIPHERALS_START_ADDRESS 0x40000000UL
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#define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL
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#define portMPU_RBAR_ADDRESS_MASK 0xFFFFFFE0
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/* Constants required to access and manipulate the SysTick and other FreeRTOS
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* interrupts. */
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@ -1282,7 +1283,7 @@ static void prvSetupMPU( void )
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if( portMPU_TYPE_REG == portEXPECTED_MPU_TYPE_VALUE )
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{
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/* First setup the unprivileged flash for unprivileged read only access. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __FLASH_segment_start__ ) | /* Base address. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( ( uint32_t ) __FLASH_segment_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portUNPRIVILEGED_FLASH_REGION );
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@ -1293,7 +1294,7 @@ static void prvSetupMPU( void )
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/* Setup the privileged flash for privileged only access. This is where
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* the kernel code is placed. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_functions_start__ ) | /* Base address. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portPRIVILEGED_FLASH_REGION );
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@ -1304,7 +1305,7 @@ static void prvSetupMPU( void )
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/* Setup the privileged data RAM region. This is where the kernel data
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* is placed. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( uint32_t ) __privileged_data_start__ ) | /* Base address. */
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portMPU_REGION_BASE_ADDRESS_REG = ( ( ( uint32_t ) __privileged_data_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portPRIVILEGED_RAM_REGION );
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@ -1316,7 +1317,7 @@ static void prvSetupMPU( void )
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/* By default allow everything to access the general peripherals. The
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* system peripherals and registers are protected. */
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portMPU_REGION_BASE_ADDRESS_REG = ( portPERIPHERALS_START_ADDRESS ) |
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portMPU_REGION_BASE_ADDRESS_REG = ( portPERIPHERALS_START_ADDRESS & portMPU_RBAR_ADDRESS_MASK ) |
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( portMPU_REGION_VALID ) |
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( portGENERAL_PERIPHERALS_REGION );
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@ -1416,7 +1417,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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{
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/* No MPU regions are specified so allow access to all RAM. */
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xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
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( ( uint32_t ) __SRAM_segment_start__ ) | /* Base address. */
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( ( ( uint32_t ) __SRAM_segment_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portSTACK_REGION ); /* Region number. */
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@ -1452,7 +1453,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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{
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/* Define the region that allows access to the stack. */
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xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
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( ( uint32_t ) pxBottomOfStack ) |
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( ( ( uint32_t ) pxBottomOfStack ) & portMPU_RBAR_ADDRESS_MASK ) |
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( portMPU_REGION_VALID ) |
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( portSTACK_REGION ); /* Region number. */
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@ -1480,7 +1481,7 @@ void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
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* xRegions into the CM4 specific MPU settings that are then
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* stored in xMPUSettings. */
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xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
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( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) |
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( ( ( uint32_t ) xRegions[ lIndex ].pvBaseAddress ) & portMPU_RBAR_ADDRESS_MASK ) |
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( portMPU_REGION_VALID ) |
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( ul - 1UL ); /* Region number. */
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