mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 09:38:32 -04:00
Remove system files not longer required by IAR V5.11.
This commit is contained in:
Richard Barry
parent
474cb76864
commit
c4edb21f63
21 changed files with 0 additions and 4915 deletions
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@ -1,866 +0,0 @@
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<?xml version="1.0" encoding="iso-8859-1"?>
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<project>
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<fileVersion>2</fileVersion>
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<configuration>
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<name>Debug</name>
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<outputs>
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<file>$PROJ_DIR$\..\Common\Minimal\comtest.c</file>
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<file>$PROJ_DIR$\Debug\Obj\tasks.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\serial.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\71x_lib.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\wdg.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\semtest.r79</file>
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<file>$TOOLKIT_DIR$\inc\string.h</file>
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<file>$TOOLKIT_DIR$\inc\ysizet.h</file>
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<file>$PROJ_DIR$\..\Common\include\comtest.h</file>
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<file>$PROJ_DIR$\Debug\Obj\BlockQ.pbi</file>
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<file>$PROJ_DIR$\..\Common\include\dynamic.h</file>
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<file>$PROJ_DIR$\Library\include\71x_map.h</file>
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<file>$PROJ_DIR$\Debug\Obj\list.r79</file>
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<file>$PROJ_DIR$\Library\include\eic.h</file>
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<file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
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<file>$PROJ_DIR$\Debug\Obj\list.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\ParTest.r79</file>
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<file>$PROJ_DIR$\Debug\Obj\BlockQ.r79</file>
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<file>$TOOLKIT_DIR$\inc\yvals.h</file>
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<file>$PROJ_DIR$\Debug\Obj\main.r79</file>
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<file>$PROJ_DIR$\..\Common\include\partest.h</file>
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<file>$PROJ_DIR$\Library\include\rccu.h</file>
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<file>$PROJ_DIR$\Debug\Obj\portasm.r79</file>
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<file>$PROJ_DIR$\..\..\Source\portable\IAR\STR71x\ISR_Support.h</file>
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<file>$PROJ_DIR$\..\Common\include\PollQ.h</file>
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<file>$PROJ_DIR$\Debug\Obj\cstartup.r79</file>
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<file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>
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<file>$PROJ_DIR$\FreeRTOSConfig.h</file>
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<file>$PROJ_DIR$\Debug\Obj\dynamic.pbi</file>
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<file>$PROJ_DIR$\..\..\Source\include\FreeRTOS.h</file>
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<file>$PROJ_DIR$\Debug\Obj\heap_2.r79</file>
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<file>$PROJ_DIR$\Debug\Obj\queue.r79</file>
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<file>$PROJ_DIR$\..\..\Source\include\queue.h</file>
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<file>$TOOLKIT_DIR$\inc\stdlib.h</file>
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<file>$PROJ_DIR$\Library\include\wdg.h</file>
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<file>$PROJ_DIR$\Debug\Obj\serialISR.r79</file>
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<file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
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<file>$PROJ_DIR$\Debug\Obj\heap_2.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\integer.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\rccu.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\uart.r79</file>
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<file>$PROJ_DIR$\Debug\Obj\port.pbi</file>
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<file>$PROJ_DIR$\..\..\Source\include\croutine.h</file>
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<file>$PROJ_DIR$\Debug\Obj\queue.pbi</file>
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<file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
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<file>$PROJ_DIR$\Debug\Obj\port.r79</file>
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<file>$TOOLKIT_DIR$\inc\stddef.h</file>
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<file>$PROJ_DIR$\..\Common\include\comtest2.h</file>
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<file>$PROJ_DIR$\Library\include\71x_conf.h</file>
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<file>$TOOLKIT_DIR$\inc\stdio.h</file>
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<file>$PROJ_DIR$\Debug\Obj\serial.r79</file>
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<file>$PROJ_DIR$\..\Common\include\BlockQ.h</file>
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<file>$PROJ_DIR$\..\Common\include\integer.h</file>
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<file>$PROJ_DIR$\Debug\Obj\comtest.r79</file>
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<file>$PROJ_DIR$\Debug\Obj\71x_lib.r79</file>
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<file>$PROJ_DIR$\Debug\Obj\main.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\dynamic.r79</file>
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<file>$PROJ_DIR$\Library\include\gpio.h</file>
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<file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
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<file>$PROJ_DIR$\Debug\Obj\tasks.r79</file>
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<file>$PROJ_DIR$\..\..\Source\include\semphr.h</file>
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<file>$TOOLKIT_DIR$\inc\intrinsic.h</file>
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<file>$PROJ_DIR$\Library\include\uart.h</file>
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<file>$PROJ_DIR$\Debug\Exe\RTOSDemo.sim</file>
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<file>$PROJ_DIR$\Debug\Obj\flash.r79</file>
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<file>$PROJ_DIR$\Debug\Obj\integer.r79</file>
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<file>$PROJ_DIR$\Debug\Obj\PollQ.r79</file>
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<file>$PROJ_DIR$\Debug\Exe\RTOSDemo.d79</file>
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<file>$TOOLKIT_DIR$\lib\dl4tptinl8n.r79</file>
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<file>$PROJ_DIR$\..\..\Source\include\task.h</file>
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<file>$PROJ_DIR$\Debug\Obj\uart.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\gpio.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\flash.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\vect.r79</file>
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<file>$PROJ_DIR$\..\Common\include\serial.h</file>
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<file>$PROJ_DIR$\..\Common\include\flash.h</file>
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<file>$PROJ_DIR$\Debug\Obj\rccu.r79</file>
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<file>$PROJ_DIR$\Debug\Obj\ParTest.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\PollQ.pbi</file>
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<file>$PROJ_DIR$\Debug\Obj\semtest.pbi</file>
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<file>$PROJ_DIR$\..\..\Source\include\projdefs.h</file>
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<file>$PROJ_DIR$\..\..\Source\include\list.h</file>
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<file>$PROJ_DIR$\Debug\Obj\comtest.pbi</file>
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<file>$PROJ_DIR$\Library\include\71x_type.h</file>
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<file>$PROJ_DIR$\Debug\Obj\gpio.r79</file>
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<file>$PROJ_DIR$\..\..\Source\include\portable.h</file>
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<file>$PROJ_DIR$\..\..\Source\portable\IAR\STR71x\portmacro.h</file>
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<file>$PROJ_DIR$\Debug\Obj\wdg.r79</file>
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<file>$PROJ_DIR$\..\Common\include\semtest.h</file>
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<file>$PROJ_DIR$\cstartup.s79</file>
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<file>$PROJ_DIR$\lnkarm.xcl</file>
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<file>$PROJ_DIR$\vect.s79</file>
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<file>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</file>
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<file>$PROJ_DIR$\serial\serialISR.s79</file>
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<file>$PROJ_DIR$\Library\rccu.c</file>
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<file>$PROJ_DIR$\Library\uart.c</file>
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<file>$PROJ_DIR$\Library\wdg.c</file>
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<file>$PROJ_DIR$\..\..\Source\list.c</file>
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<file>$PROJ_DIR$\..\..\Source\portable\IAR\STR71x\port.c</file>
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<file>$PROJ_DIR$\..\..\Source\portable\IAR\STR71x\portasm.s79</file>
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<file>$PROJ_DIR$\..\..\Source\queue.c</file>
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<file>$PROJ_DIR$\..\..\Source\tasks.c</file>
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<file>$PROJ_DIR$\..\Common\Minimal\flash.c</file>
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<file>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</file>
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<file>$PROJ_DIR$\..\Common\Minimal\dynamic.c</file>
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<file>$PROJ_DIR$\..\Common\Minimal\integer.c</file>
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<file>$PROJ_DIR$\main.c</file>
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<file>$PROJ_DIR$\ParTest\ParTest.c</file>
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<file>$PROJ_DIR$\..\Common\Minimal\PollQ.c</file>
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<file>$PROJ_DIR$\..\Common\Minimal\semtest.c</file>
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<file>$PROJ_DIR$\serial\serial.c</file>
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<file>$PROJ_DIR$\Library\gpio.c</file>
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<file>$PROJ_DIR$\Library\71x_lib.c</file>
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</outputs>
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<file>
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<name>$PROJ_DIR$\..\Common\Minimal\comtest.c</name>
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<outputs>
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<tool>
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<name>ICCARM</name>
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<file> 53</file>
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</tool>
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<tool>
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<name>BICOMP</name>
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<file> 82</file>
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</tool>
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</outputs>
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<inputs>
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<tool>
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<name>ICCARM</name>
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<file> 33 18 44 36 58 14 26 7 29 46 80 27 85 86 61 69 81 74 8 20</file>
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</tool>
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</inputs>
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</file>
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<file>
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<name>[ROOT_NODE]</name>
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<outputs>
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<tool>
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<name>XLINK</name>
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<file> 67 63</file>
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</tool>
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</outputs>
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</file>
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<file>
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<name>$PROJ_DIR$\Debug\Exe\RTOSDemo.d79</name>
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<outputs>
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<tool>
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<name>XLINK</name>
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<file> 63</file>
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</tool>
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</outputs>
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<inputs>
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<tool>
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<name>XLINK</name>
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<file> 90 54 17 16 66 53 25 56 64 84 30 65 12 19 45 22 31 76 5 50 35 59 40 73 87 68</file>
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</tool>
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</inputs>
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</file>
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<file>
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<name>$PROJ_DIR$\cstartup.s79</name>
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<outputs>
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<tool>
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<name>AARM</name>
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<file> 25</file>
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</tool>
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</outputs>
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</file>
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<file>
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<name>$PROJ_DIR$\vect.s79</name>
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<outputs>
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<tool>
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<name>AARM</name>
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<file> 73</file>
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</tool>
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</outputs>
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<inputs>
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<tool>
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<name>AARM</name>
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<file> 27</file>
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</tool>
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</inputs>
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</file>
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<file>
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<name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>
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<outputs>
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<tool>
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<name>ICCARM</name>
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<file> 17</file>
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</tool>
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<tool>
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<name>BICOMP</name>
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<file> 9</file>
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</tool>
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</outputs>
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<inputs>
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<tool>
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<name>ICCARM</name>
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<file> 33 18 44 36 58 14 26 7 29 46 80 27 85 86 61 69 81 32 51</file>
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</tool>
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</inputs>
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</file>
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<file>
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<name>$PROJ_DIR$\serial\serialISR.s79</name>
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<outputs>
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<tool>
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<name>AARM</name>
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<file> 35</file>
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</tool>
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</outputs>
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<inputs>
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<tool>
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<name>AARM</name>
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<file> 23</file>
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</tool>
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</inputs>
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</file>
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<file>
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<name>$PROJ_DIR$\Library\rccu.c</name>
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<outputs>
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<tool>
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<name>ICCARM</name>
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<file> 76</file>
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</tool>
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<tool>
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<name>BICOMP</name>
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<file> 39</file>
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</tool>
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</outputs>
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<inputs>
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<tool>
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<name>ICCARM</name>
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<file> 21 11 48 83</file>
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</tool>
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</inputs>
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</file>
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<file>
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<name>$PROJ_DIR$\Library\uart.c</name>
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<outputs>
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<tool>
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<name>ICCARM</name>
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<file> 40</file>
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</tool>
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<tool>
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<name>BICOMP</name>
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<file> 70</file>
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</tool>
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</outputs>
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<inputs>
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<tool>
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<name>ICCARM</name>
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<file> 62 11 48 83 21</file>
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</tool>
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</inputs>
|
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</file>
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<file>
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<name>$PROJ_DIR$\Library\wdg.c</name>
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<outputs>
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<tool>
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<name>ICCARM</name>
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<file> 87</file>
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</tool>
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<tool>
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<name>BICOMP</name>
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<file> 4</file>
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</tool>
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</outputs>
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<inputs>
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<tool>
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<name>ICCARM</name>
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<file> 34 11 48 83 21</file>
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</tool>
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</inputs>
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</file>
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<file>
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<name>$PROJ_DIR$\..\..\Source\list.c</name>
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<outputs>
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<tool>
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<name>ICCARM</name>
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<file> 12</file>
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</tool>
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<tool>
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<name>BICOMP</name>
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<file> 15</file>
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</tool>
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</outputs>
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<inputs>
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<tool>
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<name>ICCARM</name>
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<file> 33 18 44 36 58 14 26 7 29 46 80 27 85 86 61 81</file>
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</tool>
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</inputs>
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</file>
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<file>
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<name>$PROJ_DIR$\..\..\Source\portable\IAR\STR71x\port.c</name>
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<outputs>
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<tool>
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<name>ICCARM</name>
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<file> 45</file>
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</tool>
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<tool>
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<name>BICOMP</name>
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<file> 41</file>
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</tool>
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</outputs>
|
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<inputs>
|
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<tool>
|
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<name>ICCARM</name>
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<file> 34 11 48 83 21 13 33 18 44 36 58 14 26 7 29 46 80 27 85 86 61 69 81</file>
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</tool>
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</inputs>
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</file>
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<file>
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<name>$PROJ_DIR$\..\..\Source\portable\IAR\STR71x\portasm.s79</name>
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<outputs>
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<tool>
|
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<name>AARM</name>
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<file> 22</file>
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</tool>
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</outputs>
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<inputs>
|
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<tool>
|
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<name>AARM</name>
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<file> 23</file>
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</tool>
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</inputs>
|
||||
</file>
|
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<file>
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<name>$PROJ_DIR$\..\..\Source\queue.c</name>
|
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<outputs>
|
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<tool>
|
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<name>ICCARM</name>
|
||||
<file> 31</file>
|
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</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 43</file>
|
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</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 33 18 44 36 58 14 26 7 6 29 46 80 27 85 86 61 69 81 42</file>
|
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</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
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<name>$PROJ_DIR$\..\..\Source\tasks.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 59</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 1</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 49 18 44 36 58 14 26 7 33 6 29 46 80 27 85 86 61 69 81</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 64</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 72</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 33 18 44 36 58 14 26 7 29 46 80 27 85 86 61 69 81 20 75</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 30</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 37</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 33 18 44 36 58 14 26 7 29 46 80 27 85 86 61 69 81</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\dynamic.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 56</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 28</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 33 18 44 36 58 14 26 7 29 46 80 27 85 86 61 69 81 60 32 10</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 65</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 38</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 33 18 44 36 58 14 26 7 29 46 80 27 85 86 61 69 81 52</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\main.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 19</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 55</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 21 11 48 83 34 29 46 18 44 36 58 14 26 7 80 27 85 86 61 69 81 75 52 24 51 88 10 20 47</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\ParTest\ParTest.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 16</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 77</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 57 11 48 83 29 46 18 44 36 58 14 26 7 80 27 85 86 61 20</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\PollQ.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 66</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 78</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 33 18 44 36 58 14 26 7 29 46 80 27 85 86 61 69 81 32 24</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 5</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 79</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 33 18 44 36 58 14 26 7 29 46 80 27 85 86 61 69 81 60 32 88</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\serial\serial.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 50</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 2</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 62 11 48 83 21 57 13 29 46 18 44 36 58 14 26 7 80 27 85 86 61 32 74</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Library\gpio.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 84</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 71</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 57 11 48 83</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Library\71x_lib.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 54</file>
|
||||
</tool>
|
||||
<tool>
|
||||
<name>BICOMP</name>
|
||||
<file> 3</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
<inputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 11 48 83</file>
|
||||
</tool>
|
||||
</inputs>
|
||||
</file>
|
||||
</configuration>
|
||||
<configuration>
|
||||
<name>Release</name>
|
||||
<outputs>
|
||||
<file>$PROJ_DIR$\Release\Obj\dynamic.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\list.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\wdg.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\ParTest.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\71x_lib.r79</file>
|
||||
<file>$PROJ_DIR$\..\Common\Minimal\comtest.c</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\cstartup.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\uart.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\vect.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\portasm.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\heap_2.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\tasks.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\BlockQ.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\integer.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\rccu.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\PollQ.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\flash.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\main.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\gpio.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\semtest.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Exe\RTOSDemo.d79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\serialISR.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\port.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\comtest.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\serial.r79</file>
|
||||
<file>$PROJ_DIR$\Release\Obj\queue.r79</file>
|
||||
<file>$PROJ_DIR$\cstartup.s79</file>
|
||||
<file>$PROJ_DIR$\vect.s79</file>
|
||||
<file>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</file>
|
||||
<file>$PROJ_DIR$\serial\serialISR.s79</file>
|
||||
<file>$PROJ_DIR$\Library\rccu.c</file>
|
||||
<file>$PROJ_DIR$\Library\uart.c</file>
|
||||
<file>$PROJ_DIR$\Library\wdg.c</file>
|
||||
<file>$PROJ_DIR$\..\..\Source\list.c</file>
|
||||
<file>$PROJ_DIR$\..\..\Source\portable\IAR\STR71x\port.c</file>
|
||||
<file>$PROJ_DIR$\..\..\Source\portable\IAR\STR71x\portasm.s79</file>
|
||||
<file>$PROJ_DIR$\..\..\Source\queue.c</file>
|
||||
<file>$PROJ_DIR$\..\..\Source\tasks.c</file>
|
||||
<file>$PROJ_DIR$\..\Common\Minimal\flash.c</file>
|
||||
<file>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</file>
|
||||
<file>$PROJ_DIR$\..\Common\Minimal\dynamic.c</file>
|
||||
<file>$PROJ_DIR$\..\Common\Minimal\integer.c</file>
|
||||
<file>$PROJ_DIR$\main.c</file>
|
||||
<file>$PROJ_DIR$\ParTest\ParTest.c</file>
|
||||
<file>$PROJ_DIR$\..\Common\Minimal\PollQ.c</file>
|
||||
<file>$PROJ_DIR$\..\Common\Minimal\semtest.c</file>
|
||||
<file>$PROJ_DIR$\serial\serial.c</file>
|
||||
<file>$PROJ_DIR$\Library\gpio.c</file>
|
||||
<file>$PROJ_DIR$\Library\71x_lib.c</file>
|
||||
</outputs>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\comtest.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 23</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>[ROOT_NODE]</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>XLINK</name>
|
||||
<file> 20</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\cstartup.s79</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>AARM</name>
|
||||
<file> 6</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\vect.s79</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>AARM</name>
|
||||
<file> 8</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\BlockQ.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 12</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\serial\serialISR.s79</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>AARM</name>
|
||||
<file> 21</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Library\rccu.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 14</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Library\uart.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 7</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Library\wdg.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 2</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\list.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 1</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\IAR\STR71x\port.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 22</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\IAR\STR71x\portasm.s79</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>AARM</name>
|
||||
<file> 9</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\queue.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 25</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\tasks.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 11</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\flash.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 16</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 10</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\dynamic.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 0</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\integer.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 13</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\main.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 17</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\ParTest\ParTest.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 3</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\PollQ.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 15</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\Common\Minimal\semtest.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 19</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\serial\serial.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 24</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Library\gpio.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 18</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\Library\71x_lib.c</name>
|
||||
<outputs>
|
||||
<tool>
|
||||
<name>ICCARM</name>
|
||||
<file> 4</file>
|
||||
</tool>
|
||||
</outputs>
|
||||
</file>
|
||||
<forcedrebuild>
|
||||
<name>[MULTI_TOOL]</name>
|
||||
<tool>XLINK</tool>
|
||||
</forcedrebuild>
|
||||
</configuration>
|
||||
</project>
|
||||
|
||||
|
||||
|
|
@ -1,212 +0,0 @@
|
|||
;-----------------------------------------------------------------------------
|
||||
; This file contains the startup code used by the ICCARM C compiler.
|
||||
;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; All code in the modules (except ?RESET) will be placed in the ICODE segment.
|
||||
;
|
||||
; $Revision: 1.1 $
|
||||
;
|
||||
;-----------------------------------------------------------------------------
|
||||
|
||||
;
|
||||
; Naming covention of labels in this file:
|
||||
;
|
||||
; ?xxx - External labels only accessed from assembler.
|
||||
; __xxx - External labels accessed from or defined in C.
|
||||
; xxx - Labels local to one module (note: this file contains
|
||||
; several modules).
|
||||
; main - The starting point of the user program.
|
||||
;
|
||||
|
||||
;---------------------------------------------------------------
|
||||
; Macros and definitions for the whole file
|
||||
;---------------------------------------------------------------
|
||||
|
||||
|
||||
; --- Standard definitions of mode bits and interrupt (I & F) flags in PSRs
|
||||
|
||||
|
||||
|
||||
Mode_USR DEFINE 0x10
|
||||
Mode_FIQ DEFINE 0x11
|
||||
Mode_IRQ DEFINE 0x12
|
||||
Mode_SVC DEFINE 0x13
|
||||
Mode_ABT DEFINE 0x17
|
||||
Mode_UNDEF DEFINE 0x1B
|
||||
Mode_SYS DEFINE 0x1F ; available on ARM Arch 4 and later
|
||||
|
||||
I_Bit DEFINE 0x80 ; when I bit is set, IRQ is disabled
|
||||
F_Bit DEFINE 0x40 ; when F bit is set, FIQ is disabled
|
||||
|
||||
|
||||
; --- System memory locations
|
||||
|
||||
RAM_Base DEFINE 0x20000000
|
||||
RAM_Limit DEFINE 0x20010000
|
||||
SRAM_Base DEFINE 0x60000000
|
||||
|
||||
SVC_Stack DEFINE RAM_Limit ; 512 byte SVC stack at
|
||||
; top of memory - used by kernel.
|
||||
IRQ_Stack DEFINE SVC_Stack-512 ; followed by IRQ stack
|
||||
USR_Stack DEFINE IRQ_Stack-512 ; followed by USR stack. Tasks run in
|
||||
; system mode but task stacks are allocated
|
||||
; when the task is created.
|
||||
FIQ_Stack DEFINE USR_Stack-8 ; followed by FIQ stack
|
||||
ABT_Stack DEFINE FIQ_Stack-8 ; followed by ABT stack
|
||||
UNDEF_Stack DEFINE ABT_Stack-8 ; followed by UNDEF stack
|
||||
|
||||
EIC_Base_addr DEFINE 0xFFFFF800 ; EIC base address
|
||||
ICR_off_addr DEFINE 0x00 ; Interrupt Control register offset
|
||||
CIPR_off_addr DEFINE 0x08 ; Current Interrupt Priority Register offset
|
||||
IVR_off_addr DEFINE 0x18 ; Interrupt Vector Register offset
|
||||
FIR_off_addr DEFINE 0x1C ; Fast Interrupt Register offset
|
||||
IER_off_addr DEFINE 0x20 ; Interrupt Enable Register offset
|
||||
IPR_off_addr DEFINE 0x40 ; Interrupt Pending Bit Register offset
|
||||
SIR0_off_addr DEFINE 0x60 ; Source Interrupt Register 0
|
||||
|
||||
EMI_Base_addr DEFINE 0x6C000000 ; EMI base address
|
||||
BCON0_off_addr DEFINE 0x00 ; Bank 0 configuration register offset
|
||||
BCON1_off_addr DEFINE 0x04 ; Bank 1 configuration register offset
|
||||
BCON2_off_addr DEFINE 0x08 ; Bank 2 configuration register offset
|
||||
BCON3_off_addr DEFINE 0x0C ; Bank 3 configuration register offset
|
||||
|
||||
GPIO2_Base_addr DEFINE 0xE0005000 ; GPIO2 base address
|
||||
PC0_off_addr DEFINE 0x00 ; Port Configuration Register 0 offset
|
||||
PC1_off_addr DEFINE 0x04 ; Port Configuration Register 1 offset
|
||||
PC2_off_addr DEFINE 0x08 ; Port Configuration Register 2 offset
|
||||
PD_off_addr DEFINE 0x0C ; Port Data Register offset
|
||||
|
||||
CPM_Base_addr DEFINE 0xA0000040 ; CPM Base Address
|
||||
BOOTCONF_off_addr DEFINE 0x10 ; CPM - Boot Configuration Register
|
||||
FLASH_mask DEFINE 0x0000 ; to remap FLASH at 0x0
|
||||
RAM_mask DEFINE 0x0002 ; to remap RAM at 0x0
|
||||
EXTMEM_mask DEFINE 0x0003 ; to remap EXTMEM at 0x0
|
||||
|
||||
;---------------------------------------------------------------
|
||||
; ?RESET
|
||||
; Reset Vector.
|
||||
; Normally, segment INTVEC is linked at address 0.
|
||||
; For debugging purposes, INTVEC may be placed at other
|
||||
; addresses.
|
||||
; A debugger that honors the entry point will start the
|
||||
; program in a normal way even if INTVEC is not at address 0.
|
||||
;---------------------------------------------------------------
|
||||
|
||||
MODULE ?RESET
|
||||
COMMON INTVEC:CODE:NOROOT(2)
|
||||
PUBLIC __program_start
|
||||
EXTERN ?cstartup
|
||||
CODE32 ; Always ARM mode after reset
|
||||
|
||||
__program_start
|
||||
ldr pc,=?cstartup ; Absolute jump can reach 4 GByte
|
||||
b ?cstartup ; Relative branch allows remap, limited to 32 MByte
|
||||
|
||||
LTORG
|
||||
ENDMOD
|
||||
|
||||
|
||||
;---------------------------------------------------------------
|
||||
; ?CSTARTUP
|
||||
;---------------------------------------------------------------
|
||||
MODULE ?CSTARTUP
|
||||
|
||||
; RSEG IRQ_STACK:DATA(2)
|
||||
; RSEG SVC_STACK:DATA:NOROOT(2)
|
||||
; RSEG CSTACK:DATA(2)
|
||||
RSEG ICODE:CODE:NOROOT(2)
|
||||
PUBLIC ?cstartup
|
||||
EXTERN ?main
|
||||
|
||||
|
||||
|
||||
|
||||
CODE32
|
||||
?cstartup
|
||||
|
||||
|
||||
NOP ; Wait for OSC stabilization
|
||||
NOP
|
||||
NOP
|
||||
NOP
|
||||
NOP
|
||||
NOP
|
||||
NOP
|
||||
NOP
|
||||
NOP
|
||||
|
||||
|
||||
/* Setup a stack for each mode - note that this only sets up a usable stack
|
||||
for system/user, SWI and IRQ modes. Also each mode is setup with
|
||||
interrupts initially disabled. */
|
||||
msr CPSR_c, #Mode_UNDEF|I_Bit|F_Bit /* Undefined Instruction Mode */
|
||||
LDR SP, =UNDEF_Stack
|
||||
|
||||
msr CPSR_c, #Mode_ABT|I_Bit|F_Bit /* Abort Mode */
|
||||
LDR SP, =ABT_Stack
|
||||
|
||||
msr CPSR_c, #Mode_FIQ|I_Bit|F_Bit /* FIQ Mode */
|
||||
LDR SP, =FIQ_Stack
|
||||
|
||||
msr CPSR_c, #Mode_IRQ|I_Bit|F_Bit /* IRQ Mode */
|
||||
LDR SP, =IRQ_Stack
|
||||
|
||||
msr CPSR_c, #Mode_SVC|I_Bit|F_Bit /* Supervisor Mode */
|
||||
LDR SP, =SVC_Stack
|
||||
|
||||
msr CPSR_c, #Mode_SYS|I_Bit|F_Bit /* System Mode */
|
||||
LDR SP, =USR_Stack
|
||||
|
||||
/* We want to start in supervisor mode. Operation will switch to system
|
||||
mode when the first task starts. */
|
||||
msr CPSR_c, #Mode_SVC|I_Bit|F_Bit
|
||||
|
||||
|
||||
IMPORT T0TIMI_Addr
|
||||
|
||||
EIC_INIT
|
||||
LDR r3, =EIC_Base_addr
|
||||
LDR r4, =0x00000000
|
||||
STR r4, [r3, #ICR_off_addr] ; Disable FIQ and IRQ
|
||||
STR r4, [r3, #IER_off_addr] ; Disable all channels interrupts
|
||||
LDR r4, =0xFFFFFFFF
|
||||
STR r4, [r3, #IPR_off_addr] ; Clear all IRQ pending bits
|
||||
LDR r4, =0x0C
|
||||
STR r4, [r3, #FIR_off_addr] ; Disable FIQ channels and clear FIQ pending bits
|
||||
LDR r4, =0x00000000
|
||||
STR r4, [r3, #CIPR_off_addr] ; Reset the current priority register
|
||||
LDR r4, =0xE59F0000
|
||||
STR r4, [r3, #IVR_off_addr] ; Write the LDR pc,pc,#offset instruction code in IVR[31:16]
|
||||
LDR r2, =32 ; 32 Channel to initialize
|
||||
LDR r0, =T0TIMI_Addr ; Read the address of the IRQs address table
|
||||
LDR r1, =0x00000FFF
|
||||
AND r0,r0,r1
|
||||
LDR r5, =SIR0_off_addr ; Read SIR0 address
|
||||
SUB r4,r0,#8 ; subtract 8 for prefetch
|
||||
LDR r1, =0xF7E8 ; add the offset to the 0x00000000 address(IVR address + 7E8 = 0x00000000)
|
||||
; 0xF7E8 used to complete the LDR pc,pc,#offset opcode
|
||||
ADD r1,r4,r1 ; compute the jump offset
|
||||
EIC_INI MOV r4, r1, LSL #16 ; Left shift the result
|
||||
STR r4, [r3, r5] ; Store the result in SIRx register
|
||||
ADD r1, r1, #4 ; Next IRQ address
|
||||
ADD r5, r5, #4 ; Next SIR
|
||||
SUBS r2, r2, #1 ; Decrement the number of SIR registers to initialize
|
||||
BNE EIC_INI ; If more then continue
|
||||
|
||||
|
||||
ldr r0,=?main
|
||||
bx r0
|
||||
|
||||
LTORG
|
||||
|
||||
ENDMOD
|
||||
|
||||
|
||||
END
|
||||
|
||||
|
||||
|
|
@ -1,201 +0,0 @@
|
|||
//*************************************************************************
|
||||
// XLINK command file template for EWARM/ICCARM
|
||||
//
|
||||
// Usage: xlink -f lnkarm <your_object_file(s)>
|
||||
// -s <program start label> <C/C++ runtime library>
|
||||
//
|
||||
// $Revision: 1.1 $
|
||||
//*************************************************************************
|
||||
|
||||
// Code memory in flash
|
||||
-DROMSTART=0x00000000
|
||||
-DROMEND=0x0003FFFF
|
||||
-DVECSTART=ROMSTART
|
||||
|
||||
// Data memory
|
||||
-DRAMSTART=0x20000000
|
||||
-DRAMEND=0x2000FFFF
|
||||
|
||||
|
||||
//*************************************************************************
|
||||
// In this file it is assumed that the system has the following
|
||||
// memory layout:
|
||||
//
|
||||
// Exception vectors [0x000000--0x00001F] RAM or ROM
|
||||
// ROMSTART--ROMEND [0x008000--0x0FFFFF] ROM (or other non-volatile memory)
|
||||
// RAMSTART--RAMEND [0x100000--0x7FFFFF] RAM (or other read/write memory)
|
||||
//
|
||||
// -------------
|
||||
// Code segments - may be placed anywhere in memory.
|
||||
// -------------
|
||||
//
|
||||
// INTVEC -- Exception vector table.
|
||||
// SWITAB -- Software interrupt vector table.
|
||||
// ICODE -- Startup (cstartup) and exception code.
|
||||
// DIFUNCT -- Dynamic initialization vectors used by C++.
|
||||
// CODE -- Compiler generated code.
|
||||
// CODE_I -- Compiler generated code declared __ramfunc (executes in RAM)
|
||||
// CODE_ID -- Initializer for CODE_I (ROM).
|
||||
//
|
||||
// -------------
|
||||
// Data segments - may be placed anywhere in memory.
|
||||
// -------------
|
||||
//
|
||||
// CSTACK -- The stack used by C/C++ programs (system and user mode).
|
||||
// IRQ_STACK -- The stack used by IRQ service routines.
|
||||
// SVC_STACK -- The stack used in supervisor mode
|
||||
// (Define other exception stacks as needed for
|
||||
// FIQ, ABT, UND).
|
||||
// HEAP -- The heap used by malloc and free in C and new and
|
||||
// delete in C++.
|
||||
// INITTAB -- Table containing addresses and sizes of segments that
|
||||
// need to be initialized at startup (by cstartup).
|
||||
// CHECKSUM -- The linker places checksum byte(s) in this segment,
|
||||
// when the -J linker command line option is used.
|
||||
// DATA_y -- Data objects.
|
||||
//
|
||||
// Where _y can be one of:
|
||||
//
|
||||
// _AN -- Holds uninitialized located objects, i.e. objects with
|
||||
// an absolute location given by the @ operator or the
|
||||
// #pragma location directive. Since these segments
|
||||
// contain objects which already have a fixed address,
|
||||
// they should not be mentioned in this linker command
|
||||
// file.
|
||||
// _C -- Constants (ROM).
|
||||
// _I -- Initialized data (RAM).
|
||||
// _ID -- The original content of _I (copied to _I by cstartup) (ROM).
|
||||
// _N -- Uninitialized data (RAM).
|
||||
// _Z -- Zero initialized data (RAM).
|
||||
//
|
||||
// Note: Be sure to use end values for the defined address ranges.
|
||||
// Otherwise, the linker may allocate space outside the
|
||||
// intended memory range.
|
||||
//*************************************************************************
|
||||
|
||||
|
||||
//************************************************
|
||||
// Inform the linker about the CPU family used.
|
||||
//************************************************
|
||||
|
||||
-carm
|
||||
|
||||
//*************************************************************************
|
||||
// Segment placement - General information
|
||||
//
|
||||
// All numbers in the segment placement command lines below are interpreted
|
||||
// as hexadecimal unless they are immediately preceded by a '.', which
|
||||
// denotes decimal notation.
|
||||
//
|
||||
// When specifying the segment placement using the -P instead of the -Z
|
||||
// option, the linker is free to split each segment into its segment parts
|
||||
// and randomly place these parts within the given ranges in order to
|
||||
// achieve a more efficient memory usage. One disadvantage, however, is
|
||||
// that it is not possible to find the start or end address (using
|
||||
// the assembler operators .sfb./.sfe.) of a segment which has been split
|
||||
// and reformed.
|
||||
//
|
||||
// When generating an output file which is to be used for programming
|
||||
// external ROM/Flash devices, the -M linker option is very useful
|
||||
// (see xlink.pdf for details).
|
||||
//*************************************************************************
|
||||
|
||||
|
||||
//*************************************************************************
|
||||
// Read-only segments mapped to ROM.
|
||||
//*************************************************************************
|
||||
|
||||
//************************************************
|
||||
// Address range for reset and exception
|
||||
// vectors (INTVEC).
|
||||
// The vector area is 32 bytes,
|
||||
// an additional 32 bytes is allocated for the
|
||||
// constant table used by ldr PC in cstartup.s79.
|
||||
//************************************************
|
||||
|
||||
-Z(CODE)INTVEC=VECSTART:+0x940
|
||||
|
||||
//************************************************
|
||||
// Startup code and exception routines (ICODE).
|
||||
//************************************************
|
||||
|
||||
-Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
|
||||
-Z(CODE)SWITAB=ROMSTART-ROMEND
|
||||
|
||||
//************************************************
|
||||
// Code segments may be placed anywhere.
|
||||
//************************************************
|
||||
|
||||
-Z(CODE)CODE=ROMSTART-ROMEND
|
||||
|
||||
//************************************************
|
||||
// Original ROM location for __ramfunc code copied
|
||||
// to and executed from RAM.
|
||||
//************************************************
|
||||
|
||||
-Z(CONST)CODE_ID=ROMSTART-ROMEND
|
||||
|
||||
//************************************************
|
||||
// Various constants and initializers.
|
||||
//************************************************
|
||||
|
||||
-Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
|
||||
-Z(CONST)CHECKSUM=ROMSTART-ROMEND
|
||||
|
||||
|
||||
//*************************************************************************
|
||||
// Read/write segments mapped to RAM.
|
||||
//*************************************************************************
|
||||
|
||||
//************************************************
|
||||
// Data segments.
|
||||
//************************************************
|
||||
|
||||
-Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
|
||||
|
||||
//************************************************
|
||||
// __ramfunc code copied to and executed from RAM.
|
||||
//************************************************
|
||||
|
||||
-Z(DATA)CODE_I=RAMSTART-RAMEND
|
||||
|
||||
//************************************************
|
||||
// ICCARM produces code for __ramfunc functions in
|
||||
// CODE_I segments. The -Q XLINK command line
|
||||
// option redirects XLINK to emit the code in the
|
||||
// CODE_ID segment instead, but to keep symbol and
|
||||
// debug information associated with the CODE_I
|
||||
// segment, where the code will execute.
|
||||
//************************************************
|
||||
|
||||
-QCODE_I=CODE_ID
|
||||
|
||||
//*************************************************************************
|
||||
// Stack and heap segments.
|
||||
//*************************************************************************
|
||||
|
||||
//-D_CSTACK_SIZE=400
|
||||
// -D_SVC_STACK_SIZE=10
|
||||
//-D_IRQ_STACK_SIZE=500
|
||||
//-D_HEAP_SIZE=4
|
||||
|
||||
//-Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
|
||||
//-Z(DATA)SVC_STACK+_SVC_STACK_SIZE=RAMSTART-RAMEND
|
||||
//-Z(DATA)IRQ_STACK+_IRQ_STACK_SIZE,HEAP+_HEAP_SIZE=RAMSTART-RAMEND
|
||||
|
||||
//*************************************************************************
|
||||
// ELF/DWARF support.
|
||||
//
|
||||
// Uncomment the line "-Felf" below to generate ELF/DWARF output.
|
||||
// Available format specifiers are:
|
||||
//
|
||||
// "-yn": Suppress DWARF debug output
|
||||
// "-yp": Multiple ELF program sections
|
||||
// "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
|
||||
//
|
||||
// "-Felf" and the format specifiers can also be supplied directly as
|
||||
// command line options, or selected from the Xlink Output tab in the
|
||||
// IAR Embedded Workbench.
|
||||
//*************************************************************************
|
||||
|
||||
// -Felf
|
||||
|
|
@ -1,127 +0,0 @@
|
|||
#include "FreeRTOSConfig.h"
|
||||
|
||||
IVR_ADDR DEFINE 0xFFFFF818
|
||||
|
||||
;*******************************************************************************
|
||||
; Import the Reset_Handler address from 71x_init.s
|
||||
;*******************************************************************************
|
||||
|
||||
IMPORT __program_start
|
||||
|
||||
;*******************************************************************************
|
||||
; Import exception handlers
|
||||
;*******************************************************************************
|
||||
|
||||
IMPORT vPortYieldProcessor ; FreeRTOS SWI handler
|
||||
|
||||
;*******************************************************************************
|
||||
; Import IRQ handlers from 71x_it.c
|
||||
;*******************************************************************************
|
||||
|
||||
IMPORT vPortNonPreemptiveTick ; Cooperative FreeRTOS tick handler
|
||||
IMPORT vPortPreemptiveTickISR ; Preemptive FreeRTOS tick handler
|
||||
IMPORT vSerialISREntry ; Demo serial port handler
|
||||
|
||||
;*******************************************************************************
|
||||
; Export Peripherals IRQ handlers table address
|
||||
;*******************************************************************************
|
||||
|
||||
CODE32
|
||||
|
||||
|
||||
LDR PC, Reset_Addr
|
||||
LDR PC, Undefined_Addr
|
||||
LDR PC, SWI_Addr
|
||||
LDR PC, Prefetch_Addr
|
||||
LDR PC, Abort_Addr
|
||||
NOP ; Reserved vector
|
||||
LDR PC, =IVR_ADDR
|
||||
LDR PC, FIQ_Addr
|
||||
|
||||
|
||||
|
||||
;*******************************************************************************
|
||||
; Exception handlers address table
|
||||
;*******************************************************************************
|
||||
|
||||
Reset_Addr DCD __program_start
|
||||
Undefined_Addr DCD UndefinedHandler
|
||||
SWI_Addr DCD vPortYieldProcessor
|
||||
Prefetch_Addr DCD PrefetchAbortHandler
|
||||
Abort_Addr DCD DataAbortHandler
|
||||
DCD 0 ; Reserved vector
|
||||
IRQ_Addr DCD IRQHandler
|
||||
FIQ_Addr DCD FIQHandler
|
||||
|
||||
;*******************************************************************************
|
||||
; Peripherals IRQ handlers address table
|
||||
;*******************************************************************************
|
||||
|
||||
EXPORT T0TIMI_Addr
|
||||
|
||||
T0TIMI_Addr DCD DefaultISR
|
||||
FLASH_Addr DCD DefaultISR
|
||||
RCCU_Addr DCD DefaultISR
|
||||
RTC_Addr DCD DefaultISR
|
||||
#if configUSE_PREEMPTION == 0
|
||||
WDG_Addr DCD vPortNonPreemptiveTick ; Tick ISR if the cooperative scheduler is used.
|
||||
#else
|
||||
WDG_Addr DCD vPortPreemptiveTickISR ; Tick ISR if the preemptive scheduler is used.
|
||||
#endif
|
||||
XTI_Addr DCD DefaultISR
|
||||
USBHP_Addr DCD DefaultISR
|
||||
I2C0ITERR_Addr DCD DefaultISR
|
||||
I2C1ITERR_ADDR DCD DefaultISR
|
||||
UART0_Addr DCD vSerialISREntry
|
||||
UART1_Addr DCD DefaultISR
|
||||
UART2_ADDR DCD DefaultISR
|
||||
UART3_ADDR DCD DefaultISR
|
||||
BSPI0_ADDR DCD DefaultISR
|
||||
BSPI1_Addr DCD DefaultISR
|
||||
I2C0_Addr DCD DefaultISR
|
||||
I2C1_Addr DCD DefaultISR
|
||||
CAN_Addr DCD DefaultISR
|
||||
ADC12_Addr DCD DefaultISR
|
||||
T1TIMI_Addr DCD DefaultISR
|
||||
T2TIMI_Addr DCD DefaultISR
|
||||
T3TIMI_Addr DCD DefaultISR
|
||||
DCD 0 ; reserved
|
||||
DCD 0 ; reserved
|
||||
DCD 0 ; reserved
|
||||
HDLC_Addr DCD DefaultISR
|
||||
USBLP_Addr DCD DefaultISR
|
||||
DCD 0 ; reserved
|
||||
DCD 0 ; reserved
|
||||
T0TOI_Addr DCD DefaultISR
|
||||
T0OC1_Addr DCD DefaultISR
|
||||
T0OC2_Addr DCD DefaultISR
|
||||
|
||||
|
||||
;*******************************************************************************
|
||||
; Exception Handlers
|
||||
;*******************************************************************************
|
||||
|
||||
|
||||
UndefinedHandler
|
||||
b UndefinedHandler
|
||||
|
||||
PrefetchAbortHandler
|
||||
b PrefetchAbortHandler
|
||||
|
||||
DataAbortHandler
|
||||
b DataAbortHandler
|
||||
|
||||
IRQHandler
|
||||
b DefaultISR
|
||||
|
||||
FIQHandler
|
||||
b FIQHandler
|
||||
|
||||
DefaultISR
|
||||
b DefaultISR
|
||||
|
||||
|
||||
|
||||
LTORG
|
||||
|
||||
END
|
||||
Loading…
Add table
Add a link
Reference in a new issue