mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-19 21:11:57 -04:00
Update RX GCC port - including extracting all inline asm into separate asm file.
This commit is contained in:
Richard Barry
parent
23b1023a7a
commit
c4217432f2
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@ -78,7 +78,7 @@ PSW is set with U and I set, and PM and IPL clear. */
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* Function to start the first task executing - written in asm code as direct
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* access to registers is required.
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*/
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static void prvStartFirstTask( void ) __attribute__((naked));
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extern void prvStartFirstTask( void );
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/*
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* Software interrupt handler. Performs the actual context switch (saving and
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@ -88,19 +88,14 @@ static void prvStartFirstTask( void ) __attribute__((naked));
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static void prvYieldHandler( void );
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/*
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* The entry point for the software interrupt handler. This is the function
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* that calls the inline asm function prvYieldHandler(). It is installed in
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* the vector table, but the code that installs it is in prvYieldHandler rather
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* than using a #pragma.
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* The tick ISR handler. The peripheral used is configured by the application
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* via a hook/callback function.
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*/
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void vSoftwareInterruptISR( void );
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void vTickISR( void ) __attribute__((interrupt));
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/*-----------------------------------------------------------*/
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/* This is accessed by the inline assembler functions so is file scope for
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convenience. */
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extern void *pxCurrentTCB;
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extern void vTaskSwitchContext( void );
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/*-----------------------------------------------------------*/
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@ -190,65 +185,24 @@ extern void vApplicationSetupTimerInterrupt( void );
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/* Ensure the software interrupt is set to the kernel priority. */
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_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
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/* Start the first task. */
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prvStartFirstTask();
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}
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/* Just to make sure the function is not optimised away. */
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( void ) vSoftwareInterruptISR();
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/* Should not get here. */
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return pdFAIL;
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}
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/*-----------------------------------------------------------*/
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static void prvStartFirstTask( void )
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{
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__asm
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(
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/* When starting the scheduler there is nothing that needs moving to the
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interrupt stack because the function is not called from an interrupt.
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Just ensure the current stack is the user stack. */
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"SETPSW U \n" \
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/* Obtain the location of the stack associated with which ever task
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pxCurrentTCB is currently pointing to. */
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"MOV.L #_pxCurrentTCB, R15 \n" \
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"MOV.L [R15], R15 \n" \
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"MOV.L [R15], R0 \n" \
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/* Restore the registers from the stack of the task pointed to by
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pxCurrentTCB. */
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"POP R15 \n" \
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/* Accumulator low 32 bits. */
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"MVTACLO R15 \n" \
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"POP R15 \n" \
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/* Accumulator high 32 bits. */
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"MVTACHI R15 \n" \
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"POP R15 \n" \
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/* Floating point status word. */
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"MVTC R15, FPSW \n" \
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/* R1 to R15 - R0 is not included as it is the SP. */
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"POPM R1-R15 \n" \
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/* This pops the remaining registers. */
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"RTE \n" \
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"NOP \n" \
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"NOP \n"
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);
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}
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/*-----------------------------------------------------------*/
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void vTickISR( void )
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{
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/* Re-enable interrupts. */
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__asm volatile( "SETPSW I" );
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/* Increment the tick, and perform any processing the new tick value
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necessitates. */
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vTaskIncrementTick();
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vTaskIncrementTick();
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/* Only select a new task if the preemptive scheduler is being used. */
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#if( configUSE_PREEMPTION == 1 )
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@ -257,124 +211,9 @@ void vTickISR( void )
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}
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/*-----------------------------------------------------------*/
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void vSoftwareInterruptISR( void )
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{
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// prvYieldHandler();
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}
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/*-----------------------------------------------------------*/
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#if 0
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#pragma inline_asm prvYieldHandler
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static void prvYieldHandler( void )
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{
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/* Install as the software interrupt handler. */
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.RVECTOR _VECT( _ICU_SWINT ), _vSoftwareInterruptISR
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/* Re-enable interrupts. */
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SETPSW I
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/* Move the data that was automatically pushed onto the interrupt stack when
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the interrupt occurred from the interrupt stack to the user stack.
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R15 is saved before it is clobbered. */
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PUSH.L R15
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/* Read the user stack pointer. */
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MVFC USP, R15
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/* Move the address down to the data being moved. */
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SUB #12, R15
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MVTC R15, USP
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/* Copy the data across. */
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MOV.L [ R0 ], [ R15 ] ; R15
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MOV.L 4[ R0 ], 4[ R15 ] ; PC
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MOV.L 8[ R0 ], 8[ R15 ] ; PSW
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/* Move the interrupt stack pointer to its new correct position. */
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ADD #12, R0
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/* All the rest of the registers are saved directly to the user stack. */
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SETPSW U
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/* Save the rest of the general registers (R15 has been saved already). */
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PUSHM R1-R14
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/* Save the FPSW and accumulator. */
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MVFC FPSW, R15
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PUSH.L R15
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MVFACHI R15
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PUSH.L R15
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MVFACMI R15 ; Middle order word.
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SHLL #16, R15 ; Shifted left as it is restored to the low order word.
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PUSH.L R15
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/* Save the stack pointer to the TCB. */
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MOV.L #_pxCurrentTCB, R15
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MOV.L [ R15 ], R15
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MOV.L R0, [ R15 ]
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/* Ensure the interrupt mask is set to the syscall priority while the kernel
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structures are being accessed. */
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MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
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/* Select the next task to run. */
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BSR.A _vTaskSwitchContext
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/* Reset the interrupt mask as no more data structure access is required. */
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MVTIPL #configKERNEL_INTERRUPT_PRIORITY
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/* Load the stack pointer of the task that is now selected as the Running
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state task from its TCB. */
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MOV.L #_pxCurrentTCB,R15
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MOV.L [ R15 ], R15
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MOV.L [ R15 ], R0
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/* Restore the context of the new task. The PSW (Program Status Word) and
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PC will be popped by the RTE instruction. */
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POP R15
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MVTACLO R15
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POP R15
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MVTACHI R15
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POP R15
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MVTC R15,FPSW
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POPM R1-R15
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RTE
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NOP
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NOP
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}
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#endif
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented as there is nothing to return to. */
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/* The following line is just to prevent the symbol getting optimised away. */
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( void ) vTaskSwitchContext();
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}
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/*-----------------------------------------------------------*/
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unsigned long ulPortGetIPL( void )
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{
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__asm(
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"MVFC PSW, R1 \n" \
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"SHLR #28, R1 \n" \
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"RTS "
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);
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}
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/*-----------------------------------------------------------*/
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void vPortSetIPL( unsigned long ulNewIPL )
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{
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__asm(
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"MVFC PSW, R5 \n" \
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"SHLL #28, R1 \n" \
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"AND #-0F000001H, R5 \n" \
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"OR R1, R5 \n" \
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"MVTC R5, PSW \n" \
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"RTS "
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);
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}
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/*-----------------------------------------------------------*/
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206
Source/portable/GCC/RX600/port_asm.asm
Normal file
206
Source/portable/GCC/RX600/port_asm.asm
Normal file
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@ -0,0 +1,206 @@
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/*
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FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
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***************************************************************************
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* *
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* If you are: *
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* *
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* + New to FreeRTOS, *
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* + Wanting to learn FreeRTOS or multitasking in general quickly *
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* + Looking for basic training, *
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* + Wanting to improve your FreeRTOS skills and productivity *
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* *
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* then take a look at the FreeRTOS eBook *
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* *
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* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
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* http://www.FreeRTOS.org/Documentation *
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* *
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* A pdf reference manual is also available. Both are usually delivered *
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* to your inbox within 20 minutes to two hours when purchased between 8am *
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* and 8pm GMT (although please allow up to 24 hours in case of *
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* exceptional circumstances). Thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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***NOTE*** The exception to the GPL is included to allow you to distribute
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a combined work that includes FreeRTOS without being obliged to provide the
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source code for proprietary components outside of the FreeRTOS kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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1 tab == 4 spaces!
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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.list
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.section .text
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.global _prvStartFirstTask
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.global _vSoftwareInterruptISR
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.global _ulPortGetIPL
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.global _vPortSetIPL
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.extern _pxCurrentTCB
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.align 4
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_prvStartFirstTask:
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/* When starting the scheduler there is nothing that needs moving to the
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interrupt stack because the function is not called from an interrupt.
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Just ensure the current stack is the user stack. */
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SETPSW U
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/* Obtain the location of the stack associated with which ever task
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pxCurrentTCB is currently pointing to. */
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MOV.L #_pxCurrentTCB, R15
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MOV.L [R15], R15
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MOV.L [R15], R0
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/* Restore the registers from the stack of the task pointed to by
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pxCurrentTCB. */
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POP R15
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/* Accumulator low 32 bits. */
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MVTACLO R15
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POP R15
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/* Accumulator high 32 bits. */
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MVTACHI R15
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POP R15
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/* Floating point status word. */
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MVTC R15, FPSW
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/* R1 to R15 - R0 is not included as it is the SP. */
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POPM R1-R15
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/* This pops the remaining registers. */
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RTE
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NOP
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NOP
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/*-----------------------------------------------------------*/
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.align 4
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_vSoftwareInterruptISR:
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/* Re-enable interrupts. */
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SETPSW I
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/* Move the data that was automatically pushed onto the interrupt stack when
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the interrupt occurred from the interrupt stack to the user stack.
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R15 is saved before it is clobbered. */
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PUSH.L R15
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/* Read the user stack pointer. */
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MVFC USP, R15
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/* Move the address down to the data being moved. */
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SUB #12, R15
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MVTC R15, USP
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/* Copy the data across, R15, then PC, then PSW. */
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MOV.L [ R0 ], [ R15 ]
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MOV.L 4[ R0 ], 4[ R15 ]
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MOV.L 8[ R0 ], 8[ R15 ]
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/* Move the interrupt stack pointer to its new correct position. */
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ADD #12, R0
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/* All the rest of the registers are saved directly to the user stack. */
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SETPSW U
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/* Save the rest of the general registers (R15 has been saved already). */
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PUSHM R1-R14
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/* Save the FPSW and accumulator. */
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MVFC FPSW, R15
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PUSH.L R15
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MVFACHI R15
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PUSH.L R15
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/* Middle word. */
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MVFACMI R15
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/* Shifted left as it is restored to the low order word. */
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SHLL #16, R15
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PUSH.L R15
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/* Save the stack pointer to the TCB. */
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MOV.L #_pxCurrentTCB, R15
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MOV.L [ R15 ], R15
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MOV.L R0, [ R15 ]
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/* Ensure the interrupt mask is set to the syscall priority while the kernel
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structures are being accessed. */
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MVTIPL #4
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/* Select the next task to run. */
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BSR.A _vTaskSwitchContext
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/* Reset the interrupt mask as no more data structure access is required. */
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MVTIPL #1
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/* Load the stack pointer of the task that is now selected as the Running
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state task from its TCB. */
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MOV.L #_pxCurrentTCB,R15
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MOV.L [ R15 ], R15
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MOV.L [ R15 ], R0
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/* Restore the context of the new task. The PSW (Program Status Word) and
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PC will be popped by the RTE instruction. */
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POP R15
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MVTACLO R15
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POP R15
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MVTACHI R15
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POP R15
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MVTC R15, FPSW
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POPM R1-R15
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RTE
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NOP
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NOP
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/*:: i(configMAX_SYSCALL_INTERRUPT_PRIORITY), i(configKERNEL_INTERRUPT_PRIORITY)*/
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/*-----------------------------------------------------------*/
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.align 4
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_ulPortGetIPL:
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MVFC PSW, R1
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SHLR #24, R1
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RTS
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/*-----------------------------------------------------------*/
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.align 4
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_vPortSetIPL:
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MVFC PSW, R5
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SHLL #24, R1
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AND #-0F000001H, R5
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OR R1, R5
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MVTC R5, PSW
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RTS
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.end
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@ -92,7 +92,7 @@ portSTACK_TYPE and portBASE_TYPE. */
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#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
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#define portSTACK_GROWTH -1
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portNOP() __asm( "NOP" )
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#define portNOP() __asm volatile( "NOP" )
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/* The location of the software interrupt register. Software interrupts use
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vector 27. */
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@ -104,8 +104,8 @@ vector 27. */
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* These macros should be called directly, but through the taskENTER_CRITICAL()
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* and taskEXIT_CRITICAL() macros.
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*/
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#define portENABLE_INTERRUPTS() __asm ( "MVTIPL #0" );
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#define portDISABLE_INTERRUPTS() __asm ( "MVTIPL %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
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#define portENABLE_INTERRUPTS() __asm volatile ( "MVTIPL #0" );
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#define portDISABLE_INTERRUPTS() __asm volatile ( "MVTIPL %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
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/* Critical nesting counts are stored in the TCB. */
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#define portCRITICAL_NESTING_IN_TCB ( 1 )
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@ -117,8 +117,8 @@ extern void vTaskExitCritical( void );
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#define portEXIT_CRITICAL() vTaskExitCritical();
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/* As this port allows interrupt nesting... */
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unsigned long ulPortGetIPL( void ) __attribute__((naked));
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void vPortSetIPL( unsigned long ulNewIPL ) __attribute__((naked));
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unsigned long ulPortGetIPL( void );
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void vPortSetIPL( unsigned long ulNewIPL );
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortGetIPL(); portDISABLE_INTERRUPTS()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) vPortSetIPL( uxSavedInterruptStatus )
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