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Improvements to the Cortex-M ports:

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- Clear the SysTick current value register before starting the SysTick (only required if something uses SysTick before starting the scheduler).
- Ensure atomic operations are thread safe by executing clrex in the context switch.
This commit is contained in:
Richard Barry 2016-06-27 13:13:05 +00:00
parent 6c975cd46a
commit c296e2cff8
23 changed files with 139 additions and 40 deletions
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6
FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1/port.c
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@ -437,8 +437,8 @@ void xPortPendSVHandler( void )
" vstmdbeq r0!, {s16-s31} \n"
" \n"
" stmdb r0!, {r4-r11, r14} \n" /* Save the core registers. */
" \n"
" str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
" clrex \n" /* Ensure thread safety of atomic operations. */
" \n"
" stmdb sp!, {r3} \n"
" mov r0, %0 \n"
@ -669,6 +669,10 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
}
#endif /* configUSE_TICKLESS_IDLE */
/* Stop and clear the SysTick. */
portNVIC_SYSTICK_CTRL_REG = 0UL;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );