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Comment ready for release.
This commit is contained in:
Richard Barry
parent
f39424feee
commit
bf5cd55c55
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@ -1,5 +1,5 @@
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/*
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FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.
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FreeRTOS.org V4.7.2 - Copyright (C) 2003-2008 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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@ -54,28 +54,47 @@
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#include "xintc.h"
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#include "xintc_i.h"
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/* Standard includes. */
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#include <string.h>
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/*-----------------------------------------------------------*/
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/* Definitions to set the initial MSR of each task. */
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#define portCRITICAL_INTERRUPT_ENABLE ( 1UL << 17UL )
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#define portEXTERNAL_INTERRUPT_ENABLE ( 1UL << 15UL )
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#define portMACHINE_CHECK_ENABLE ( 1UL << 12UL )
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#define portINITIAL_MSR ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE )
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/*-----------------------------------------------------------*/
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#define portCRITICAL_INTERRUPT_ENABLE ( 0UL << 17UL )
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#define portEXTERNAL_INTERRUPT_ENABLE ( 1UL << 15UL )
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#define portMACHINE_CHECK_ENABLE ( 0UL << 12UL )
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#define portINITIAL_MSR ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE )
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/*
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* Setup the system timer to generate the tick interrupt.
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*/
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static void prvSetupTimerInterrupt( void );
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extern void vPortTickISR( void );
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extern void vPortYield( void );
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extern void vPortStartFirstTask( void );
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static XIntc xInterruptController;
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/*
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* Initialise the stack of a task to look exactly as if a call to
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* portSAVE_CONTEXT had been made.
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* The handler for the tick interrupt - defined in portasm.s.
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*/
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extern void vPortTickISR( void );
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/*
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* The handler for the yield function - defined in portasm.s.
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*/
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extern void vPortYield( void );
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/*
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* Function to start the scheduler running by starting the highest
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* priority task that has thus far been created.
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*/
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extern void vPortStartFirstTask( void );
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/*-----------------------------------------------------------*/
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/* Structure used to hold the state of the interrupt controller. */
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static XIntc xInterruptController;
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/*-----------------------------------------------------------*/
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/*
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* Initialise the stack of a task to look exactly as if the task had been
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* interrupted.
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*
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* See the header file portable.h.
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*/
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@ -165,7 +184,6 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
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*pxTopOfStack = ( portSTACK_TYPE ) vPortStartFirstTask;/* Next LR. */
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pxTopOfStack--;
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*pxTopOfStack = 0x00000000UL;;/* Backchain. */
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// pxTopOfStack--;
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return pxTopOfStack;
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}
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@ -173,14 +191,8 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
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portBASE_TYPE xPortStartScheduler( void )
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{
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extern void *pxCurrentTCB;
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prvSetupTimerInterrupt();
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XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );
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// XExc_mEnableExceptions( XEXC_NON_CRITICAL );
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vPortStartFirstTask();
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/* Should not get here as the tasks are now running! */
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@ -197,7 +209,6 @@ void vPortEndScheduler( void )
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/*
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* Hardware initialisation to generate the RTOS tick.
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*/
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static void prvTickISR( void );
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static void prvSetupTimerInterrupt( void )
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{
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const unsigned portLONG ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
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@ -216,65 +227,39 @@ const unsigned portLONG ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ
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}
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/*-----------------------------------------------------------*/
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static void prvTickISR( void )
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{
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static unsigned portLONG ulTicks = 0;
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ulTicks++;
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if( ulTicks >= 1000 )
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{
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vParTestToggleLED( 0 );
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ulTicks = 0;
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}
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XTime_PITClearInterrupt();
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}
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/*-----------------------------------------------------------*/
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void vPortISRHandler( void *vNullDoNotUse )
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{
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Xuint32 IntrStatus;
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Xuint32 IntrMask = 1;
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int IntrNumber;
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//extern XIntc xInterruptController;
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XIntc_Config *CfgPtr;// = xInterruptController.CfgPtr;
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unsigned portLONG ulInterruptStatus, ulInterruptMask = 1UL;
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portBASE_TYPE xInterruptNumber;
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XIntc_Config *pxInterruptController;
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XIntc_VectorTableEntry *pxTable;
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/* Get the configuration data using the device ID */
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//CfgPtr = &XIntc_ConfigTable[(Xuint32)DeviceId];
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CfgPtr = &XIntc_ConfigTable[(Xuint32)XPAR_OPB_INTC_0_DEVICE_ID];
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/* Get the configuration by using the device ID - in this case it is
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assumed that only one interrupt controller is being used. */
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pxInterruptController = &XIntc_ConfigTable[ XPAR_OPB_INTC_0_DEVICE_ID ];
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/* Get the interrupts that are waiting to be serviced */
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IntrStatus = XIntc_mGetIntrStatus(CfgPtr->BaseAddress);
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/* Which interrupts are pending? */
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ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress );
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/* Service each interrupt that is active and enabled by checking each
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* bit in the register from LSB to MSB which corresponds to an interrupt
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* intput signal
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*/
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for (IntrNumber = 0; IntrNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS;
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IntrNumber++)
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for( xInterruptNumber = 0; xInterruptNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS; xInterruptNumber++ )
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{
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if (IntrStatus & 1)
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if( ulInterruptStatus & 0x01UL )
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{
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XIntc_VectorTableEntry *TablePtr;
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/* Call the registered handler. */
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pxTable = &( pxInterruptController->HandlerTable[ xInterruptNumber ] );
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pxTable->Handler( pxTable->CallBackRef );
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/* The interrupt is active and enabled, call the interrupt
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* handler that was setup with the specified parameter
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*/
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TablePtr = &(CfgPtr->HandlerTable[IntrNumber]);
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TablePtr->Handler(TablePtr->CallBackRef);
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/* Clear the interrupt. */
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XIntc_mAckIntr(CfgPtr->BaseAddress, IntrMask);
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/* Clear the pending interrupt. */
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XIntc_mAckIntr( pxInterruptController->BaseAddress, ulInterruptMask );
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break;
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}
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/* Move to the next interrupt to check */
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IntrMask <<= 1;
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IntrStatus >>= 1;
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/* Check the next interrupt. */
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ulInterruptMask <<= 0x01UL;
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ulInterruptStatus >>= 0x01UL;
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/* If there are no other bits set indicating that all interrupts
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* have been serviced, then exit the loop
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*/
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if (IntrStatus == 0)
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/* Have we serviced all interrupts? */
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if( ulInterruptStatus == 0UL )
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{
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break;
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}
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@ -286,9 +271,16 @@ void vPortSetupInterruptController( void )
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{
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extern void vPortISRWrapper( void );
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/* Perform all library calls necessary to initialise the exception table
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and interrupt controller. This assumes only one interrupt controller is in
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use. */
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XExc_mDisableExceptions( XEXC_NON_CRITICAL );
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XExc_Init();
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XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, (XExceptionHandler)vPortISRWrapper, NULL );
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/* The library functions save the context - we then jump to a wrapper to
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save the stack into the TCB. The wrapper then calls the handler defined
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above. */
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XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, ( XExceptionHandler ) vPortISRWrapper, NULL );
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XIntc_Initialize( &xInterruptController, XPAR_OPB_INTC_0_DEVICE_ID );
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XIntc_Start( &xInterruptController, XIN_REAL_MODE );
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}
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@ -298,6 +290,9 @@ portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XIn
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{
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portBASE_TYPE xReturn = pdFAIL;
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/* This function is defined here so the scope of xInterruptController can
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remain within this file. */
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if( XST_SUCCESS == XIntc_Connect( &xInterruptController, ucInterruptID, pxHandler, pvCallBackRef ) )
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{
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XIntc_Enable( &xInterruptController, ucInterruptID );
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@ -10,18 +10,6 @@
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.global vPortTickISR
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.global vPortISRWrapper
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.set portCONTEXT_SIZE, 156
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.set portR0_OFFSET, 152
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.set portGPR_OFFSET, 32
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.set portCR_OFFSET, 28
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.set portXER_OFFSET, 24
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.set portLR_OFFSET, 16
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.set portCTR_OFFSET, 16
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.set portUSPRG0_OFFSET, 12
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.set portSRR0_OFFSET, 8
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.set portSRR1_OFFSET, 4
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.set BChainField, 0
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.set NextLRField, BChainField + 4
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.set MSRField, NextLRField + 4
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@ -37,131 +25,7 @@
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.set IFrameSize, r3r31Field + ( ( 31 - 3 ) + 1 ) * 4
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.macro portRESTORE_CONTEXT
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# Get the address of the TCB.
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xor R0, R0, R0
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addis SP, R0, pxCurrentTCB@ha
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lwz SP, pxCurrentTCB@l( SP )
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# Get the task stack pointer from the TCB.
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lwz SP, 0( SP )
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# Pop the special purpose registers
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lwz R0, portSRR1_OFFSET( SP )
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mtspr SRR1, R0
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lwz R0, portSRR0_OFFSET( SP )
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mtspr SRR0, R0
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lwz R0, portUSPRG0_OFFSET( SP )
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mtspr 256, R0 #USPRG0
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lwz R0, portCTR_OFFSET( SP )
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mtspr CTR, R0
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lwz R0, portLR_OFFSET( SP )
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mtspr LR, R0
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lwz R0, portXER_OFFSET( SP )
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mtspr XER, R0
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lwz R0, portCR_OFFSET( SP )
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mtcr R0
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# Pop GPRs
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lmw R2, portGPR_OFFSET( SP )
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# Finally pop R0 and correct the stack pointer
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lwz R0, portR0_OFFSET( SP )
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addi R1, R1, portCONTEXT_SIZE
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# Start the task running
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rfi
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.endm
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.macro portSAVE_CONTEXT
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# Make room on the stack.
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subi R1, R1, portCONTEXT_SIZE
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# Push R0, then the GPRs
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stw R0, portR0_OFFSET( SP )
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stm R2, portGPR_OFFSET( SP )
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# Push the SFRs
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mfcr R0
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stw R0, portCR_OFFSET( SP )
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mfspr R0, XER
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stw R0, portXER_OFFSET( SP )
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mfspr R0, LR
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stw R0, portLR_OFFSET( SP )
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mfspr R0, CTR
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stw R0, portCTR_OFFSET( SP )
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mfspr R0, 256 #USPRG0
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stw R0, portUSPRG0_OFFSET( SP )
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mfspr R0, SRR0
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stw R0, portSRR0_OFFSET( SP )
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mfspr R0, SRR1
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stw R0, portSRR1_OFFSET( SP )
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# Get the address of the TCB.
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xor R0, R0, R0
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addis R2, R0, pxCurrentTCB@ha
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lwz R2, pxCurrentTCB@l( R2 )
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# Store the stack pointer into the TCB
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stw SP, 0( R2 )
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.endm
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.macro int_epilogue
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# Get the address of the TCB.
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xor R0, R0, R0
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addis SP, R0, pxCurrentTCB@ha
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lwz SP, pxCurrentTCB@l( SP )
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# Get the task stack pointer from the TCB.
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lwz SP, 0( SP )
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# Restore MSR register to SRR1.
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lwz R0,MSRField(R1)
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mtsrr1 R0
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# Restore current PC location to SRR0.
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lwz R0,PCField(R1)
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mtsrr0 R0
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# Save USPRG0 register
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lwz R0,USPRG0Field(R1)
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mtspr 0x100,R0
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# Restore Condition register
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lwz R0,CRField(R1)
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mtcr R0
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# Restore Fixed Point Exception register
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lwz R0,XERField(R1)
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mtxer R0
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# Restore Counter register
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lwz R0,CTRField(R1)
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mtctr R0
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# Restore Link register
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lwz R0,LRField(R1)
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mtlr R0
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# Restore remaining GPR registers.
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lmw R3,r3r31Field(R1)
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# Restore r0 and r2.
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lwz R0,r0Field(R1)
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lwz R2,r2Field(R1)
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# Remove frame from stack
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addi R1,R1,IFrameSize
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.endm
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.macro portENTER_SWITCHING_ISR
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.macro portSAVE_STACK_POINTER_AND_LR
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# Get the address of the TCB.
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xor R0, R0, R0
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@ -180,7 +44,7 @@
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.endm
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.macro portEXIT_SWITCHING_ISR
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.macro portRESTORE_STACK_POINTER_AND_LR
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# Restore the link register
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lwz R11, 0( R1 )
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@ -202,25 +66,67 @@
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vPortStartFirstTask:
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int_epilogue
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rfi
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# Get the address of the TCB.
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xor R0, R0, R0
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addis SP, R0, pxCurrentTCB@ha
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lwz SP, pxCurrentTCB@l( SP )
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#vPortStartFirstTask:
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# portRESTORE_CONTEXT
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# rfi
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# Get the task stack pointer from the TCB.
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lwz SP, 0( SP )
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# Restore MSR register to SRR1.
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lwz R0, MSRField(R1)
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mtsrr1 R0
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# Restore current PC location to SRR0.
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lwz R0, PCField(R1)
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mtsrr0 R0
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# Save USPRG0 register
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lwz R0, USPRG0Field(R1)
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mtspr 0x100,R0
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# Restore Condition register
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lwz R0, CRField(R1)
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mtcr R0
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# Restore Fixed Point Exception register
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lwz R0, XERField(R1)
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mtxer R0
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# Restore Counter register
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lwz R0, CTRField(R1)
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mtctr R0
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# Restore Link register
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lwz R0, LRField(R1)
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mtlr R0
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# Restore remaining GPR registers.
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lmw R3,r3r31Field(R1)
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# Restore r0 and r2.
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lwz R0, r0Field(R1)
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lwz R2, r2Field(R1)
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# Remove frame from stack
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addi R1,R1,IFrameSize
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# Return into the first task
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rfi
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vPortYield:
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portENTER_SWITCHING_ISR
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portSAVE_STACK_POINTER_AND_LR
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bl vTaskSwitchContext
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portEXIT_SWITCHING_ISR
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portRESTORE_STACK_POINTER_AND_LR
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blr
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vPortTickISR:
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portENTER_SWITCHING_ISR
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portSAVE_STACK_POINTER_AND_LR
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bl vTaskIncrementTick
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#if configUSE_PREEMPTION == 1
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bl vTaskSwitchContext
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@ -230,12 +136,12 @@ vPortTickISR:
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lis R0, 2048
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mttsr R0
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portEXIT_SWITCHING_ISR
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portRESTORE_STACK_POINTER_AND_LR
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blr
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vPortISRWrapper:
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portENTER_SWITCHING_ISR
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portSAVE_STACK_POINTER_AND_LR
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bl vPortISRHandler
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portEXIT_SWITCHING_ISR
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portRESTORE_STACK_POINTER_AND_LR
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blr
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|
|
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@ -77,6 +77,8 @@ extern "C" {
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#endif
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/*-----------------------------------------------------------*/
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||||
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/* This port uses the critical nesting count from the TCB rather than
|
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maintaining a separate value and then saving this value in the task stack. */
|
||||
#define portCRITICAL_NESTING_IN_TCB 1
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/* Interrupt control macros. */
|
||||
|
|
@ -97,6 +99,7 @@ void vTaskExitCritical( void );
|
|||
void vPortYield( void );
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||||
#define portYIELD() asm volatile ( "SC \n\t NOP" )
|
||||
#define portYIELD_FROM_ISR() vTaskSwitchContext()
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
|
|
@ -110,7 +113,7 @@ void vPortYield( void );
|
|||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
/* Port specific initialisation function. */
|
||||
/* Port specific interrupt handling functions. */
|
||||
void vPortSetupInterruptController( void );
|
||||
portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue