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Add AVR32 port and demo files.
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147
Demo/lwIP_AVR32_UC3/main.c
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147
Demo/lwIP_AVR32_UC3/main.c
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/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
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/*This file has been prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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*
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* \brief FreeRTOS and lwIP example for AVR32 UC3.
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*
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* - Compiler: GNU GCC for AVR32
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* - Supported devices: All AVR32 devices can be used.
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* - AppNote:
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*
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support email: avr32@atmel.com
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*
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*****************************************************************************/
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/* Copyright (c) 2007, Atmel Corporation All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of ATMEL may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
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* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* Environment include files. */
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#include <stdlib.h>
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#include <string.h>
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#include "pm.h"
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#include "flashc.h"
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Demo file headers. */
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#include "partest.h"
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#include "serial.h"
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#include "ethernet.h"
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#include "netif/etharp.h"
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#include "flash.h"
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/* Priority definitions for most of the tasks in the demo application. */
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#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
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#define mainETH_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
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/* Baud rate used by the serial port tasks. */
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#define mainCOM_BAUD_RATE ( ( unsigned portLONG ) 57600 )
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#define mainCOM_BUFFER_LEN ( ( unsigned portLONG ) 70 )
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/* An address in the internal Flash used to count resets. This is used to check that
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the demo application is not unexpectedly resetting. */
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#define mainRESET_COUNT_ADDRESS ( ( void * ) 0xC0000000 )
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//!
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//! \fn main
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//! \brief start the software here
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//! 1) Initialize the microcontroller and the shared hardware resources
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//! of the board.
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//! 2) Launch the IP modules.
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//! 3) Start FreeRTOS.
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//! \return 42, which should never occur.
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//! \note
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//!
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int main( void )
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{
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volatile avr32_pm_t* pm = &AVR32_PM;
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/* 1) Initialize the microcontroller and the shared hardware resources of the board. */
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/* Switch to external oscillator 0 */
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pm_switch_to_osc0( pm, FOSC0, OSC0_STARTUP );
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/* Setup PLL0 on OSC0, mul+1=16 ,divisor by 1, lockcount=16, ie. 12Mhzx16/1 = 192MHz output.
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Extra div by 2 => 96MHz */
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pm_pll_setup(pm, /* volatile avr32_pm_t* pm */
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0, /* unsigned int pll */
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15, /* unsigned int mul */
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1, /* unsigned int div, Sel Osc0/PLL0 or Osc1/Pll1 */
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0, /* unsigned int osc */
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16); /* unsigned int lockcount */
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pm_pll_set_option( pm, 0, // pll0
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0, // Choose the range 160-240MHz.
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1, // div2
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0 ); // wbwdisable
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/* Enable PLL0 */
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pm_pll_enable(pm,0);
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/* Wait for PLL0 locked */
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pm_wait_for_pll0_locked(pm) ;
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/* Setup generic clock number 2 on PLL, with OSC0/PLL0, no divisor */
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pm_gc_setup(pm,
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0,
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1, /* Use Osc (=0) or PLL (=1) */
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0, /* Sel Osc0/PLL0 or Osc1/Pll1 */
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0,
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1);
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/* Enable Generic clock 0*/
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pm_gc_enable(pm, 0);
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/* switch to clock */
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pm_cksel( pm, 1, 1, 1, 0, 1, 0 );
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flashc_set_wait_state( 1 );
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pm_switch_to_clock( pm, AVR32_PM_MCCTRL_MCSEL_PLL0 );
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/* Setup the LED's for output. */
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vParTestInitialise();
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/* Start the flash tasks just to provide visual feedback that the demo is
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executing. */
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vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
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/* 2) Start ethernet task. */
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vStartEthernetTask( mainETH_TASK_PRIORITY );
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/* 3) Start FreeRTOS. */
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vTaskStartScheduler();
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/* Will only reach here if there was insufficient memory to create the idle task. */
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return 0;
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}
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/*-----------------------------------------------------------*/
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