len0rd/FreeRTOS-Kernel
1
0
Fork 0
mirror of https://github.com/FreeRTOS/FreeRTOS-Kernel.git synced 2025-09-01 11:53:53 -04:00
Code Issues Projects Releases Packages Wiki Activity

Add AVR32 port and demo files.

Browse source
This commit is contained in:
Richard Barry 2007-04-01 19:37:01 +00:00
parent b727359f1b
commit bf2b676eaa
52 changed files with 12194 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

283
Demo/lwIP_AVR32_UC3/DRIVERS/FLASHC/flashc.c Normal file
View file

@ -0,0 +1,283 @@
/* This source file is part of the ATMEL FREERTOS-0.9.0 Release */
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Flash Controller driver.
*
* This file defines a useful set of functions for the flash controller
* on AVR32A devices.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32A devices.
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support email: avr32@atmel.com
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "flashc.h"
/*! Flash command key*/
#define X_KEY 0xA5000000
/*! Get locke error.
* \warning: Flash status register (FCR) is read, and Programmming error status may be automatically
* cleared when reading FCR.
*/
#define Flashc_get_lockerror() ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_LOCKE_MASK)>>AVR32_FLASHC_FSR_LOCKE_OFFSET)
/*! Get programming error.
* \warning: Flash status register (FCR) is read, and locke error status may be automatically
* cleared when reading FCR.
*/
#define Flashc_get_programming_error() ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_PROGE_MASK)>>AVR32_FLASHC_FSR_PROGE_OFFSET)
/*! Check if page is erased (used with the quick page read command result)
* \warning: Flash status register (FCR) is read, and error status may be automatically
* cleared when reading FCR.
*/
#define Flashc_is_page_erased() ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_QPRR_MASK)>>AVR32_FLASHC_FSR_QPRR_OFFSET)
/*! Set: No erase is performed before programming. */
#define Flashc_set_no_erase_before_programming() (AVR32_FLASHC.fcr |= AVR32_FLASHC_FCR_NEBP_MASK)
/*! Set: Page erase is performed before programming. */
#define Flashc_set_erase_before_programming() (AVR32_FLASHC.fcr &= ~AVR32_FLASHC_FCR_NEBP_MASK)
/*!
* Memcopy function
* \param *s1 destination
* \param *s2 source
* \param n word numbers to copy
*/
U32 *flashc_memcpy(U32 *s1, const U32 *s2, const U32 n) {
register U32 *u32pdst;
register U32 i;
u32pdst = s1;
for (i = n; i > 0; i--) *u32pdst++ = *s2++;
return s1;
}
/*!
* Set number of wait state for flash controller.
*/
int flashc_set_wait_state(U16 ws)
{
if (ws > 1 ) return FLASHC_INVALID_INPUT;
if (ws == 0) AVR32_FLASHC.fcr &= ~AVR32_FLASHC_FWS_MASK; // update flash control register FCR
if (ws == 1) AVR32_FLASHC.fcr |= AVR32_FLASHC_FWS_MASK;
return FLASHC_SUCCESS;
}
/*!
* Page write n
* \param n page number
* \warning Assuming the page address is already loaded
*/
void flashc_page_write_n(U16 page_n) {
register U32 u32Command;
u32Command = X_KEY | AVR32_FLASHC_FCMD_CMD_WP; // key and command
u32Command |= ((page_n<<AVR32_FLASHC_FCMD_PAGEN_OFFSET) & AVR32_FLASHC_FCMD_PAGEN_MASK); // update page field
flashc_busy_wait();
AVR32_FLASHC.fcmd = u32Command;
}
/* Page write
* Assuming the page address is already loaded
*/
void flashc_page_write(U16 page_n) {
register U32 u32Command;
u32Command = X_KEY | AVR32_FLASHC_FCMD_CMD_WP; // key and command
u32Command |= ((page_n<<AVR32_FLASHC_FCMD_PAGEN_OFFSET) & AVR32_FLASHC_FCMD_PAGEN_MASK); // update page field
flashc_busy_wait();
AVR32_FLASHC.fcmd = u32Command;
}
/* Clear page buffer */
void flashc_clear_page_buffer(void){
register U32 u32Command;
u32Command = X_KEY | AVR32_FLASHC_FCMD_CMD_CPB; // key and command clear page buffer
flashc_busy_wait();
AVR32_FLASHC.fcmd = u32Command;
}
/* Page erase
* Assuming the page address is already loaded
*/
void flashc_erase_page(U16 page_n){
register U32 u32Command;
u32Command = X_KEY | AVR32_FLASHC_FCMD_CMD_EP; // key and command,
u32Command |= ((page_n<<AVR32_FLASHC_FCMD_PAGEN_OFFSET) & AVR32_FLASHC_FCMD_PAGEN_MASK); // update page field
flashc_busy_wait();
AVR32_FLASHC.fcmd = u32Command;
}
/* Erase all Pages */
void flashc_erase_all(void){
register U32 u32Command;
u32Command = X_KEY | AVR32_FLASHC_FCMD_CMD_EA; // key and command,
//u32Command |= ((page_n<<AVR32_FLASHC_FCMD_PAGEN_OFFSET) & AVR32_FLASHC_FCMD_PAGEN_MASK); // update page field
flashc_busy_wait();
AVR32_FLASHC.fcmd = u32Command;
flashc_busy_wait();
}
/* Erase a page and check if OK with the quick page read command */
int flashc_erase_page_and_check(U16 page_n)
{
flashc_erase_page(page_n); // erase page page_n first
flashc_busy_wait();
AVR32_FLASHC.fcmd = X_KEY | ((page_n<<AVR32_FLASHC_PAGEN_OFFSET)&AVR32_FLASHC_PAGEN_MASK) | AVR32_FLASHC_FCMD_CMD_QPR; // qpr on current page number
while(!((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FRDY_MASK)>>AVR32_FLASHC_FSR_FRDY_OFFSET));
if (Flashc_is_page_erased() == 0) // check QPRR bit in FCR to have the result of the quick page read
return FLASHC_FAILURE;
return FLASHC_SUCCESS;
}
/*!
* Page load and write
* \warning Dest is a FLASH address at a page size boundary
* (assuming the page is already erased)
*/
void flashc_page_copy_write(U32 *u32dest, const U32 *src) {
register U32 u32command,pagen;
flashc_memcpy(u32dest, src, AVR32_FLASHC_PAGE_SIZE / 4); // copy Src to Dest (Dest is a FLASH address at a page boundary)
pagen = (U32)(((U32)u32dest-AVR32_FLASH_ADDRESS)/AVR32_FLASHC_PAGE_SIZE); // memory page addr
u32command = X_KEY | ((pagen<<AVR32_FLASHC_PAGEN_OFFSET)&AVR32_FLASHC_PAGEN_MASK) |AVR32_FLASHC_FCMD_CMD_WP; // key and command
flashc_busy_wait();
AVR32_FLASHC.fcmd = u32command;
}
/* Copy data into page buffer */
#if __GNUC__
__attribute__((__always_inline__))
#endif
static __inline__ void flash_fill_temp_buffer(U32 u32Data, U32 u32Address)
{
*((U32*)u32Address) = u32Data;
}
/* Read word from flash
* addr should be 32-bit aligned.
*/
#if __GNUC__
__attribute__((__always_inline__))
#endif
static __inline__ U32 flash_rd_word(U32 const* addr)
{
return *addr;
}
/**
* This function allows to write up to 65535 bytes in the flash memory.
* This function manages alignement issue (byte and page alignements).
*/
int flash_wr_block(U32 * src, U32 dst, U32 n)
{
U32 u32NbWord=0;
U32 u32Temp=0;
U32 u32SavePageAddr=0;
U32 u32Address = dst-(dst%AVR32_FLASHC_PAGE_SIZE); // Compute the start of the page to be modified
while(n) // While there is data to load from src buffer
{
// u32Address = dst-((dst&0xFFFFffff)%AVR32_FLASHC_PAGE_SIZE); // Compute the start of the page to be modified
u32SavePageAddr = (u32Address-AVR32_FLASH_ADDRESS)/AVR32_FLASHC_PAGE_SIZE; //memorize page addr
// For each word in this page
for(u32NbWord=0 ; u32NbWord<AVR32_FLASHC_PAGE_SIZE/4 ; u32NbWord++)
{
if(n) //Still some data to load from src
{
if(u32Address >= dst) //current address is inside the target range adr
{
u32Temp = * ((U32*)src); // load word from buffer src
src++;
n--;
}
else //current word addr out of dst target
{
u32Temp = flash_rd_word((U32 const*)u32Address); // load word from existing flash
}
}
else //complete page with words from existing flash
{
u32Temp = flash_rd_word((U32 const*)u32Address);
}
flash_fill_temp_buffer(u32Temp, u32Address); // fill page buffer
u32Address+=4; // one more word for u32Address
}
// u32Address = u32SavePageAddr*AVR32_FLASHC_PAGE_SIZE+AVR32_FLASH_ADDRESS;
/*
// Done with QPR
for(u32NbWord=0 ; u32NbWord<AVR32_FLASHC_PAGE_SIZE/4 ; u32NbWord++)
{
if(flash_rd_word((U32 farcode*)u32Address)!=0xFFFFffff) // check if the page is erased
{
Flash_page_erase(u32SavePageAddr);
break;
}
u32Address+=4;
}
*/
// Check if page is erased
AVR32_FLASHC.fcmd = X_KEY | ((u32SavePageAddr<<AVR32_FLASHC_PAGEN_OFFSET)&AVR32_FLASHC_PAGEN_MASK) | AVR32_FLASHC_CMD_QPR; // qpr on current page number
while(!((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FRDY_MASK)>>AVR32_FLASHC_FSR_FRDY_OFFSET));
if ( (AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_QPRR_MASK)>> AVR32_FLASHC_FSR_QPRR_OFFSET == 0 ) // test QPR bit in FSR
{ // erase page
AVR32_FLASHC.fcmd = X_KEY | ((u32SavePageAddr<<AVR32_FLASHC_PAGEN_OFFSET)&AVR32_FLASHC_PAGEN_MASK) | AVR32_FLASHC_FCMD_CMD_EP; //page n erase cmd
while(!((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FRDY_MASK)>>AVR32_FLASHC_FSR_FRDY_OFFSET));
}
flashc_page_write_n(u32SavePageAddr); // write the corresponding page number
flashc_clear_page_buffer();
} // end while (n)
return FLASHC_SUCCESS;
}
/* Erase all flash with pages access */
void flash_erase(void)
{
U32 u32NbPage = flashc_get_page_count();
while (u32NbPage) flashc_erase_page(--u32NbPage);
}

193
Demo/lwIP_AVR32_UC3/DRIVERS/FLASHC/flashc.h Normal file
View file

@ -0,0 +1,193 @@
/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Flash Controller driver .h file.
*
* This file defines a useful set of functions for the flash controller
* on AVR32A devices.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32A devices.
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support email: avr32@atmel.com
*
*****************************************************************************/
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _FLASHC_H_
#define _FLASHC_H_
#if __GNUC__
# include <avr32/io.h>
#elif __ICCAVR32__
# include <avr32/iouc3a0512.h>
# include <avr32/uc3a0512.h>
#else
# error Unknown compiler
#endif
#include "compiler.h"
/*! Value returned by function when it completed successfully */
#define FLASHC_SUCCESS 0
/*! Value returned by function when it was unable to complete successfully
for some unspecified reason */
#define FLASHC_FAILURE -1
/*! Value returned by function when the input paramters are out of range */
#define FLASHC_INVALID_INPUT 1
/*! Get Flash size */
#if __GNUC__
__attribute__((__always_inline__))
#endif
extern __inline__ unsigned int flashc_get_flash_size(void)
{
static const unsigned int FLASHC_SIZE[1 << AVR32_FLASHC_FSR_FSZ_SIZE] =
{
32 << 10,
64 << 10,
128 << 10,
256 << 10,
384 << 10,
512 << 10,
768 << 10,
1024 << 10
};
return FLASHC_SIZE[Rd_bitfield(AVR32_FLASHC.fsr, AVR32_FLASHC_FSR_FSZ_MASK)];
}
/*! Get Flash page count */
#if __GNUC__
__attribute__((__always_inline__))
#endif
extern __inline__ unsigned int flashc_get_page_count(void)
{
return flashc_get_flash_size() / AVR32_FLASHC_PAGE_SIZE;
}
/*! Get Flash page count per region */
#if __GNUC__
__attribute__((__always_inline__))
#endif
extern __inline__ unsigned int flashc_get_page_count_per_region(void)
{
return flashc_get_page_count() / 16;
}
/*! Wait flash ready status, the application must wait before running a new command.
* Warning: Flash status register (FCR) is read, and error status may be automatically
* cleared when reading FCR.
*/
#if __GNUC__
__attribute__((__always_inline__))
#endif
extern __inline__ void flashc_busy_wait(void)
{
while (!Tst_bits(AVR32_FLASHC.fsr, AVR32_FLASHC_FSR_FRDY_MASK));
}
/*! Check if security bit is active.
* \warning: Flash status register (FCR) is read, and error status may be automatically
* cleared when reading FCR.
*/
#if __GNUC__
__attribute__((__always_inline__))
#endif
extern __inline__ Bool flashc_is_security_active(void)
{
return Tst_bits(AVR32_FLASHC.fsr, AVR32_FLASHC_FSR_SECURITY_MASK);
}
/*! \brief Memcopy function
* \param *s1 destination
* \param *s2 source
* \param n number of words to copy
*/
extern U32 *flashc_memcpy(U32 *s1, const U32 *s2, const U32 n);
/*! \brief Set number of wait state
* \param ws 0 if for no-wait state, for 1 wait-state
* \return FLASHC_SUCCESS, FLASHC_INVALID_INPUT or FLASHC_FAILURE
*/
extern int flashc_set_wait_state(U16 ws);
/*! \brief Page write number n. Assuming page bubuffer is already loaded.
* \param n Page number
*/
extern void flashc_page_write_n(U16 n);
/*! \brief Page write
* Assuming the page address is already loaded
*/
extern void flashc_page_write(U16 page_n);
/*! \brief Clear page buffer
*/
extern void flashc_clear_page_buffer(void);
/*! \brief Page erase
* Assuming the page address is already loaded
*/
extern void flashc_erase_page(U16 page_n);
/*! \brief Erase all Pages
*/
extern void flashc_erase_all(void);
/*! \brief Erase a page and check if erase is OK
*/
extern int flashc_erase_page_and_check(U16 page_n);
/*! \brief Page load and write
* \warning Dest is a FLASH address at a page boundary
* (assuming the page is already erased)
*/
extern void flashc_page_copy_write(U32 *Dest, const U32 *Src) ;
/*! \brief This function allows to write up to 65535 bytes in the flash memory.
* This function manages alignement issue (byte and page alignements).
*
* \param *src Address of data to write.
* \param dst Start address in flash memory where write data
* \param n Number of word to write
* \return FLASHC_SUCCESS or FLASHC_FAILURE
*/
extern int flash_wr_block(U32 * src, U32 dst, U32 n);
#endif /* #ifndef _FLASHC_H_*/