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Still messing around trying to get the workspace to be distributable.
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/* Coldfire C Header File
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* Copyright Freescale Semiconductor Inc
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* All rights reserved.
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*
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* 2007/03/19 Revision: 0.91
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*/
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#ifndef __MCF52235_RNGA_H__
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#define __MCF52235_RNGA_H__
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/*********************************************************************
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*
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* Random Number Generator (RNG)
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*
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_RNGA_RNGCR (*(vuint32*)(&__IPSBAR[0x1F0000]))
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#define MCF_RNGA_RNGSR (*(vuint32*)(&__IPSBAR[0x1F0004]))
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#define MCF_RNGA_RNGER (*(vuint32*)(&__IPSBAR[0x1F0008]))
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#define MCF_RNGA_RNGOUT (*(vuint32*)(&__IPSBAR[0x1F000C]))
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/* Bit definitions and macros for MCF_RNGA_RNGCR */
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#define MCF_RNGA_RNGCR_GO (0x1)
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#define MCF_RNGA_RNGCR_HA (0x2)
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#define MCF_RNGA_RNGCR_IM (0x4)
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#define MCF_RNGA_RNGCR_CI (0x8)
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#define MCF_RNGA_RNGCR_SLM (0x10)
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/* Bit definitions and macros for MCF_RNGA_RNGSR */
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#define MCF_RNGA_RNGSR_SV (0x1)
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#define MCF_RNGA_RNGSR_LRS (0x2)
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#define MCF_RNGA_RNGSR_OUF (0x4)
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#define MCF_RNGA_RNGSR_EI (0x8)
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#define MCF_RNGA_RNGSR_SLP (0x10)
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#define MCF_RNGA_RNGSR_ORL(x) (((x)&0xFF)<<0x8)
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#define MCF_RNGA_RNGSR_ORS(x) (((x)&0xFF)<<0x10)
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/* Bit definitions and macros for MCF_RNGA_RNGER */
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#define MCF_RNGA_RNGER_ENT(x) (((x)&0xFFFFFFFF)<<0)
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/* Bit definitions and macros for MCF_RNGA_RNGOUT */
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#define MCF_RNGA_RNGOUT_RANDOM_OUTPUT(x) (((x)&0xFFFFFFFF)<<0)
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#endif /* __MCF52235_RNGA_H__ */
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