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Continue work on Risc V port.
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@ -50,6 +50,7 @@ static void prvTaskExitError( void );
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/* Used to program the machine timer compare register. */
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static uint64_t ullNextTime = 0ULL;
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static const uint64_t ullTimerIncrementsForOneTick = ( uint64_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
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static volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) ( configCTRL_BASE + 0x4000 );
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/*-----------------------------------------------------------*/
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@ -165,8 +166,8 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
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void vPortSetupTimerInterrupt( void )
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{
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uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
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volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFF8 );
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volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFFc );
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volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFFC );
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volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFF8 );
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do
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{
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@ -177,9 +178,12 @@ volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCTR
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ullNextTime = ( uint64_t ) ulCurrentTimeHigh;
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ullNextTime <<= 32ULL;
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ullNextTime |= ( uint64_t ) ulCurrentTimeLow;
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ullNextTime += ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
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ullNextTime += ullTimerIncrementsForOneTick;
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*pullMachineTimerCompareRegister = ullNextTime;
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/* Prepare the time to use after the next tick interrupt. */
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ullNextTime += ullTimerIncrementsForOneTick;
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/* Enable timer interrupt */
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__asm volatile( "csrs mie, %0" :: "r"(0x80) );
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}
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@ -192,8 +196,34 @@ volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCTRL_BASE;
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vTaskSwitchContext();
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/* Clear software interrupt. */
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*ulSoftInterrupt = 0UL;
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*( ( uint32_t * ) configCTRL_BASE ) = 0UL;
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}
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/*-----------------------------------------------------------*/
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void Timer_IRQHandler( void )
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{
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/* Reload for the next timer interrupt. */
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*pullMachineTimerCompareRegister = ullNextTime;
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ullNextTime += ullTimerIncrementsForOneTick;
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if( xTaskIncrementTick() != pdFALSE )
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{
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portYIELD();
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}
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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extern void xPortStartFirstTask( void );
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vPortSetupTimerInterrupt();
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xPortStartFirstTask();
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/* Should not get here as after calling xPortStartFirstTask() only tasks
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should be executing. */
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return pdFAIL;
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}
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@ -38,7 +38,7 @@
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#define CONTEXT_SIZE ( 28 * WORD_SIZE )
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.global xPortStartScheduler
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.global xPortStartFirstTask
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.global vPortTrapHandler
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.extern pxCurrentTCB
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.extern handle_trap
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@ -46,7 +46,8 @@
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/*-----------------------------------------------------------*/
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.align 8
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xPortStartScheduler:
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xPortStartFirstTask:
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lw sp, pxCurrentTCB /* Load pxCurrentTCB. */
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lw sp, 0( sp ) /* Read sp from first TCB member. */
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@ -70,7 +70,7 @@ not need to be guarded with a critical section. */
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/* Scheduler utilities. */
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#define portYIELD() { volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCTRL_BASE; *ulSoftInterrupt = 1UL; }
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#define portYIELD() *( ( uint32_t * ) configCTRL_BASE ) = 1UL
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYield()
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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@ -80,13 +80,15 @@ not need to be guarded with a critical section. */
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#define portCRITICAL_NESTING_IN_TCB 1
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extern int vPortSetInterruptMask( void );
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extern void vPortClearInterruptMask( int );
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extern void vTaskEnterCritical( void );
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extern void vTaskExitCritical( void );
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#define portSET_INTERRUPT_MASK_FROM_ISR() 0
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue )
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#define portDISABLE_INTERRUPTS()
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#define portENABLE_INTERRUPTS()
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#define portENTER_CRITICAL()
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#define portEXIT_CRITICAL()
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#define portDISABLE_INTERRUPTS() __asm volatile( "csrc mstatus, 8" )
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#define portENABLE_INTERRUPTS() __asm volatile( "csrs mstatus, 8" )
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#define portENTER_CRITICAL() vTaskEnterCritical()
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#define portEXIT_CRITICAL() vTaskExitCritical()
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/*-----------------------------------------------------------*/
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