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Continue work on Risc V port.

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This commit is contained in:
Richard Barry 2018-11-06 02:04:28 +00:00
parent 74d0d16aab
commit baee711cb6
3 changed files with 45 additions and 12 deletions
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38
FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c
View file

@ -50,6 +50,7 @@ static void prvTaskExitError( void );
/* Used to program the machine timer compare register. */ /* Used to program the machine timer compare register. */
static uint64_t ullNextTime = 0ULL; static uint64_t ullNextTime = 0ULL;
static const uint64_t ullTimerIncrementsForOneTick = ( uint64_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
static volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) ( configCTRL_BASE + 0x4000 ); static volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) ( configCTRL_BASE + 0x4000 );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -165,8 +166,8 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
void vPortSetupTimerInterrupt( void ) void vPortSetupTimerInterrupt( void )
{ {
uint32_t ulCurrentTimeHigh, ulCurrentTimeLow; uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFF8 ); volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFFC );
volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFFc ); volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCTRL_BASE + 0xBFF8 );
do do
{ {
@ -177,9 +178,12 @@ volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCTR
ullNextTime = ( uint64_t ) ulCurrentTimeHigh; ullNextTime = ( uint64_t ) ulCurrentTimeHigh;
ullNextTime <<= 32ULL; ullNextTime <<= 32ULL;
ullNextTime |= ( uint64_t ) ulCurrentTimeLow; ullNextTime |= ( uint64_t ) ulCurrentTimeLow;
ullNextTime += ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); ullNextTime += ullTimerIncrementsForOneTick;
*pullMachineTimerCompareRegister = ullNextTime; *pullMachineTimerCompareRegister = ullNextTime;
/* Prepare the time to use after the next tick interrupt. */
ullNextTime += ullTimerIncrementsForOneTick;
/* Enable timer interrupt */ /* Enable timer interrupt */
__asm volatile( "csrs mie, %0" :: "r"(0x80) ); __asm volatile( "csrs mie, %0" :: "r"(0x80) );
} }
@ -192,8 +196,34 @@ volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCTRL_BASE;
vTaskSwitchContext(); vTaskSwitchContext();
/* Clear software interrupt. */ /* Clear software interrupt. */
*ulSoftInterrupt = 0UL; *( ( uint32_t * ) configCTRL_BASE ) = 0UL;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void Timer_IRQHandler( void )
{
/* Reload for the next timer interrupt. */
*pullMachineTimerCompareRegister = ullNextTime;
ullNextTime += ullTimerIncrementsForOneTick;
if( xTaskIncrementTick() != pdFALSE )
{
portYIELD();
}
}
/*-----------------------------------------------------------*/
BaseType_t xPortStartScheduler( void )
{
extern void xPortStartFirstTask( void );
vPortSetupTimerInterrupt();
xPortStartFirstTask();
/* Should not get here as after calling xPortStartFirstTask() only tasks
should be executing. */
return pdFAIL;
}

5
FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S
View file

@ -38,7 +38,7 @@
#define CONTEXT_SIZE ( 28 * WORD_SIZE ) #define CONTEXT_SIZE ( 28 * WORD_SIZE )
.global xPortStartScheduler .global xPortStartFirstTask
.global vPortTrapHandler .global vPortTrapHandler
.extern pxCurrentTCB .extern pxCurrentTCB
.extern handle_trap .extern handle_trap
@ -46,7 +46,8 @@
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
.align 8 .align 8
xPortStartScheduler: xPortStartFirstTask:
lw sp, pxCurrentTCB /* Load pxCurrentTCB. */ lw sp, pxCurrentTCB /* Load pxCurrentTCB. */
lw sp, 0( sp ) /* Read sp from first TCB member. */ lw sp, 0( sp ) /* Read sp from first TCB member. */

12
FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h
View file

@ -70,7 +70,7 @@ not need to be guarded with a critical section. */
/* Scheduler utilities. */ /* Scheduler utilities. */
#define portYIELD() { volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCTRL_BASE; *ulSoftInterrupt = 1UL; } #define portYIELD() *( ( uint32_t * ) configCTRL_BASE ) = 1UL
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYield() #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYield()
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -80,13 +80,15 @@ not need to be guarded with a critical section. */
#define portCRITICAL_NESTING_IN_TCB 1 #define portCRITICAL_NESTING_IN_TCB 1
extern int vPortSetInterruptMask( void ); extern int vPortSetInterruptMask( void );
extern void vPortClearInterruptMask( int ); extern void vPortClearInterruptMask( int );
extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void );
#define portSET_INTERRUPT_MASK_FROM_ISR() 0 #define portSET_INTERRUPT_MASK_FROM_ISR() 0
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue )
#define portDISABLE_INTERRUPTS() #define portDISABLE_INTERRUPTS() __asm volatile( "csrc mstatus, 8" )
#define portENABLE_INTERRUPTS() #define portENABLE_INTERRUPTS() __asm volatile( "csrs mstatus, 8" )
#define portENTER_CRITICAL() #define portENTER_CRITICAL() vTaskEnterCritical()
#define portEXIT_CRITICAL() #define portEXIT_CRITICAL() vTaskExitCritical()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/